Commit Graph

1372 Commits

Author SHA1 Message Date
Lukas Steiner (2)
3f7296f2a5 Removed RGR timing parameters. 2019-08-19 11:16:27 +02:00
Lukas Steiner
8115aba222 Fixed wrong PRE -<> PREA test in TraceAnalyzer. 2019-08-18 19:56:17 +02:00
Lukas Steiner
4d936892d9 Included DRAMPower dummy, it can now be switched on and off again. 2019-08-18 19:23:53 +02:00
Lukas Steiner (2)
7b8bb86620 Removed old timing parameters, moved DramPower configuration to specific Drams. 2019-08-15 14:55:55 +02:00
Lukas Steiner
7d675a9837 Renaming and minor improvements. 2019-08-14 21:19:42 +02:00
Lukas Steiner
31101a0827 Finished bankwise refresh. 2019-08-14 20:19:27 +02:00
Lukas Steiner (2)
47ee187bc3 Working on RefreshManagerBankwise. 2019-08-14 13:48:04 +02:00
Lukas Steiner (2)
0918a78648 Included GenericController for polymorphism. 2019-08-14 09:44:24 +02:00
Lukas Steiner (2)
c2022667c5 Included files for RefreshManagerBankwise. 2019-08-13 14:23:44 +02:00
Lukas Steiner (2)
3b26997ea4 Updated structure of RefreshManager for bankwise refresh implementation. 2019-08-13 11:39:15 +02:00
Lukas Steiner (2)
38a099b8e8 Included RefreshChecker for different refresh modes. 2019-08-12 16:41:44 +02:00
Lukas Steiner (2)
e6dc4e7c75 Removed unused files of old controller. 2019-08-12 14:19:22 +02:00
Lukas Steiner
05a8272ee6 Moved bandwidth calculation to GenericController. 2019-08-10 01:01:52 +02:00
Lukas Steiner
dc194781f7 Code formatting. 2019-08-09 23:46:49 +02:00
Lukas Steiner
08dc5e811a Removed redundant check in controllerMethod. 2019-08-09 23:45:17 +02:00
Lukas Steiner (2)
1dea807da3 Included various events to avoid multiple triggers of controllerMethod at the same time. 2019-08-09 19:38:49 +02:00
Lukas Steiner (2)
2e40894097 Included RefreshManagerIF and RefreshManagerDummy to disable refresh. 2019-08-09 13:39:02 +02:00
Lukas Steiner (2)
1bd322e576 Fixed "PREA if all banks are precharged" issue. 2019-08-09 10:35:17 +02:00
Lukas Steiner (2)
88f57dd88f Included refresh. 2019-08-08 16:22:33 +02:00
Lukas Steiner (2)
ca36faa403 Changed printDebugMessage into macro to turn it off completely for speedup. 2019-08-08 09:45:22 +02:00
Lukas Steiner (2)
c93a11fbf5 Code formatting. 2019-08-02 10:44:49 +02:00
Lukas Steiner (2)
85e9fc6930 Included bandwidth calculation. Fixed bug (RD/WR from wrong row). 2019-08-01 16:26:57 +02:00
Lukas Steiner (2)
6a66c89130 Included GenericController for verilator compatibility. 2019-08-01 11:00:31 +02:00
Lukas Steiner (2)
36373c9cce Gave all sc_modules names. Added missing virtual destructors in different DRAMs. 2019-07-31 15:20:13 +02:00
Lukas Steiner (2)
ed96f9fb54 Added new CheckerDDR3, changed checker type in controller to CheckerIF for polymorphism. 2019-07-30 16:25:05 +02:00
Lukas Steiner (2)
1053f7c1b7 Created CheckerIF, removed old CheckerDDR3. 2019-07-30 16:03:49 +02:00
Lukas Steiner (2)
b9f0c31ddf Moved controller state into timing checker. Inserted preambles. 2019-07-30 15:14:24 +02:00
Lukas Steiner (2)
b477424a98 Bugfix: Commands on one bank can overlap now. 2019-07-30 13:30:59 +02:00
Lukas Steiner
fb9abb9cee Changed type of payloadID to uint64_t for overflow prevention. 2019-07-29 20:55:40 +02:00
Lukas Steiner (2)
4fa59c2410 Included ControllerRecordable for disabling of trace recording. 2019-07-29 16:44:14 +02:00
Lukas Steiner (2)
91755962a2 Improvement in timing checker: additional map instead of for loops. 2019-07-29 14:17:03 +02:00
Lukas Steiner (2)
de650810dd Changed interface of scheduler, small bugfix (wrong debug message in Controller). 2019-07-29 11:05:03 +02:00
Lukas Steiner
dbcdf3f61d Included FAW check. 2019-07-28 22:53:27 +02:00
Lukas Steiner
42344ce87f Removed lastDataStrobeCommands in ControllerState, removed unused methods in timing checker. 2019-07-28 21:50:28 +02:00
Lukas Steiner
a05b0ed610 Removed RowBufferState in ControllerState. 2019-07-28 20:57:48 +02:00
Lukas Steiner
e0743b71d6 Small improvement in ControllerNew (redundant event triggers), renaming in ControllerState. 2019-07-28 20:45:03 +02:00
Lukas Steiner
733525e787 Included command mux which selects the oldest payload and a command mux interface. 2019-07-27 21:12:22 +02:00
Lukas Steiner
215790a931 Created different schedulers (Fifo and FrFcfs) and a scheduler interface. 2019-07-27 19:24:09 +02:00
Lukas Steiner (2)
c4c2640594 Moved event trigger out of BankMachine. 2019-07-26 16:28:22 +02:00
Lukas Steiner (2)
3f913b5c16 Arbiter now assigns each payload an ID for transaction order decision in CommandMux. 2019-07-26 15:48:58 +02:00
Lukas Steiner (2)
f2ab2fe3ee Included first test for CommandMux. 2019-07-25 16:40:03 +02:00
Lukas Steiner (2)
38a21088a0 Merge branch 'master' into DRAMSys4.0_ctrl 2019-07-25 13:47:57 +02:00
Matthias Jung
7304055a22 Merge branch 'googletest_merge2' into 'master'
Include googletest and subproject for unit tests.

See merge request ems/astdm/dram.sys!240
2019-07-25 12:02:33 +02:00
Lukas Steiner (2)
a303f242e6 Included googletest and subproject for unit tests. 2019-07-25 11:49:18 +02:00
Lukas Steiner
7bd0950e1e Some minor changes. 2019-07-23 21:30:29 +02:00
Lukas Steiner (2)
e1e53b5c2e Moved parts of logic from CommandMux::selectCommand to controlMethod, moved commandFinishedTime from BMs to Controller. 2019-07-23 16:20:38 +02:00
Lukas Steiner (2)
1e8b8e37ea Moved if statements from inner methods to controllerMethod(). 2019-07-23 15:10:19 +02:00
Lukas Steiner (2)
e7552f6916 Code cleanup. 2019-07-23 14:30:01 +02:00
Lukas Steiner (2)
0d0c7415b2 Fixed clk cycle waiting for fifo strict transaction order. 2019-07-23 14:13:51 +02:00
Lukas Steiner
6aa2533edd New controller is working. 2019-07-22 20:31:17 +02:00