Gave all sc_modules names. Added missing virtual destructors in different DRAMs.

This commit is contained in:
Lukas Steiner (2)
2019-07-31 15:20:13 +02:00
parent ed96f9fb54
commit 36373c9cce
15 changed files with 29 additions and 26 deletions

View File

@@ -49,9 +49,9 @@
using namespace std;
TlmRecorder::TlmRecorder(sc_module_name /*name*/, string uri,
string dbname) : sqlScriptURI(uri), dbName(dbname), totalNumTransactions(1),
simulationTimeCoveredByRecording(SC_ZERO_TIME)
TlmRecorder::TlmRecorder(sc_module_name name, string uri, string dbname) :
sc_module(name), sqlScriptURI(uri), dbName(dbname),
totalNumTransactions(1), simulationTimeCoveredByRecording(SC_ZERO_TIME)
{
recordedData.reserve(transactionCommitRate);
setUpTransactionTerminatingPhases();

View File

@@ -61,7 +61,7 @@ public:
std::string sqlScriptURI;
std::string dbName;
TlmRecorder(sc_module_name /*name*/, string uri, string dbname);
TlmRecorder(sc_module_name name, string uri, string dbname);
~TlmRecorder();
void recordMCconfig(string mcconfig)

View File

@@ -147,7 +147,7 @@ sc_time CheckerDDR3::delayToSatisfyConstraints(Command command, Bank bank)
{
reportFatal("CheckerDDR3", "Unknown command!");
}
// Check if bus is free
// Check if command bus is free
if (lastScheduled.isValidCommand())
minTimeToWait = std::max(minTimeToWait, lastScheduled.getStart() + memSpec->clk);

View File

@@ -112,13 +112,13 @@ void errorModel::init()
markBitFlips();
}
errorModel::errorModel(sc_module_name /*name*/, libDRAMPower *dp)
errorModel::errorModel(sc_module_name name, libDRAMPower *dp) : sc_module(name)
{
this->DRAMPower = dp;
init();
}
errorModel::errorModel(sc_module_name /*name*/)
errorModel::errorModel(sc_module_name name) : sc_module(name)
{
init();
}

View File

@@ -46,8 +46,8 @@
class errorModel : public sc_module
{
public:
errorModel(sc_module_name /*name*/, libDRAMPower *dp);
errorModel(sc_module_name /*name*/);
errorModel(sc_module_name, libDRAMPower *);
errorModel(sc_module_name);
~errorModel();
// Access Methods:

View File

@@ -40,7 +40,8 @@
using namespace std;
using namespace tlm;
Arbiter::Arbiter(sc_module_name /*name*/) : payloadEventQueue(this, &Arbiter::peqCallback)
Arbiter::Arbiter(sc_module_name name) :
sc_module(name), payloadEventQueue(this, &Arbiter::peqCallback)
{
// The arbiter communicates with one or more memory unity through one or more sockets (one or more memory channels).
// Each of the arbiter's initiator sockets is bound to a memory controller's target socket.

View File

@@ -63,9 +63,9 @@
using namespace std;
DRAMSys::DRAMSys(sc_module_name __attribute__((unused)) name,
DRAMSys::DRAMSys(sc_module_name name,
string simulationToRun,
string pathToResources) : tSocket("DRAMSys_tSocket")
string pathToResources) : sc_module(name), tSocket("DRAMSys_tSocket")
{
// Initialize ecc pointer
ecc = nullptr;
@@ -79,6 +79,7 @@ DRAMSys::DRAMSys(sc_module_name __attribute__((unused)) name,
string simconfig;
string thermalconfig;
// TODO: Setup never used?
Setup setup(simulationToRun,
memspec,
mcconfig,

View File

@@ -61,7 +61,7 @@ using namespace std;
using namespace tlm;
using namespace Data;
Dram::Dram(sc_module_name) : tSocket("socket")
Dram::Dram(sc_module_name name) : sc_module(name), tSocket("socket")
{
// Adjust number of bytes per burst dynamically to the selected ecc controller
bytesPerBurst = Configuration::getInstance()

View File

@@ -45,6 +45,7 @@ class DramDDR3 : public Dram
public:
DramDDR3(sc_module_name);
SC_HAS_PROCESS(DramDDR3);
virtual ~DramDDR3() {}
};
#endif // DRAMDDR3_H

View File

@@ -45,6 +45,7 @@ class DramDDR4 : public Dram
public:
DramDDR4(sc_module_name);
SC_HAS_PROCESS(DramDDR4);
virtual ~DramDDR4() {}
};
#endif // DRAMDDR4_H

View File

@@ -45,19 +45,17 @@
using namespace tlm;
template<class BaseDram>
class DramRecordable : public BaseDram
class DramRecordable final : public BaseDram
{
public:
DramRecordable(sc_module_name name, TlmRecorder *tlmRecorder);
DramRecordable(sc_module_name, TlmRecorder *);
SC_HAS_PROCESS(DramRecordable);
virtual ~DramRecordable();
protected:
virtual tlm_sync_enum nb_transport_fw(tlm_generic_payload &payload,
tlm_phase &phase, sc_time &delay);
~DramRecordable();
private:
tlm_sync_enum nb_transport_fw(tlm_generic_payload &payload,
tlm_phase &phase, sc_time &delay);
TlmRecorder *tlmRecorder;
sc_time powerWindowSize = Configuration::getInstance().memSpec->clk *
Configuration::getInstance().WindowSize;

View File

@@ -50,11 +50,11 @@ template<bool relative>
class StlPlayer : public TracePlayer
{
public:
StlPlayer(sc_module_name /*name*/,
StlPlayer(sc_module_name name,
string pathToTrace,
sc_time playerClk,
TracePlayerListener *listener) :
TracePlayer(listener),
TracePlayer(name, listener),
file(pathToTrace)
{
if (!file.is_open())

View File

@@ -46,8 +46,8 @@ using namespace tlm;
struct TraceGenerator : public TracePlayer
{
public:
TraceGenerator(sc_module_name /*name*/, unsigned int clkMhz,
TracePlayerListener *listener) : TracePlayer(listener), transCounter(0)
TraceGenerator(sc_module_name name, unsigned int clkMhz, TracePlayerListener *listener)
: TracePlayer(name, listener), transCounter(0)
{
if (clkMhz == 0)
clk = Configuration::getInstance().memSpec->clk;

View File

@@ -38,7 +38,8 @@
#include "TracePlayer.h"
TracePlayer::TracePlayer(TracePlayerListener *listener) :
TracePlayer::TracePlayer(sc_module_name name, TracePlayerListener *listener) :
sc_module(name),
payloadEventQueue(this, &TracePlayer::peqCallback),
numberOfTransactions(0),
transactionsSent(0),

View File

@@ -60,7 +60,7 @@ struct TracePlayer : public sc_module
{
public:
tlm_utils::simple_initiator_socket<TracePlayer> iSocket;
TracePlayer(TracePlayerListener *listener);
TracePlayer(sc_module_name name, TracePlayerListener *listener);
virtual void nextPayload() = 0;
unsigned int getNumberOfLines(string pathToTrace);