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New controller is working.

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This commit is contained in:
Lukas Steiner
2019-07-22 20:31:17 +02:00
parent f69771e7be
commit 6aa2533edd
4 changed files with 18 additions and 8 deletions
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4
DRAMSys/library/resources/configs/simulator/ddr3.xml
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@@ -1,7 +1,7 @@
<simconfig>
<SimulationName value="ddr3" />
<Debug value="1" />
<DatabaseRecording value="0" />
<Debug value="0" />
<DatabaseRecording value="1" />
<PowerAnalysis value="1" />
<EnableWindowing value = "1" />
<WindowSize value="1000" />

14
DRAMSys/library/src/controller/ControllerNew.cpp
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@@ -26,7 +26,6 @@ ControllerNew::ControllerNew(sc_module_name name, TlmRecorder *tlmRecorder) :
ControllerNew::~ControllerNew()
{
//tlmRecorder->closeConnection();
delete state;
delete checker;
for (auto it : bankMachines)
@@ -105,7 +104,7 @@ void ControllerNew::recordPhase(tlm_generic_payload &trans, tlm_phase phase, sc_
bg) + " bank " + to_string(bank) + " row " + to_string(row) + " column " +
to_string(col) + " at " + recTime.to_string());
//tlmRecorder->recordPhase(trans, phase, recTime);
tlmRecorder->recordPhase(trans, phase, recTime);
}
void ControllerNew::triggerEventAfterDelay(sc_time delay, string sender)
@@ -185,6 +184,7 @@ void ControllerNew::sendToFrontend()
payloadToRelease = responseQueue.front();
tlm_phase tPhase = BEGIN_RESP;
sc_time tDelay = SC_ZERO_TIME;
recordPhase(*payloadToRelease, tPhase, tDelay);
tSocket->nb_transport_bw(*payloadToRelease, tPhase, tDelay);
}
}
@@ -232,9 +232,19 @@ void ControllerNew::sendToDram(Command command, tlm_generic_payload *payload)
else if (command == Command::PRE)
phase = BEGIN_PRE;
else if (command == Command::RD)
{
phase = BEGIN_RD;
ScheduledCommand scheduledCommand = state->getLastCommand(command, bank);
TimeInterval dataStrobe = scheduledCommand.getIntervalOnDataStrobe();
tlmRecorder->updateDataStrobe(dataStrobe.start, dataStrobe.end, *payload);
}
else if (command == Command::WR)
{
phase = BEGIN_WR;
ScheduledCommand scheduledCommand = state->getLastCommand(command, bank);
TimeInterval dataStrobe = scheduledCommand.getIntervalOnDataStrobe();
tlmRecorder->updateDataStrobe(dataStrobe.start, dataStrobe.end, *payload);
}
else
SC_REPORT_FATAL("ControllerNew", "Unknown phase");

2
DRAMSys/library/src/simulation/DRAMSys.cpp
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@@ -259,7 +259,7 @@ void DRAMSys::instantiateModules(const string &traceName,
// controller = new Controller(str.c_str());
// controllers.push_back(controller);
ControllerNew *controller = new ControllerNew(str.c_str(), nullptr);
ControllerNew *controller = new ControllerNew(str.c_str(), tlmRecorders[i]);
newControllers.push_back(controller);
str = "dram" + std::to_string(i);

6
DRAMSys/library/src/simulation/DramRecordable.cpp
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@@ -50,14 +50,14 @@ DramRecordable<BaseDram>::DramRecordable(sc_module_name name, TlmRecorder *tlmRe
{
// Create a thread that is triggered every $powerWindowSize
// to generate a Power over Time plot in the Trace analyzer:
//SC_THREAD(powerWindow);
SC_THREAD(powerWindow);
}
template<class BaseDram>
DramRecordable<BaseDram>::~DramRecordable()
{
//this->DRAMPower->calcEnergy();
//recordPower();
this->DRAMPower->calcEnergy();
recordPower();
tlmRecorder->closeConnection();
}