Simulation is running to the end, results may still be wrong.

DRAMSys/library/resources/configs/simulator/ddr3.xml

@@ -1,7 +1,7 @@
 <simconfig>
     <SimulationName value="ddr3" />
     <Debug value="1" />
-    <DatabaseRecording value="1" />
+    <DatabaseRecording value="0" />
     <PowerAnalysis value="1" />
     <EnableWindowing value = "1" />
     <WindowSize value="1000" />

DRAMSys/library/src/controller/BankMachine.cpp

@@ -27,7 +27,7 @@ tlm_generic_payload *BankMachine::getNextStateAndResult()
             currentPayload = nullptr;
         }
         else
-            SC_REPORT_FATAL("BankMachine", "Wrong command!");
+            SC_REPORT_FATAL(("BankMachine " + bank.toString()).c_str(), "Wrong command!");
     }
     return payloadToReturn;
 }
@@ -75,6 +75,7 @@ void BankMachine::startBankMachine(sc_time minDelay)
             controller->triggerEventAfterDelay(delay, "startBankMachine 4");
             nextCommand = Command::PRE;
             timeToSchedule = sc_time_stamp() + delay;
+            currentRow = extension.getRow();
         }
     }
 }
@@ -99,5 +100,4 @@ void BankMachine::updateState(Command command)
         currentState = BmState::Writing;
     else
         SC_REPORT_FATAL("BankMachine", "Unknown phase");
-
 }

DRAMSys/library/src/controller/ControllerNew.cpp

@@ -26,7 +26,7 @@ ControllerNew::ControllerNew(sc_module_name name, TlmRecorder *tlmRecorder) :
 
 ControllerNew::~ControllerNew()
 {
-    tlmRecorder->closeConnection();
+    //tlmRecorder->closeConnection();
     delete state;
     delete checker;
     for (auto it : bankMachines)
@@ -38,7 +38,6 @@ ControllerNew::~ControllerNew()
 tlm_sync_enum ControllerNew::nb_transport_fw(tlm_generic_payload &trans,
                               tlm_phase &phase, sc_time &delay)
 {
-    std::cout << "Controller: " << sc_time_stamp() << std::endl;
     recordPhase(trans, phase, delay);
     sc_time notDelay = delay;
 
@@ -106,33 +105,38 @@ void ControllerNew::recordPhase(tlm_generic_payload &trans, tlm_phase phase, sc_
                           bg) + " bank " + to_string(bank) + " row " + to_string(row) + " column " +
                       to_string(col) + " at " + recTime.to_string());
 
-    tlmRecorder->recordPhase(trans, phase, recTime);
+    //tlmRecorder->recordPhase(trans, phase, recTime);
 }
 
 void ControllerNew::triggerEventAfterDelay(sc_time delay, string sender)
 {
-    std::cout << "Delay: " << delay << " by " + sender << std::endl;
     if (delay != SC_ZERO_TIME)
+    {
         triggerEvent.notify(delay);
+    }
 }
 
 void ControllerNew::triggerEventQueueAfterDelay(sc_time delay, string sender)
 {
-    std::cout << "Delayqueue: " << delay << " by " + sender << std::endl;
     if (delay != SC_ZERO_TIME)
+    {
         triggerEventQueue.notify(delay);
+    }
 }
 
 void ControllerNew::controllerMethod()
 {
-    std::cout << "ControllerMethod triggered at " << sc_time_stamp() << std::endl;
-    releasePayload();
-    acquirePayload();
-    getNextBmStates();
-    sendToFrontend();
-    startBankMachines();
-    commandMux->selectCommand();
-    restartBankMachines();
+    if (lastTimeCalled != sc_time_stamp())
+    {
+        lastTimeCalled = sc_time_stamp();
+        releasePayload();
+        acquirePayload();
+        getNextBmStates();
+        sendToFrontend();
+        startBankMachines();
+        commandMux->selectCommand();
+        restartBankMachines();
+    }
 }
 
 void ControllerNew::releasePayload()
@@ -179,7 +183,7 @@ void ControllerNew::sendToFrontend()
         if (!responseQueue.empty())
         {
             payloadToRelease = responseQueue.front();
-            tlm_phase tPhase = END_REQ;
+            tlm_phase tPhase = BEGIN_RESP;
             sc_time tDelay = SC_ZERO_TIME;
             tSocket->nb_transport_bw(*payloadToRelease, tPhase, tDelay);
         }
@@ -220,7 +224,6 @@ void ControllerNew::sendToDram(Command command, tlm_generic_payload *payload)
     state->change(scheduledCommand);
     Bank bank = scheduledCommand.getBank();
     bankMachines[bank]->updateState(command);
-    std::cout << sc_time_stamp() << ": Sending command " << commandToString(command) << " on bank " << bank.toString() << std::endl;
 
     sc_time delay = SC_ZERO_TIME;
     tlm_phase phase;

DRAMSys/library/src/controller/ControllerNew.h

@@ -73,6 +73,7 @@ private:
     void controllerMethod();
     sc_event triggerEvent;
     sc_event_queue triggerEventQueue;
+    sc_time lastTimeCalled = SC_ZERO_TIME;
 };
 
 #endif // CONTROLLERNEW_H

DRAMSys/library/src/simulation/DRAMSys.cpp

@@ -259,7 +259,7 @@ void DRAMSys::instantiateModules(const string &traceName,
 //            controller = new Controller(str.c_str());
 //        controllers.push_back(controller);
 
-        ControllerNew *controller = new ControllerNew(str.c_str(), tlmRecorders[i]);
+        ControllerNew *controller = new ControllerNew(str.c_str(), nullptr);
         newControllers.push_back(controller);
 
         str = "dram" + std::to_string(i);

DRAMSys/library/src/simulation/DramRecordable.cpp

@@ -50,14 +50,14 @@ DramRecordable<BaseDram>::DramRecordable(sc_module_name name, TlmRecorder *tlmRe
 {
     // Create a thread that is triggered every $powerWindowSize
     // to generate a Power over Time plot in the Trace analyzer:
-    SC_THREAD(powerWindow);
+    //SC_THREAD(powerWindow);
 }
 
 template<class BaseDram>
 DramRecordable<BaseDram>::~DramRecordable()
 {
-    this->DRAMPower->calcEnergy();
-    recordPower();
+    //this->DRAMPower->calcEnergy();
+    //recordPower();
     tlmRecorder->closeConnection();
 }