diff --git a/DRAMSys/library/resources/configs/simulator/ddr3.xml b/DRAMSys/library/resources/configs/simulator/ddr3.xml index 94bc52c6..1613737f 100644 --- a/DRAMSys/library/resources/configs/simulator/ddr3.xml +++ b/DRAMSys/library/resources/configs/simulator/ddr3.xml @@ -1,7 +1,7 @@ - - + + diff --git a/DRAMSys/library/src/controller/ControllerNew.cpp b/DRAMSys/library/src/controller/ControllerNew.cpp index 5e2f396c..3c591783 100644 --- a/DRAMSys/library/src/controller/ControllerNew.cpp +++ b/DRAMSys/library/src/controller/ControllerNew.cpp @@ -26,7 +26,6 @@ ControllerNew::ControllerNew(sc_module_name name, TlmRecorder *tlmRecorder) : ControllerNew::~ControllerNew() { - //tlmRecorder->closeConnection(); delete state; delete checker; for (auto it : bankMachines) @@ -105,7 +104,7 @@ void ControllerNew::recordPhase(tlm_generic_payload &trans, tlm_phase phase, sc_ bg) + " bank " + to_string(bank) + " row " + to_string(row) + " column " + to_string(col) + " at " + recTime.to_string()); - //tlmRecorder->recordPhase(trans, phase, recTime); + tlmRecorder->recordPhase(trans, phase, recTime); } void ControllerNew::triggerEventAfterDelay(sc_time delay, string sender) @@ -185,6 +184,7 @@ void ControllerNew::sendToFrontend() payloadToRelease = responseQueue.front(); tlm_phase tPhase = BEGIN_RESP; sc_time tDelay = SC_ZERO_TIME; + recordPhase(*payloadToRelease, tPhase, tDelay); tSocket->nb_transport_bw(*payloadToRelease, tPhase, tDelay); } } @@ -232,9 +232,19 @@ void ControllerNew::sendToDram(Command command, tlm_generic_payload *payload) else if (command == Command::PRE) phase = BEGIN_PRE; else if (command == Command::RD) + { phase = BEGIN_RD; + ScheduledCommand scheduledCommand = state->getLastCommand(command, bank); + TimeInterval dataStrobe = scheduledCommand.getIntervalOnDataStrobe(); + tlmRecorder->updateDataStrobe(dataStrobe.start, dataStrobe.end, *payload); + } else if (command == Command::WR) + { phase = BEGIN_WR; + ScheduledCommand scheduledCommand = state->getLastCommand(command, bank); + TimeInterval dataStrobe = scheduledCommand.getIntervalOnDataStrobe(); + tlmRecorder->updateDataStrobe(dataStrobe.start, dataStrobe.end, *payload); + } else SC_REPORT_FATAL("ControllerNew", "Unknown phase"); diff --git a/DRAMSys/library/src/simulation/DRAMSys.cpp b/DRAMSys/library/src/simulation/DRAMSys.cpp index 46ef928a..d4482924 100644 --- a/DRAMSys/library/src/simulation/DRAMSys.cpp +++ b/DRAMSys/library/src/simulation/DRAMSys.cpp @@ -259,7 +259,7 @@ void DRAMSys::instantiateModules(const string &traceName, // controller = new Controller(str.c_str()); // controllers.push_back(controller); - ControllerNew *controller = new ControllerNew(str.c_str(), nullptr); + ControllerNew *controller = new ControllerNew(str.c_str(), tlmRecorders[i]); newControllers.push_back(controller); str = "dram" + std::to_string(i); diff --git a/DRAMSys/library/src/simulation/DramRecordable.cpp b/DRAMSys/library/src/simulation/DramRecordable.cpp index 2dbe1800..0ed6f553 100644 --- a/DRAMSys/library/src/simulation/DramRecordable.cpp +++ b/DRAMSys/library/src/simulation/DramRecordable.cpp @@ -50,14 +50,14 @@ DramRecordable::DramRecordable(sc_module_name name, TlmRecorder *tlmRe { // Create a thread that is triggered every $powerWindowSize // to generate a Power over Time plot in the Trace analyzer: - //SC_THREAD(powerWindow); + SC_THREAD(powerWindow); } template DramRecordable::~DramRecordable() { - //this->DRAMPower->calcEnergy(); - //recordPower(); + this->DRAMPower->calcEnergy(); + recordPower(); tlmRecorder->closeConnection(); }