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gem5/src/arch/x86
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Gabe Black e05c6875a5 arch-x86,cpu: Override the int div latency local to x86. 
Remove the ISA check when selecting the default integer division latency
for O3. Instead, create a different default FUPool which is specific to
x86.

Change-Id: I1ef9ee94f4b16aebe03e043df5cdc6167efe6e64
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52497
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2022-09-02 10:20:51 +00:00
..
bare_metal
scons: Put all config variables in an env['CONF'] sub-dict.
2022-03-28 20:31:21 +00:00
bios
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
insts
arch: Minimize use of RegClassType constants and the RegId constructor.
2022-07-27 10:59:07 +00:00
isa
arch-x86: Fix gem5Op not writing to rax in time
2022-09-02 01:13:38 +00:00
kvm
arch,cpu: Distribute KVM checks and get rid of ISA switch statement.
2022-09-02 10:20:51 +00:00
linux
arch: Switch the generic register ABI over to use RegId.
2022-06-19 07:48:14 +00:00
regs
arch-x86: Implement RegClass flattening.
2022-08-09 09:18:12 +00:00
cpuid.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
cpuid.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
decoder_tables.cc
arch-x86: Fix the immediate size for the 0x9a one byte opcode.
2022-03-05 04:40:07 +00:00
decoder.cc
arch-x86: Don't decode SIB bytes in 32 bit mode.
2022-03-05 04:39:51 +00:00
decoder.hh
arch: Make the (read|set)MiscReg methods virtual.
2022-08-20 01:15:23 +00:00
emulenv.cc
arch: Minimize use of RegClassType constants and the RegId constructor.
2022-07-27 10:59:07 +00:00
emulenv.hh
arch-x86: Convert segment indices to fit the style guide.
2022-06-08 07:08:37 +00:00
faults.cc
arch: Minimize use of RegClassType constants and the RegId constructor.
2022-07-27 10:59:07 +00:00
faults.hh
arch-x86: Get rid of the soft int Fault class.
2022-03-11 22:49:50 +00:00
fs_workload.cc
arch-x86: Put misc reg indexes into a name space.
2022-06-08 07:09:05 +00:00
fs_workload.hh
arch-x86: Convert segment indices to fit the style guide.
2022-06-08 07:08:37 +00:00
interrupts.cc
arch-x86: Put misc reg indexes into a name space.
2022-06-08 07:09:05 +00:00
interrupts.hh
arch-x86: Implement the LINT0 pin for the LAPIC.
2022-03-12 04:22:48 +00:00
intmessage.hh
arch-x86,dev: Use INTA to get the vector for the IO APIC.
2022-03-12 04:22:48 +00:00
isa.cc
arch: Make the (read|set)MiscReg methods virtual.
2022-08-20 01:15:23 +00:00
isa.hh
arch: Make the (read|set)MiscReg methods virtual.
2022-08-20 01:15:23 +00:00
ldstflags.hh
arch-x86: Overhaul how address size is handled, particularly for stack.
2022-02-26 01:58:23 +00:00
memhelpers.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
microcode_rom.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
mmu.hh
arch: Make the MMU ranged translateFunction pure virtual.
2021-10-22 21:43:02 +00:00
nativetrace.cc
arch-x86: Rework float regs for getReg and setReg.
2022-06-08 07:09:32 +00:00
nativetrace.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
page_size.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
pagetable_walker.cc
arch-x86: Put misc reg indexes into a name space.
2022-06-08 07:09:05 +00:00
pagetable_walker.hh
misc: Move Mode and Translation from BaseTLB to BaseMMU
2021-07-07 08:44:13 +00:00
pagetable.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
pagetable.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
pcstate.hh
arch,cpu: Make branching() a virtual member of PCStateBase.
2021-11-30 23:30:06 +00:00
process.cc
arch-x86: Put misc reg indexes into a name space.
2022-06-08 07:09:05 +00:00
process.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
pseudo_inst_abi.hh
arch-x86: Stop using (read|set)IntReg.
2022-06-08 07:08:23 +00:00
remote_gdb.cc
arch-x86: Put misc reg indexes into a name space.
2022-06-08 07:09:05 +00:00
remote_gdb.hh
base: Correct checkBpLen naming with checkBpKind
2021-12-16 13:26:39 +00:00
SConscript
arch: Decentralize the arch tag TagImplies in arch/SConscript.
2022-09-02 10:20:51 +00:00
SConsopts
misc: Replace TARGET_ISA with USE_${ISA} variables.
2022-09-02 10:20:51 +00:00
se_workload.hh
arch-x86: Make x86 respect m5op_base in SE mode.
2022-01-15 12:27:19 +00:00
stacktrace.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
tlb.cc
arch-x86: Put misc reg indexes into a name space.
2022-06-08 07:09:05 +00:00
tlb.hh
misc: Move Mode and Translation from BaseTLB to BaseMMU
2021-07-07 08:44:13 +00:00
types.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
types.hh
arch-x86: Expose the current CPL to the decoder.
2022-03-27 00:55:44 +00:00
utility.cc
arch-x86: Rework CCRegs for getReg, setReg.
2022-06-08 07:09:18 +00:00
utility.hh
arch-x86: Put misc reg indexes into a name space.
2022-06-08 07:09:05 +00:00
x86_traits.hh
arch-x86,dev: Add an INTA like transaction for I8259.
2022-03-12 04:22:48 +00:00
X86CPU.py
arch-x86,cpu: Override the int div latency local to x86.
2022-09-02 10:20:51 +00:00
X86Decoder.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
X86FsWorkload.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
X86ISA.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
X86LocalApic.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
X86MMU.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
X86NativeTrace.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
X86SeWorkload.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
X86TLB.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00