arch-x86: Get rid of the soft int Fault class.
This was never instantiated, and not fully implemented. Change-Id: I2011e49345e48e194ed9f1540446f0f5a699401d Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/55689 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Gabe Black <gabe.black@gmail.com> Maintainer: Gabe Black <gabe.black@gmail.com>
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@@ -71,8 +71,7 @@ X86FaultBase::invoke(ThreadContext *tc, const StaticInstPtr &inst)
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HandyM5Reg m5reg = tc->readMiscRegNoEffect(MISCREG_M5_REG);
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MicroPC entry;
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if (m5reg.mode == LongMode) {
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entry = isSoft() ? extern_label_longModeSoftInterrupt :
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extern_label_longModeInterrupt;
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entry = extern_label_longModeInterrupt;
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} else {
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if (m5reg.submode == RealMode)
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entry = extern_label_realModeInterrupt;
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@@ -88,9 +87,6 @@ X86FaultBase::invoke(ThreadContext *tc, const StaticInstPtr &inst)
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panic("Legacy mode interrupts with error codes "
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"aren't implemented.");
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}
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// Software interrupts shouldn't have error codes. If one
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// does, there would need to be microcode to set it up.
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assert(!isSoft());
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tc->setIntReg(INTREG_MICRO(15), errorCode);
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}
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pc.upc(romMicroPC(entry));
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@@ -70,7 +70,6 @@ class X86FaultBase : public FaultBase
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const char *name() const override { return faultName; }
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virtual bool isBenign() { return true; }
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virtual const char *mnemonic() const { return mnem; }
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virtual bool isSoft() { return false; }
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void invoke(ThreadContext *tc, const StaticInstPtr &inst=
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nullStaticInstPtr) override;
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@@ -369,16 +368,6 @@ class StartupInterrupt : public X86Interrupt
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nullStaticInstPtr) override;
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};
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class SoftwareInterrupt : public X86Interrupt
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{
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public:
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SoftwareInterrupt(uint8_t _vector) :
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X86Interrupt("Software Interrupt", "#INTR", _vector)
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{}
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bool isSoft() override { return true; }
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};
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} // namespace X86ISA
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} // namespace gem5
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