arch-x86: Get rid of the soft int Fault class.

This was never instantiated, and not fully implemented.

Change-Id: I2011e49345e48e194ed9f1540446f0f5a699401d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/55689
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
This commit is contained in:
Gabe Black
2022-01-20 22:10:26 -08:00
parent ba82b56193
commit 0d1bca9e21
2 changed files with 1 additions and 16 deletions

View File

@@ -71,8 +71,7 @@ X86FaultBase::invoke(ThreadContext *tc, const StaticInstPtr &inst)
HandyM5Reg m5reg = tc->readMiscRegNoEffect(MISCREG_M5_REG);
MicroPC entry;
if (m5reg.mode == LongMode) {
entry = isSoft() ? extern_label_longModeSoftInterrupt :
extern_label_longModeInterrupt;
entry = extern_label_longModeInterrupt;
} else {
if (m5reg.submode == RealMode)
entry = extern_label_realModeInterrupt;
@@ -88,9 +87,6 @@ X86FaultBase::invoke(ThreadContext *tc, const StaticInstPtr &inst)
panic("Legacy mode interrupts with error codes "
"aren't implemented.");
}
// Software interrupts shouldn't have error codes. If one
// does, there would need to be microcode to set it up.
assert(!isSoft());
tc->setIntReg(INTREG_MICRO(15), errorCode);
}
pc.upc(romMicroPC(entry));

View File

@@ -70,7 +70,6 @@ class X86FaultBase : public FaultBase
const char *name() const override { return faultName; }
virtual bool isBenign() { return true; }
virtual const char *mnemonic() const { return mnem; }
virtual bool isSoft() { return false; }
void invoke(ThreadContext *tc, const StaticInstPtr &inst=
nullStaticInstPtr) override;
@@ -369,16 +368,6 @@ class StartupInterrupt : public X86Interrupt
nullStaticInstPtr) override;
};
class SoftwareInterrupt : public X86Interrupt
{
public:
SoftwareInterrupt(uint8_t _vector) :
X86Interrupt("Software Interrupt", "#INTR", _vector)
{}
bool isSoft() override { return true; }
};
} // namespace X86ISA
} // namespace gem5