VirtIO devices currently request their endianness from the System
object. Instead of explicitly querying the system for its endianness,
expose the device's endianness as a param. This param defaults to the
endianness of a parent object using the Parent proxy (in practice the
system).
Change-Id: If4f84ff61f4d064bdd015a881790f5af03de6535
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33296
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
There are cases where a system's byte order isn't well-defined from an
ISA. For example, Arm implementations can be either big or little
endian, sometimes depending on a boot parameter. Decouple the CPU byte
order from the System's default byte order by exposing the System's
byte order as a parameter that defaults to big endian for SPARC and
POWER and little endian for everything else.
Change-Id: I24f87ea3a61b05042ede20dea6bb056af071d2c0
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33175
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Either return types, brackets and the function body should all be on
their own line, or the entire function should be on a single line.
Consistently place the * or & up against the variable name and not the
type name. There isn't an official rule for which to use, but the
majority of existing uses were this way.
Add overrides for overridden virtual methods.
These fixes get rid of compiler warnings which are breaking the build
for me.
Change-Id: Ifc6ace4794a66ffd031ee686f6b6ef888004d786
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34216
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This has been in this file since it was created in 2009. No global "using
namespace ${NAMESPACE}" should ever appear in a .hh file since then that
namespace is "used" in all files that include the .hh, even if they
aren't aware of it or even actively don't want to.
Change-Id: Idb7d7c5b959077eb4905fbb2044aa55959b8f37f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34155
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
When isa_traits.hh hopefully goes away in the not too distant future,
this constant will need somewhere to live so ARM components can find it.
There are valid arguments that this should not be a constant in the
first place, but that's outside the scope of this change.
Change-Id: Ic5bd046dc1cc196b3cf6b6c36878fdbf5eb4c0bf
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34170
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
When a test is complete, the output files are in a random folder
in /tmp.
This commit adds a procedure copying those files to
testing-results/SuiteUID/TestUID/ folder, where SuiteUID and
TestUID are the corresponding uid's of the test.
This procedure is triggered after a test is complete and before
the folder in /tmp being removed.
Change-Id: Id960e7f2f1629769008ae99aff4c8bfafa9ca849
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33998
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Log object should remain being a singleton throughout the program.
The current code creates multiple Log objects, which at least
causes the issues of missing outputs in stdout.
E.g., "Logging call to command", which logs which command is
being called in a subprocess, is missing from stdout.
Change-Id: I96c5dd79c4f14e0a013c15d42d202397488d56b6
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33715
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Make the actual controller more generic
- Rename DRAMCtrl to MemCtrl
- Rename DRAMacket to MemPacket
- Rename dram_ctrl.cc to mem_ctrl.cc
- Rename dram_ctrl.hh to mem_ctrl.hh
- Create MemCtrl debug flag
Move the memory interface classes/functions to separate files
- mem_interface.cc
- mem_interface.hh
Change-Id: I1acba44c855776343e205e7733a7d8bbba92a82c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31654
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Add NVM interface to memory controller.
This can be used with or instead of the existing
DRAM interface. Therefore, a single controller can interface
to either DRAM or NVM, or both.
Specifically, a memory channel can be configured as:
- Memory controller interfacing to DRAM only
- Memory controller interfacing to NVM only
- Memory controller interfacing to both DRAM and NVM
How data is placed or migrated between media types is outside
of the scope of this change.
The NVM interface incorporates new static delay parameters
for read and write completion. The interface defines a 2
stage read to manage non-deterministic read delays while
enabling deterministic data transfer, similar to NVDIMM-P.
The NVM interface also includes parameters to define
read and write buffers on the media side (on-DIMM). These are
utilized to quickly offload commands and write data, mitigating
the effects of lower latency and bandwidth media characteristics.
Change-Id: I6b22ddb495877f88d161f0bd74ade32cc8fdcbcc
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/29027
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Wendy Elsasser <wendy.elsasser@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Made DRAMCtrl a ClockedObject, with DRAMInterface
defined as an AbstractMemory. The address
ranges are now defined per interface. Currently
the model only includes a DRAMInterface but this
can be expanded for other media types.
The controller object includes a parameter to the
interface, which is setup when gem5 is configured.
Change-Id: I6a368b845d574a713c7196c5671188ca8c1dc5e8
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/28968
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Separate out the DRAM specific functions into a new class:
- DRAMInterface
Move the Rank class to DRAMInterface since rank functions are
specific to the media.
Move DRAMPacket and Bank class definitions outside of DRAMCtrl.
This is patch 1 within a set of patches that separate the
memory controller and media interface. These changes enable
future incorporation of new media interfaces into the model.
Change-Id: Ief632d73ec27176a61f16b4f642c10d56630f376
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/28967
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
