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cpu-o3: convert rename to new style stats

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Change-Id: Id34a85e40ad7e83d5805a034df6e0c5ad9b9af82
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33397
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Emily Brickey
2020-08-25 14:11:47 -07:00
committed by Jason Lowe-Power
parent c68bce62a5
commit fc075a8bd2
3 changed files with 150 additions and 176 deletions
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1
src/cpu/o3/cpu.cc
View File

@@ -441,7 +441,6 @@ FullO3CPU<Impl>::regStats()
.precision(6);
totalIpc = sum(committedInsts) / numCycles;
this->rename.regStats();
this->iew.regStats();
intRegfileReads

104
src/cpu/o3/rename.hh
View File

@@ -133,9 +133,6 @@ class DefaultRename
/** Returns the name of rename. */
std::string name() const;
/** Registers statistics. */
void regStats();
/** Registers probes. */
void regProbePoints();
@@ -481,51 +478,62 @@ class DefaultRename
*/
inline void incrFullStat(const FullSource &source);
/** Stat for total number of cycles spent squashing. */
Stats::Scalar renameSquashCycles;
/** Stat for total number of cycles spent idle. */
Stats::Scalar renameIdleCycles;
/** Stat for total number of cycles spent blocking. */
Stats::Scalar renameBlockCycles;
/** Stat for total number of cycles spent stalling for a serializing inst. */
Stats::Scalar renameSerializeStallCycles;
/** Stat for total number of cycles spent running normally. */
Stats::Scalar renameRunCycles;
/** Stat for total number of cycles spent unblocking. */
Stats::Scalar renameUnblockCycles;
/** Stat for total number of renamed instructions. */
Stats::Scalar renameRenamedInsts;
/** Stat for total number of squashed instructions that rename discards. */
Stats::Scalar renameSquashedInsts;
/** Stat for total number of times that the ROB starts a stall in rename. */
Stats::Scalar renameROBFullEvents;
/** Stat for total number of times that the IQ starts a stall in rename. */
Stats::Scalar renameIQFullEvents;
/** Stat for total number of times that the LQ starts a stall in rename. */
Stats::Scalar renameLQFullEvents;
/** Stat for total number of times that the SQ starts a stall in rename. */
Stats::Scalar renameSQFullEvents;
/** Stat for total number of times that rename runs out of free registers
* to use to rename. */
Stats::Scalar renameFullRegistersEvents;
/** Stat for total number of renamed destination registers. */
Stats::Scalar renameRenamedOperands;
/** Stat for total number of source register rename lookups. */
Stats::Scalar renameRenameLookups;
Stats::Scalar intRenameLookups;
Stats::Scalar fpRenameLookups;
Stats::Scalar vecRenameLookups;
Stats::Scalar vecPredRenameLookups;
/** Stat for total number of committed renaming mappings. */
Stats::Scalar renameCommittedMaps;
/** Stat for total number of mappings that were undone due to a squash. */
Stats::Scalar renameUndoneMaps;
/** Number of serialize instructions handled. */
Stats::Scalar renamedSerializing;
/** Number of instructions marked as temporarily serializing. */
Stats::Scalar renamedTempSerializing;
/** Number of instructions inserted into skid buffers. */
Stats::Scalar renameSkidInsts;
struct RenameStats : public Stats::Group {
RenameStats(Stats::Group *parent);
/** Stat for total number of cycles spent squashing. */
Stats::Scalar squashCycles;
/** Stat for total number of cycles spent idle. */
Stats::Scalar idleCycles;
/** Stat for total number of cycles spent blocking. */
Stats::Scalar blockCycles;
/** Stat for total number of cycles spent stalling for a serializing
* inst. */
Stats::Scalar serializeStallCycles;
/** Stat for total number of cycles spent running normally. */
Stats::Scalar runCycles;
/** Stat for total number of cycles spent unblocking. */
Stats::Scalar unblockCycles;
/** Stat for total number of renamed instructions. */
Stats::Scalar renamedInsts;
/** Stat for total number of squashed instructions that rename
* discards. */
Stats::Scalar squashedInsts;
/** Stat for total number of times that the ROB starts a stall in
* rename. */
Stats::Scalar ROBFullEvents;
/** Stat for total number of times that the IQ starts a stall in
* rename. */
Stats::Scalar IQFullEvents;
/** Stat for total number of times that the LQ starts a stall in
* rename. */
Stats::Scalar LQFullEvents;
/** Stat for total number of times that the SQ starts a stall in
* rename. */
Stats::Scalar SQFullEvents;
/** Stat for total number of times that rename runs out of free
* registers to use to rename. */
Stats::Scalar fullRegistersEvents;
/** Stat for total number of renamed destination registers. */
Stats::Scalar renamedOperands;
/** Stat for total number of source register rename lookups. */
Stats::Scalar lookups;
Stats::Scalar intLookups;
Stats::Scalar fpLookups;
Stats::Scalar vecLookups;
Stats::Scalar vecPredLookups;
/** Stat for total number of committed renaming mappings. */
Stats::Scalar committedMaps;
/** Stat for total number of mappings that were undone due to a
* squash. */
Stats::Scalar undoneMaps;
/** Number of serialize instructions handled. */
Stats::Scalar serializing;
/** Number of instructions marked as temporarily serializing. */
Stats::Scalar tempSerializing;
/** Number of instructions inserted into skid buffers. */
Stats::Scalar skidInsts;
} stats;
};
#endif // __CPU_O3_RENAME_HH__

221
src/cpu/o3/rename_impl.hh
View File

@@ -63,7 +63,8 @@ DefaultRename<Impl>::DefaultRename(O3CPU *_cpu, DerivO3CPUParams *params)
commitToRenameDelay(params->commitToRenameDelay),
renameWidth(params->renameWidth),
commitWidth(params->commitWidth),
numThreads(params->numThreads)
numThreads(params->numThreads),
stats(_cpu)
{
if (renameWidth > Impl::MaxWidth)
fatal("renameWidth (%d) is larger than compiled limit (%d),\n"
@@ -94,108 +95,74 @@ DefaultRename<Impl>::name() const
}
template <class Impl>
void
DefaultRename<Impl>::regStats()
DefaultRename<Impl>::RenameStats::RenameStats(Stats::Group *parent)
: Stats::Group(parent, "rename"),
ADD_STAT(squashCycles, "Number of cycles rename is squashing"),
ADD_STAT(idleCycles, "Number of cycles rename is idle"),
ADD_STAT(blockCycles, "Number of cycles rename is blocking"),
ADD_STAT(serializeStallCycles, "count of cycles rename stalled"
"for serializing inst"),
ADD_STAT(runCycles, "Number of cycles rename is running"),
ADD_STAT(unblockCycles, "Number of cycles rename is unblocking"),
ADD_STAT(renamedInsts, "Number of instructions processed by"
" rename"),
ADD_STAT(squashedInsts, "Number of squashed instructions"
" processed by rename"),
ADD_STAT(ROBFullEvents, "Number of times rename has blocked"
" due to ROB full"),
ADD_STAT(IQFullEvents, "Number of times rename has blocked due"
" to IQ full"),
ADD_STAT(LQFullEvents, "Number of times rename has blocked due"
" to LQ full" ),
ADD_STAT(SQFullEvents, "Number of times rename has blocked due"
" to SQ full"),
ADD_STAT(fullRegistersEvents, "Number of times there has been no"
" free registers"),
ADD_STAT(renamedOperands, "Number of destination operands rename"
" has renamed"),
ADD_STAT(lookups, "Number of register rename lookups that"
" rename has made"),
ADD_STAT(intLookups, "Number of integer rename lookups"),
ADD_STAT(fpLookups, "Number of floating rename lookups"),
ADD_STAT(vecLookups, "Number of vector rename lookups"),
ADD_STAT(vecPredLookups, "Number of vector predicate rename"
" lookups"),
ADD_STAT(committedMaps, "Number of HB maps that are committed"),
ADD_STAT(undoneMaps, "Number of HB maps that are undone due to"
" squashing"),
ADD_STAT(serializing, "count of serializing insts renamed" ),
ADD_STAT(tempSerializing, "count of temporary serializing insts"
" renamed"),
ADD_STAT(skidInsts, "count of insts added to the skid buffer")
{
renameSquashCycles
.name(name() + ".SquashCycles")
.desc("Number of cycles rename is squashing")
.prereq(renameSquashCycles);
renameIdleCycles
.name(name() + ".IdleCycles")
.desc("Number of cycles rename is idle")
.prereq(renameIdleCycles);
renameBlockCycles
.name(name() + ".BlockCycles")
.desc("Number of cycles rename is blocking")
.prereq(renameBlockCycles);
renameSerializeStallCycles
.name(name() + ".serializeStallCycles")
.desc("count of cycles rename stalled for serializing inst")
.flags(Stats::total);
renameRunCycles
.name(name() + ".RunCycles")
.desc("Number of cycles rename is running")
.prereq(renameIdleCycles);
renameUnblockCycles
.name(name() + ".UnblockCycles")
.desc("Number of cycles rename is unblocking")
.prereq(renameUnblockCycles);
renameRenamedInsts
.name(name() + ".RenamedInsts")
.desc("Number of instructions processed by rename")
.prereq(renameRenamedInsts);
renameSquashedInsts
.name(name() + ".SquashedInsts")
.desc("Number of squashed instructions processed by rename")
.prereq(renameSquashedInsts);
renameROBFullEvents
.name(name() + ".ROBFullEvents")
.desc("Number of times rename has blocked due to ROB full")
.prereq(renameROBFullEvents);
renameIQFullEvents
.name(name() + ".IQFullEvents")
.desc("Number of times rename has blocked due to IQ full")
.prereq(renameIQFullEvents);
renameLQFullEvents
.name(name() + ".LQFullEvents")
.desc("Number of times rename has blocked due to LQ full")
.prereq(renameLQFullEvents);
renameSQFullEvents
.name(name() + ".SQFullEvents")
.desc("Number of times rename has blocked due to SQ full")
.prereq(renameSQFullEvents);
renameFullRegistersEvents
.name(name() + ".FullRegisterEvents")
.desc("Number of times there has been no free registers")
.prereq(renameFullRegistersEvents);
renameRenamedOperands
.name(name() + ".RenamedOperands")
.desc("Number of destination operands rename has renamed")
.prereq(renameRenamedOperands);
renameRenameLookups
.name(name() + ".RenameLookups")
.desc("Number of register rename lookups that rename has made")
.prereq(renameRenameLookups);
renameCommittedMaps
.name(name() + ".CommittedMaps")
.desc("Number of HB maps that are committed")
.prereq(renameCommittedMaps);
renameUndoneMaps
.name(name() + ".UndoneMaps")
.desc("Number of HB maps that are undone due to squashing")
.prereq(renameUndoneMaps);
renamedSerializing
.name(name() + ".serializingInsts")
.desc("count of serializing insts renamed")
.flags(Stats::total)
;
renamedTempSerializing
.name(name() + ".tempSerializingInsts")
.desc("count of temporary serializing insts renamed")
.flags(Stats::total)
;
renameSkidInsts
.name(name() + ".skidInsts")
.desc("count of insts added to the skid buffer")
.flags(Stats::total)
;
intRenameLookups
.name(name() + ".int_rename_lookups")
.desc("Number of integer rename lookups")
.prereq(intRenameLookups);
fpRenameLookups
.name(name() + ".fp_rename_lookups")
.desc("Number of floating rename lookups")
.prereq(fpRenameLookups);
vecRenameLookups
.name(name() + ".vec_rename_lookups")
.desc("Number of vector rename lookups")
.prereq(vecRenameLookups);
vecPredRenameLookups
.name(name() + ".vec_pred_rename_lookups")
.desc("Number of vector predicate rename lookups")
.prereq(vecPredRenameLookups);
squashCycles.prereq(squashCycles);
idleCycles.prereq(idleCycles);
blockCycles.prereq(blockCycles);
serializeStallCycles.flags(Stats::total);
runCycles.prereq(idleCycles);
unblockCycles.prereq(unblockCycles);
renamedInsts.prereq(renamedInsts);
squashedInsts.prereq(squashedInsts);
ROBFullEvents.prereq(ROBFullEvents);
IQFullEvents.prereq(IQFullEvents);
LQFullEvents.prereq(LQFullEvents);
SQFullEvents.prereq(SQFullEvents);
fullRegistersEvents.prereq(fullRegistersEvents);
renamedOperands.prereq(renamedOperands);
lookups.prereq(lookups);
intLookups.prereq(intLookups);
fpLookups.prereq(fpLookups);
vecLookups.prereq(vecLookups);
vecPredLookups.prereq(vecPredLookups);
committedMaps.prereq(committedMaps);
undoneMaps.prereq(undoneMaps);
serializing.flags(Stats::total);
tempSerializing.flags(Stats::total);
skidInsts.flags(Stats::total);
}
template <class Impl>
@@ -496,11 +463,11 @@ DefaultRename<Impl>::rename(bool &status_change, ThreadID tid)
// check if stall conditions have passed
if (renameStatus[tid] == Blocked) {
++renameBlockCycles;
++stats.blockCycles;
} else if (renameStatus[tid] == Squashing) {
++renameSquashCycles;
++stats.squashCycles;
} else if (renameStatus[tid] == SerializeStall) {
++renameSerializeStallCycles;
++stats.serializeStallCycles;
// If we are currently in SerializeStall and resumeSerialize
// was set, then that means that we are resuming serializing
// this cycle. Tell the previous stages to block.
@@ -555,12 +522,12 @@ DefaultRename<Impl>::renameInsts(ThreadID tid)
DPRINTF(Rename, "[tid:%i] Nothing to do, breaking out early.\n",
tid);
// Should I change status to idle?
++renameIdleCycles;
++stats.idleCycles;
return;
} else if (renameStatus[tid] == Unblocking) {
++renameUnblockCycles;
++stats.unblockCycles;
} else if (renameStatus[tid] == Running) {
++renameRunCycles;
++stats.runCycles;
}
// Will have to do a different calculation for the number of free
@@ -676,7 +643,7 @@ DefaultRename<Impl>::renameInsts(ThreadID tid)
"instruction %i with PC %s is squashed, skipping.\n",
tid, inst->seqNum, inst->pcState());
++renameSquashedInsts;
++stats.squashedInsts;
// Decrement how many instructions are available.
--insts_available;
@@ -702,7 +669,7 @@ DefaultRename<Impl>::renameInsts(ThreadID tid)
" lack of free physical registers to rename to.\n");
blockThisCycle = true;
insts_to_rename.push_front(inst);
++renameFullRegistersEvents;
++stats.fullRegistersEvents;
break;
}
@@ -722,10 +689,10 @@ DefaultRename<Impl>::renameInsts(ThreadID tid)
DPRINTF(Rename, "Serialize before instruction encountered.\n");
if (!inst->isTempSerializeBefore()) {
renamedSerializing++;
stats.serializing++;
inst->setSerializeHandled();
} else {
renamedTempSerializing++;
stats.tempSerializing++;
}
// Change status over to SerializeStall so that other stages know
@@ -741,7 +708,7 @@ DefaultRename<Impl>::renameInsts(ThreadID tid)
!inst->isSerializeHandled()) {
DPRINTF(Rename, "Serialize after instruction encountered.\n");
renamedSerializing++;
stats.serializing++;
inst->setSerializeHandled();
@@ -775,7 +742,7 @@ DefaultRename<Impl>::renameInsts(ThreadID tid)
}
instsInProgress[tid] += renamed_insts;
renameRenamedInsts += renamed_insts;
stats.renamedInsts += renamed_insts;
// If we wrote to the time buffer, record this.
if (toIEWIndex) {
@@ -810,7 +777,7 @@ DefaultRename<Impl>::skidInsert(ThreadID tid)
DPRINTF(Rename, "[tid:%i] Inserting [sn:%llu] PC: %s into Rename "
"skidBuffer\n", tid, inst->seqNum, inst->pcState());
++renameSkidInsts;
++stats.skidInsts;
skidBuffer[tid].push_back(inst);
}
@@ -999,7 +966,7 @@ DefaultRename<Impl>::doSquash(const InstSeqNum &squashed_seq_num, ThreadID tid)
historyBuffer[tid].erase(hb_it++);
++renameUndoneMaps;
++stats.undoneMaps;
}
// Check if we need to change vector renaming mode after squashing
@@ -1051,7 +1018,7 @@ DefaultRename<Impl>::removeFromHistory(InstSeqNum inst_seq_num, ThreadID tid)
freeList->addReg(hb_it->prevPhysReg);
}
++renameCommittedMaps;
++stats.committedMaps;
historyBuffer[tid].erase(hb_it--);
}
@@ -1074,17 +1041,17 @@ DefaultRename<Impl>::renameSrcRegs(const DynInstPtr &inst, ThreadID tid)
renamed_reg = map->lookup(tc->flattenRegId(src_reg));
switch (src_reg.classValue()) {
case IntRegClass:
intRenameLookups++;
stats.intLookups++;
break;
case FloatRegClass:
fpRenameLookups++;
stats.fpLookups++;
break;
case VecRegClass:
case VecElemClass:
vecRenameLookups++;
stats.vecLookups++;
break;
case VecPredRegClass:
vecPredRenameLookups++;
stats.vecPredLookups++;
break;
case CCRegClass:
case MiscRegClass:
@@ -1120,7 +1087,7 @@ DefaultRename<Impl>::renameSrcRegs(const DynInstPtr &inst, ThreadID tid)
renamed_reg->className());
}
++renameRenameLookups;
++stats.lookups;
}
}
@@ -1174,7 +1141,7 @@ DefaultRename<Impl>::renameDestRegs(const DynInstPtr &inst, ThreadID tid)
rename_result.first,
rename_result.second);
++renameRenamedOperands;
++stats.renamedOperands;
}
}
@@ -1444,16 +1411,16 @@ DefaultRename<Impl>::incrFullStat(const FullSource &source)
{
switch (source) {
case ROB:
++renameROBFullEvents;
++stats.ROBFullEvents;
break;
case IQ:
++renameIQFullEvents;
++stats.IQFullEvents;
break;
case LQ:
++renameLQFullEvents;
++stats.LQFullEvents;
break;
case SQ:
++renameSQFullEvents;
++stats.SQFullEvents;
break;
default:
panic("Rename full stall stat should be incremented for a reason!");