Commit Graph

16990 Commits

Author SHA1 Message Date
Gabe Black
c017caad88 scons: More narrowly target -Wno-self-assign.
This flag was necessary because of self assignments in the ISA parser
where self assignments are often hints to the parser itself, and in one
case because a pybind-ism used to attach the -= operator looked like a
self assignment.

This change narrows the scope of the flag that disables this warning to
only files generated by the ISA parser, and the single file in the
systemc code which uses that operator overload.

Change-Id: Ib64fc72e46f894cba9064afcdbdcc5859c30e745
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40952
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-04-03 05:52:24 +00:00
Gabe Black
64d71220d1 scons: Delete unnecessary imports from SConstruct.
Also get rid of the joinpath and splitpath aliases for os.path.join and
os.path.split. The aliases are only slightly shorter, and obscure these
extremely common python methods.

Change-Id: I0784e2d8dbaacb0690a59e9fa8c8258c1df0e6c3
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40874
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-04-03 05:51:35 +00:00
Kyle Roarty
c734ab7602 dev-hsa,gpu-compute: Fix override for updateHsaSignal
Change 965ad12 removed a parameter from the updateHsaSignal
function. Change 25e8a14 added the parameter back, but only for the
derived class, breaking the override. This patch adds that parameter
back to the base class, fixing the override.

Change-Id: Id1e96e29ca4be7f3ce244bac83a112e3250812d1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/44046
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Alex Dutu <alexandru.dutu@amd.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
2021-04-03 02:39:27 +00:00
Gabe Black
8ff1dd9c9b arch-arm: Use src/base/fenv.hh instead of raw fenv.h.
This provides a layer of indirection where the rounding mode
setting/getting code will do nothing if fenv.h isn't available. At build
time, if fenv.h can't be found, a warning is printed.

Also, the include for fenv.h was guarded in the includes in the ISA
header, but the functions from it weren't guarded in the actual code.

Finally, the code was setting the rounding mode, but not setting it
back. That would mean running these instructions would set the rounding
mode in gem5 as a whole, affecting its other behaviors and any other
instructions that might expect the default rounding mode.

Change-Id: Ic5cc32773652f423e66d78f31b80c6604f2c4a49
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41214
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2021-04-03 01:34:21 +00:00
Gabe Black
1791b8732c scons: Pull domain specific build setup out of SConstruct.
Use SConsopts files local to individual domains to pull
non-foundational build code out of SConstruct. This greatly simplifies
SConstruct, and also makes it easier to find build configuration having
to do with particular pieces of gem5.

This change also converts some python level variables, all_protocols,
protocol_dirs, and slicc_includes, into the environment where the timing
of their initialization is more flexible.

Change-Id: Ie61ceb75ae9e5557cc400603c972a9582e99c1ea
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40872
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
2021-04-03 01:18:17 +00:00
Jason Lowe-Power
91f4ea6683 python: Improve type annotations in pystats
This fixes some errors and warning when running mypy.

`gem5/src/python/m5/ext> mypy pystats`

There is one error that is ignored, which is a bug in mypy. See
https://github.com/python/mypy/issues/6040

Change-Id: I18b648c059da12bd30d612f0e265930b976f22b4
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42644
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-04-02 20:47:35 +00:00
Ayaz Akram
2dfa2ddc6f arch-riscv,util: update riscv crosstool-ng config and m5 README entry
Change-Id: I751a6c97a0ac97f7b3fce360577d0ee16f29fda4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/44032
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-04-02 20:45:12 +00:00
Kyle Roarty
df5ddabc03 gpu-compute: Fix scalar register ready check
Replaces some curly braces that were accidentally removed
causing the function to return false even when it shouldn't

Change-Id: I15fb4167468c8e3dd1107f1ca3dc98c48df4611b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/44045
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Reviewed-by: Alex Dutu <alexandru.dutu@amd.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-04-02 20:12:29 +00:00
Hoa Nguyen
e6b62c0252 configs: Make MemConfig.py compatible with Python3
Change-Id: I0c180fca18a19412348cbb90837825e7b6b544c6
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/44047
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-04-02 19:06:25 +00:00
Gabe Black
6d6fffe964 base: Generalize remote GDB query commands.
Dispatching qFoo style commands now use a lookup table instead of a
hand coded sequence of one off checks. It also splits the handling of
different queries into different functions.

Change-Id: I8f774760e856377c5cce90b23e57de6a7f828395
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/44028
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-04-02 15:39:42 +00:00
Gabe Black
451f731748 base: Fix the syntax of the remote GDB command implementations.
Since these are methods, they should be camel case, not underscores. The
command map should also be camel case.

Change-Id: Ie646a19b6e2fc022078722c67a11d370af4e84fe
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/44027
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-04-02 15:38:56 +00:00
Gabe Black
b60b2800ce arch-x86: Clean up tags used in the x87 decoder.
Don't use the "E" tag when there is only a register or memory based
version of the instruction, since that decodes to both. Don't special
case the "st(1)" version of an instruction if it's just a matter of the
assembly syntax and not the instruction encoding. Don't decode based on
Mod, and then use the tag type "E" which will again decode on Mod, use
"E" for both the memory and register versions at the same time. Set the
default instruction to Inst::UD2 so that we don't have to specify it as
the default locally in each decode block. Let the "M" tag handle the Mod
= 3 case, which is built into that operand type. That's slightly
inconsistent with the "R" type which does not handle the "not 3" case,
but we can take advantage of it none the less.

There are instructions which, when decoded as the Inst format, will take
the "M" type tag and be able to drop their decoding of the Mod = 3 case,
but since they aren't Inst right now and can't sub-decode Mod on their
own, the 3 case needs to stay for now.

In most cases when dealing with x87 registers, the "dataSize" argument
to microops doesn't matter since the size doesn't change. There may be
an opportunity to consolidate the various FP microops and use dataSize
= 10 for x87 registers, although there are some nuances there that may
make that not work out.

Change-Id: Ia3ff6176796af66f6a3c463b538e750e65893a84
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42904
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
2021-04-02 00:25:34 +00:00
Gabe Black
580b22fd00 sim,base: Get rid of the system/gdb "breakpoint" methods.
This unused pair of methods could be used to trigger a breakpoint within
the remote GDB stub, but was unused and would need to be called from an
instance of GDB attached to gem5 itself.

The system's version of breakpoint was also limitted in that it would
only cause a breakpoint in the first thread's GDB and no other.

Change-Id: I53ceab78667610177dbb8be1def3a88262befeec
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/44031
Reviewed-by: Boris Shingarov <shingarov@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-04-01 20:02:51 +00:00
Gabe Black
14b0d6cc05 base: Get rid of the unused "debuggers" vector in the remote GDB stub.
This was presumably there for debuggers attached to gem5 itself to
examine, but doesn't provide much value and adds a small amount of
complexity.

Change-Id: Iaed08b63beafe8bf05f1496f6341a7feadc350ce
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/44030
Reviewed-by: Boris Shingarov <shingarov@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-04-01 20:02:32 +00:00
Gabe Black
d8078f3665 base: Use the correct string size in BaseRemoteGDB::cmd_query_var.
The size of the command should be len, the length of the command string,
not len - 1. Looking at query strings shows that they were previously
being truncated by one character.

Change-Id: I283891eadafaa07d12453f085e8a106d59a4f889
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/44026
Reviewed-by: Boris Shingarov <shingarov@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-04-01 20:00:47 +00:00
Kyle Roarty
49f7565904 arch-vega: Update FLAT instructions to use offset
In Vega, flat instructions use an offset when
computing the address (section 9.4 of chapter 9
'Flat Memory Instructions' in Vega ISA manual).
This is different from the GCN3 baseline.

Change-Id: I9fe36f028014889ef566055458c451442403a289
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42213
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
2021-04-01 02:58:31 +00:00
Kyle Roarty
2bb8d6bc0c gpu-compute: remove index-based operand access
This commit removes functions that indexed into the
vectors that held the operands. Instead, for-each loops
are used, iterating through one of 6 vectors
(src, dst, srcScalar, srcVec, dstScalar, dstVec)
that all hold various (potentially overlapping)
combinations of the operands.

Change-Id: Ia3a857c8f6675be86c51ba2f77e3d85bfea9ffdb
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42212
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
2021-04-01 02:58:31 +00:00
Kyle Roarty
b40b361bee arch-vega, gpu-compute: Add vectors to hold op info
This removes the need for redundant functions like
isScalarRegister/isVectorRegister, as well as
isSrcOperand/isDstOperand. Also, the op info is only
generated once this way instead of every time it's needed.

Change-Id: I8af5080502ed08ed9107a441e2728828f86496f4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42211
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
2021-04-01 02:58:31 +00:00
Tony Gutierrez
0e2564a629 arch-gcn3, gpu-compute: Update getRegisterIndex() API
This change removes the GPUDynInstPtr argument from
getRegisterIndex(). The dynamic inst was only needed
to get access to its parent WF's state so it could
determine the number of scalar registers the wave was
allocated. However, we can simply pass the number of
scalar registers directly. This cuts down on shared
pointer usage.

Change-Id: I29ab8d9a3de1f8b82b820ef421fc653284567c65
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42210
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
2021-04-01 02:58:31 +00:00
Tony Gutierrez
236b4a502f gpu-compute: Add operand info class to GPUDynInst
This change adds a class that stores operand register info
for the GPUDynInst. The operand info is calculated when the
instruction object is created and stored for easy access
by the RF, etc.

Change-Id: I3cf267942e54fe60fcb4224d3b88da08a1a0226e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42209
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
2021-04-01 02:58:31 +00:00
Kyle Roarty
9ddfe09649 arch-vega: Add Vega-specific opcodes
The opcodes aren't implemented yet, returning nullptr

Change-Id: I700c2158035aea84e6365a32d53304accab59d96
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42208
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
2021-04-01 02:58:31 +00:00
Kyle Roarty
f85a861594 arch-vega: Order pointer functions by opcode
This makes it easier to add new ops

Change-Id: I2820005c42c87a1289aa87ddcdc5473ff0e57bd9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42207
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
2021-04-01 02:58:31 +00:00
Kyle Roarty
16548557ef arch-vega: Add decodings for Flat, Global, Scratch
Does not implement the functions yet

Change-Id: I32feab747b13bd2eff98983e3281c0d82e756221
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42206
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
2021-04-01 02:58:31 +00:00
Kyle Roarty
b30e9645d7 arch-vega: Update instruction encodings
This also renames VOP3 and VOP3_SDST_ENC to
VOP3A and VOP3B, matching the ISA.

Change-Id: I56f254433b1f3181d4ee6896f957a2256e3c7b29
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42205
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
2021-04-01 02:58:31 +00:00
Kyle Roarty
f7d4ff6ef5 arch-vega: Add Vega ISA as a copy of GCN3
This changeset adds Vega support as a copy of GCN3.
Configs have been modified to include both ISAs.
Current implementation is not complete and needs
modifications to fully comply with the ISA manual:

https://developer.amd.com/wp-content/resources/
Vega_Shader_ISA_28July2017.pdf

Change-Id: I608aa6747a45594f8e1bd7802da1883cf612168b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42204
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
2021-04-01 02:58:31 +00:00
Gabe Black
c7ee47efc9 arch-sparc: Move non-public values out of registers.hh.
Change-Id: If5f1c09b3988bc009821330ca128ff22a54c0e88
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41741
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
2021-04-01 00:24:31 +00:00
Gabe Black
124f82c109 arch-x86: Move (most) non-public values out of registers.hh.
The unnecessary DependenceTags is already being removed by another
pending change, and so is left in place for that to remove. Once that's
happened, the regs/*.hh includes can be removed, and there may be other
include related tangles to sort out.

Change-Id: I1c02aa8fd2f2045017609b70523b3519c2a92b03
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41742
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-03-31 21:30:28 +00:00
Gabe Black
376e6d99aa arch-mips: Pull non-public values out of registers.hh.
Change-Id: Ia15c75547e74bf2f784fac5b3063159e0c79a00c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41739
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
2021-03-31 21:01:32 +00:00
Gabe Black
92fe77320f arch-riscv: Clean up new FP code in arch/registers.hh.
Delete unused macros, turn macros into inline functions, simplify them,
comment them, replace custom sign extension with the bitfield.hh
version.

Change-Id: I5962c1f0ac62245385052082e5897e14e4b5adf1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41735
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
2021-03-31 20:57:55 +00:00
Gabe Black
8866d766ad dev,arch-x86: Simplify the relationship between the PC and SouthBridge.
The SouthBridge used to have a parameter to point back at a Platform
object which it would dynamically cast to the Pc platform type, and it
would use that to tell the Pc platform where it was. The Pc platform
would then configure initial values in the SouthBridge during the init
phase. Now, the Pc platform has a parameter which by default
instantiates a SouthBridge, so that it will have a pointer
automatically. The Pc object knows it will have a SouthBridge, and now
the SouthBridge no longer has to assume that it's housed inside a Pc
platform.

Also, the SouthBridge device had instantiated a lot of child objects,
and then to ensure that they were accessible in c++, they were also set
as parameters on the object. Now, these children are created as the
default value for those parameters. They no longer have to be declared
and then separately hooked up as parameters. They could also
theoretically be replaced more easily since they're now only defaults,
although in practice that's unlikely.

Change-Id: I296b18a55ab6aedbb609ca4f545f7b19c21fd905
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43886
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-03-31 20:56:34 +00:00
Gabe Black
68423ea20d mem: Ensure that RangeAddrMapper publishes its address range.
This class, because it inherits from AddrMapper, would only poke its
upstream port to let it know to request its address range if it's
downstream port had asked it to. This doesn't make sense, since the
RangeAddrMapper has a fixed range it will respond to. Also, when the
RangeAddrMapper is notified that it's downstream port has an updated
range, the mapper should request that range and make sure all of the
addresses it will output are in the range the other object expects.

Change-Id: I57b558644b103822a9af53733bdb8518836ef5de
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43346
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-03-31 20:54:38 +00:00
Alexander Klimov
34c82f7266 cpu: Improve MemTest
To make it easy to select memory sizes, make the base addresses
explicit parameters.

Change-Id: I337a10b539bf734c6f99f99eaa2daa252be5a9d2
Signed-off-by: Alexander Klimov <Alexander.Klimov@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43727
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-03-31 15:33:08 +00:00
Gabe Black
e0b4c2ee04 util: Add a logroll utility.
This utility receives input from stdin or a file, buffers up to "n"
lines of it, and prints those lines either when it reaches the end of
the file/stdin, or when it receives a SIGUSR1 which can be sent to it
using the "kill" utility. When it receives a SIGUSR1, it keeps running
and tracking the input.

Change-Id: I9eca4514378cf24a31002d37e10e58cc3ee63b5d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43266
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
2021-03-31 08:43:39 +00:00
Kelly Nguyen
ea47439ea4 mem: Unclear MemoryAccess debug message
This commit removes two excessive printf() arguments that were making
the output of the MemoryAccess debug flag unclear.

Jira issue: https://gem5.atlassian.net/browse/GEM5-892

Change-Id: I0317b22082d8cc0025d9f0038fd3599496f40896
Reported-by: Jinzheng Tu
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/39616
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
2021-03-30 23:51:03 +00:00
Kelly Nguyen
1ea867d0a2 python: Add JsonLoader to pystats
Allows for loading JSON files (e.g. m5out/stats.json) into the gem5
Python stats model.

Change-Id: I948dff0b23ea65c4c7acaac5e4fdf3795de1c0a7
Signed-off-by: Kelly Nguyen <klynguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43606
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-03-30 23:49:17 +00:00
Kelly Nguyen
447ba53133 python: Fix optional parameters with default None
Change-Id: I40c80c8fdd1384b3405e6b1c0b0b9f310580568d
Signed-off-by: Kelly Nguyen <klynguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43605
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2021-03-30 23:49:17 +00:00
Gabe Black
f201a95e2a dev: Fix style in the south bridge device.
Change-Id: I0d5b027c7ef18491147d7bd9d34db33edd438ca0
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43885
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-03-30 21:56:51 +00:00
Daniel R. Carvalho
3b8ffa5cca misc: Add a file to ignore revisions on git blame
Add the file .git-blame-ignore-revs to store the hash
of the commits that should be ignored on a git blame.
The commit hash should be added after the commit has
been merged. New hashes should be added as the first
line of the file.

Add some initial contents with commits that only fix
the style.

Usage example:

  git blame file.py --ignore-revs-file .git-blame-ignore-revs

To always ignore from this file on git blames:

  git config blame.ignoreRevsFile .git-blame-ignore-revs

Change-Id: Idd29cb933d4157f1650658acc7efc1bd142fa7c7
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43594
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-03-30 13:10:57 +00:00
Gabe Black
3f67faec83 arch,dev,gpu-compute,sim: Rename isa_traits.hh page_size.hh.
The only thing left in isa_traits.hh are two constants, one for the
number of bytes in a page, and one for how far to shift an address to
get the page number. To make it clear that this is the only thing
isa_traits.hh should be used for from this point forward (until it is
entirely eliminated), this change renames it to the much less generic
page_size.hh.

Also, because isa_traits.hh used to have *much* more stuff in it, it was
included in a lot of places it didn't need to be. This change also
clears out all these legacy includes while updating the actually needed
ones to the new name.

Change-Id: I939b01b117c53d620b6b0a98982f6f21dc2ada72
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40179
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-03-30 10:17:48 +00:00
Gabe Black
936d3df090 x86: Minor cleanup of the ISA class.
Remove namespace indentation, get rid of some unnecessary includes and
class prototypes, and make members consistently private.

Change-Id: If8e6375bf664c125f6776de62aefe44923f73c2e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41893
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
2021-03-30 07:43:57 +00:00
Gabe Black
bc85116a46 scons: Eliminate the redundant "--colors" scons command line option.
The default behavior already is to add color to the output. The option
had an action of 'store_true' which would normally set the default value
to False, but the --no-colors option immediately after it had the action
'store_false' which apparently set the common dest 'use_colors' to True
by default. The net effect was that the --colors option did nothing.

Change-Id: I6d6473f85921f90bb629ecb32a0f0f81c02d7914
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40875
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
2021-03-30 05:06:21 +00:00
Gabe Black
e18f59c0d6 scons,gpu: Use a config header for the BUILD_GPU setting.
The BUILD_GPU setting was being set by adding a -D to the command line
at the top level SConstruct. Instead, add BUILD_GPU to export_vars so
that it ends up in a config/build_gpu.hh header. Also switch it from the
fairly dangerous #ifdef style to the safer #if.

Change-Id: Ic93d37c9d7671023a6978842dbb2750c3e92f8d8
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40873
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-03-30 05:05:50 +00:00
Kyle Roarty
de134bae21 arch-gcn3: Modify directory structure as prep for adding vega isa
Change-Id: I7c5f4a3a9d82ca4550e833dec2cd576dbe333627
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42203
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
2021-03-29 21:21:35 +00:00
Gabe Black
26c62ae563 dev: Remove cruft from the Platform devices.
These bits of cruft are unnecessary includes, unnecessary declarations
of classes which aren't used, and methods which aren't used, and are
also frequently not implemented.

Change-Id: I3df6d60983354bb545bc11880fb6e16fe74adb1d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43665
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-03-29 21:10:30 +00:00
Gabe Black
5f95d7a89a dev,cpu,configs: Get rid of the IntrControl device.
This vestigial device provides a thin layer of indirection between
devices and the CPUs in a system. It's basically a collection of helper
functions, but since it's a SimObject it needs to be instantiated in
python and added to configurations.

Change-Id: I029d2314ae0bb890678e1e68dafcdab4bfe49beb
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43347
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-03-29 20:54:16 +00:00
Giacomo Travaglini
fc9b1b5089 util: Stop providing support for linux-arm-legacy
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Change-Id: I758f66c9fe957eab4ed0867e46937ed265f42f06
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43745
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-03-26 21:23:45 +00:00
Giacomo Travaglini
de3fc08731 configs: Fix signature in GPU_VIPER and Garnet_standalone
This was broken by:

https://gem5-review.googlesource.com/c/public/gem5/+/43287

Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Change-Id: I0ac64cfe64cefd6c6ad8a9e7d00def00ee967136
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43746
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-03-26 21:23:30 +00:00
Bobby R. Bruce
cbdc3c4fe1 misc: Update version to "DEVELOP-FOR-V21.1"
Change-Id: I8a0812bddabd7f124adab857cd39720e97a0bf48
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43647
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-03-26 18:21:34 +00:00
Bobby R. Bruce
1b60b7af81 scons: revert removal of -Werror for gem5 21.0
This reverts:
https://gem5-review.googlesource.com/c/public/gem5/+/43425

Change-Id: Ic239150a7f2968744e40df40a6c03a942dc41ea6
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43646
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-03-26 18:21:34 +00:00
Bobby R. Bruce
a68adcfad5 Merge "misc: Merge branch v21.0.0.0 into develop" into develop 2021-03-26 18:21:34 +00:00