Commit Graph

16791 Commits

Author SHA1 Message Date
Gabe Black
69ed25971d scons: Eliminate CXX_V and main_dict_keys in SConstruct.
CXX_V isn't used by anything, and main_dict_keys is unnecessary because
using "in" with the whole main environment (which acts like a dict)
checks against the keys without needing a temporary variable.

Change-Id: Iab07246c00b1969858659043cead1dd657b1707b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40963
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2021-02-24 06:27:28 +00:00
Gabe Black
dbe295ab95 scons: Remove an extraneous Exit().
This isn't necessary after error() which exits on its own.

Change-Id: Icad08c1badc73fa8f41013cc69d6cc5a96ff8fdb
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40961
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-02-24 06:27:28 +00:00
Gabe Black
41ccb6099b scons: Use SCons' built in CXXVERSION instead of detecting our own.
It's not guaranteed that every compiler will set CXXVERSION, but both
gcc and clang do, and for any check of CXXVERSION to be meaningful, we
have to first check which compiler we're talking about.

Change-Id: Icd15e12832920fec6fa8634bc0fde16cc48e3f41
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41596
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-02-24 06:27:28 +00:00
Gabe Black
978bd8759a scons: Enable the clang++ and clang tools.
If these tools aren't enabled and CXX isn't set, scons will look for
generically named compiler aliases like cc and c++. These will generally
work, but if scons knows that the compiler is specifically clang, it
will set the CXXCONFIG variable we can use to do compiler version
checking.

Because scons blindly forces a tool into use if you specify it, we need
to use the FindTool method which will check a list of tools and add the
first one that it actually finds.

Change-Id: Ie6bebb8eab531989575c878bee07189541756d2c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41673
Reviewed-by: Earl Ou <shunhsingou@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-24 06:27:28 +00:00
Kevin Loughlin
b05731f927 arch-x86: Adds rdtscp flag to cpuid for X86KvmCPU
The rdtscp instruction is supported by gem5, so the X86KvmCPU
cpuid flags should be updated accordingly. Otherwise, KVM
needlessly crashes upon executing rdtscp.

Change-Id: If79017e60cbdf0757e929f07e56dba64322846bb
Signed-off-by: Kevin Loughlin <kevlough@umich.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41633
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-23 15:34:18 +00:00
Giacomo Travaglini
57bdbe3b7d dev-arm: Remove the A9GlobalTimer
This is not used anymore

Change-Id: Ia25921cfe47e7f6b895450031abb740f94dc032d
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31937
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-23 09:22:47 +00:00
Gabe Black
4d0b56d679 scons: Check for "make" when using LTO with gcc.
gcc uses "make" to parallelize LTO. If we're using gcc and make isn't
found, we have to use single threaded LTO instead. A warning will let
the user know what's happening and that they might want to correct the
situation.

Technically gcc can use the MAKE environment variable to override the
program it uses, although I assume it still has to be "make" compatible.
Given the fairly low likelihood that someone will need that override and
the fact that scons won't pipe that variable through unless we plumb it
up, we'll just ignore that for now.

Change-Id: I891b213ece2a75bd8a915ee91f4130458dab397b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41773
Reviewed-by: Earl Ou <shunhsingou@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-23 07:52:40 +00:00
Peter Yuen
b5962abb3d arch-riscv: FS Linux config file for RISC-V
This file is added to provide a clean starter for RISC-V FS Linux
configuration.

Change-Id: Ifd401761be86758340f26edd00a5ab1ca51e6938
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41033
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Ayaz Akram <yazakram@ucdavis.edu>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2021-02-23 03:43:47 +00:00
Peter
69eb60d87e arch-riscv: RISC-V HiFive Platform implementation
This patch implements the RISC-V HiFive Platform
(based on the SiFive HiFive series). The HiFive
platform requires a PLIC and CLINT device (based on
current HiFive boards).

The optional uart_int_id field redirects Console interrupts
to the PLIC interrupt controller.

PlicDevice is a wrapper around BasicPioDevice that
requires an interrupt ID. Interrupts are expected to
be raised via platform->postPciInterrupt(id).

VirtIOMMIO is a slight modification from the ARM
implementation such that interrupts are posted through
PLIC

PlicDevice is a wrapper around BasicPioDevice that
requires an interrupt ID. Interrupts are expected to
be raised via platform->postPciInterrupt(id).

VirtIOMMIO is a slight modification from the ARM
implementation such that interrupts are posted through
PLIC.

Uart8250 was modified slightly for easier Python
setup.

Change-Id: I4bbdb5f903b52a41d1b7e0ccc44877c46cd30d56
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40599
Reviewed-by: Ayaz Akram <yazakram@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2021-02-23 03:43:47 +00:00
Peter
de06ab35ef arch-riscv: PLIC Implementation
This patch contains the implementation for the RISC-V PLIC.
The PLIC Memory Map is based on the SiFive U54MC datasheet.
The PLIC models a 3-cycle latency as stated in the RISC-V
specs.

Change-Id: I571c7bd3bd2918c92e4f207a1b57cf9d06e9c72f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40598
Reviewed-by: Ayaz Akram <yazakram@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2021-02-23 03:43:47 +00:00
Peter
4cca1d89e8 arch-riscv: Implementation of CLINT
This patch implements the CLINT device model based
on the SiFive U54MC datasheet. CLINT is modelled to
receive its clock signal via an interrupt pin. A
generic RTC (non-MMIO) is also implemented to provide
this signal at arbitrary frequencies.

isa.cc is also modified to provide a correct implementation
of the rdtime instruction. It will read from the miscreg
file (which is updated by CLINT every time mtime is
incremented).

Change-Id: I6f5393f3a8fdbd059f25df51d3d74bcb28da09f1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40597
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Ayaz Akram <yazakram@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2021-02-23 03:43:47 +00:00
Peter
061a6bd219 arch-riscv: Added PMA support for RiscvTLB
Since the RISC-V privileged specs V1.11 did not specify
an implementation of physical memory attributes (PMA), e.g.
cacheability, an abstract PMAChecker class is created. This
class acts as a generic PMAChecker hardware without any
latency modelling.

The TLB finds the PMAChecker defined at the MMU level by
Parent.any.

Change-Id: I4400133895be44da67536d80b82422ec3a49d786
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40596
Reviewed-by: Ayaz Akram <yazakram@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-23 03:43:47 +00:00
Peter
3a0c3aecaf arch-riscv: Fixing interrupt handling order and effect of mideleg
This patch fixes the issues listed in:
https://gem5.atlassian.net/browse/GEM5-887
https://gem5.atlassian.net/browse/GEM5-889

The code change has been verified by booting FS linux.
Software, timer and external interrupts work as expected.

Change-Id: I6ce4fc843d2e0338355152c3fc33c966d6b4a481
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40076
Reviewed-by: Ayaz Akram <yazakram@ucdavis.edu>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-23 03:43:47 +00:00
Gabe Black
d32c140bde arch,cpu: Move the inUserMode function to the ISA object.
This function is used when tracing execution with --debug-flags=Exec.
The data used by the function (now method) is stored in the ISA object,
and so that's a logical place to move it.

Change-Id: I624f9365124679343e988cabfb4e1929225b439a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/39323
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-21 10:19:18 +00:00
Bobby R. Bruce
f69811ad20 base-stats,python: Update PyBind11 ScalarInfo fields to readonly
This change keeps the ScalarInfo class consistent with the other Info
classes exposed via PyBind11.

Change-Id: I4d420d509e4654de844e75f58aeaaf67109775d3
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41693
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-20 06:27:27 +00:00
Bobby R. Bruce
4dc66b03f1 base-stats,python: Expose FormulaInfo via PyBind11
Change-Id: If7d3e7a386e138d5f4e05bb1ec4b920d6caef836
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/39300
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-20 06:27:27 +00:00
Bobby R. Bruce
10cccabd15 base-stats,python: Expose VectorInfo via Pybind11
Change-Id: Iba5fd1dfd1e4c35f01bf4a6fc28481c1be3dd028
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/39299
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-20 06:27:27 +00:00
Bobby R. Bruce
45b37b7eff base-stats,python: Expose DistInfo via Pybind11
Change-Id: If3ac9a0da52b929559e3cde3c2bab95b59ab16ce
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/39298
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-20 06:27:27 +00:00
Giacomo Travaglini
41928dac80 misc: Remove unused params() definitions
Lots of times the params() helper has been defined but not used

Change-Id: Id71829aca71341d46964d8f071099342b946b62f
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41613
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-19 23:27:34 +00:00
Alexander Klimov
92ba3ba843 misc: Use PARAMS
The patch is using the newly defined PARAMS macro to replace
custom params() getters in derived class.

The patch is also removing redundant _params:
Instead of creating yet another _params field, SimObject descendants
should use params() to expose the real type of SimObject::_params they
already have.

Change-Id: I43394cebb9661fe747bdbb332236f0f0181b3dba
Signed-off-by: Alexander Klimov <Alexander.Klimov@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/39900
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-19 23:27:34 +00:00
Gabe Black
c8a2114df2 arch: Eliminate the getArgument function.
This ISA switched function is no longer used. Eliminate it, and reduce
the number of functions used in the switched utility.hh header by one.

Change-Id: Ic6020c5fa6d976d9dbf1e9f517809acf9b0b7cd8
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/39321
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-19 22:08:52 +00:00
Daniel R. Carvalho
6c32f9e521 base: Remove hostname from hostinfo
This function is not used anywhere.

In addition, gethostname uses a fixed host name, and
sethostname is not implemented (sim/syscall_emul). If
we were to handle sethostname too it would require a
special conjoint implementation anyway.

Change-Id: I20919a49b123a6a49582d9cfacf1fd167cb44776
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41394
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-19 16:41:09 +00:00
Daniel R. Carvalho
eb76992dad base: Clean up base/hostinfo
General fixes to the style of base/hostinfo.(cc|hh).

Remove unnecessary includes.

Remove signature of private functions from header.

Add documentation.

Remove unnecessary include in sim_events.cc.

Change-Id: I54e1f13231e512d26cf0127cc80256fb5e91bf91
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41393
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-19 16:40:22 +00:00
Daniel R. Carvalho
7ca5ed70e6 base: Fix scientific number conversion in base/str
Previously converting scientific numbers to non-floating
numbers would yield incorrect results, because the
underlying conversion was using stoll and stoull, which
do not deal with scientific numbers properly. Therefore,
converting to_number("8.234e+08", val) would yield
val=8, which is blatantly wrong (expected 823400000).

This was fixed by searching for "e" within the string to
be converted.

To make sure all double and scientific number conversions
are correct, a few extra tests were added.

Change-Id: I6a9599d8473909d274326b6f8c268e3603044ab4
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38775
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-19 16:39:35 +00:00
Gabe Black
9d04b1b4e6 arm,kern: Stop using the getArgument function for kernel events.
This change plumbs through an ABI to use with the GuestABI mechanism so
that the ISA switched getArgument function is no longer used.

Change-Id: I0d394dcfd7ad6fa745b6ef2aa62973167108f0c3
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/39320
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-19 16:38:33 +00:00
Tiago Mück
8633802c3e mem-ruby: alternative interface for func. reads
A single functionalRead may not be able to get the whole latest
copy of the block in protocols that have features such as:

- a cache line can be partially present and dirty in a controller
- a cache line can be transferred over the network using multiple
  protocol-level messages

To support these cases, this patch adds an alternative function:

bool functionalRead(PacketPtr, WriteMask&)

Protocols that implement this function can partially update
the packet and use the WriteMask to mark updated bytes.
The top-level RubySystem:functionalRead then issues functionalRead
to controllers until the whole block is read.
This patch implements functionalRead(PacketPtr, WriteMask&) for all the
common messages and SimpleNetwork. A protocol-specific implementation
will be provided in a future patch.

The new interface is compiled only if required by the protocol (see
src/mem/ruby/system/SConscript). Otherwise the original interface is
used thus maintaining compatibility with previous protocols.

Change-Id: I4600d5f1d7cc170bd7b09ccd09bfd3bb6605f86b
Signed-off-by: Tiago Mück <tiago.muck@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31416
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-19 15:05:10 +00:00
Tiago Mück
3fb6492482 mem-ruby: extended transaction profiling
Adds additional stats to accounts for incoming and outgoing retries.

Calling incomingTransactionStart with retried==true indicates the
received request initiating the transaction is a retried request.

Calling outgoingTransactionEnd with retried==true indicates the request
was retried by the requester.

Change-Id: I22fd971d4997fce0c114b5ec030cbbf9b463d0c6
Signed-off-by: Tiago Mück <tiago.muck@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41158
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-19 15:05:10 +00:00
Gabe Black
cd8a278ec6 arch,cpu: Move getExecutingAsid to the ISA class.
This function was switched based on the ISA, and returned 0 on
everything except SPARC and ARM. It was used only when tracing
instruction execution with --debug-flags=Exec.

Change-Id: I70c274cb76fb229d0e2bc606ba41f458ed18ab81
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/39322
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
2021-02-19 12:11:24 +00:00
Giacomo Travaglini
dd6801f75c base: Remove duplicate isPow2 helper
This is already defined as isPowerOf2 in src/base/intmath.hh and it
is currently unused

Change-Id: I50b5d344e234fe1d4f1f85186686440773a209e3
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41533
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-19 11:27:13 +00:00
Alexander Klimov
6b23ef320a base: Exclude the end of ChannelAddrRange
Since [1] has changed the end of AddrRange to be excluded from the
range, we need to do the same for ChannelAddrRange.

[1] Idd1e75d5771d198c4b8142b28de0f3a6e9007a52

Change-Id: I901a03409f2204a502133a1d763d8112b1d08f8f
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41653
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-19 10:33:40 +00:00
Bjoern A. Zeeb
2334689b57 arch-arm,sim: make compile on FreeBSD
Add missing #include / #define to make at least X86 and ARM gem5.opt
compile again on FreeBSD.

Change-Id: I3faa1437fe7175f3b8174c6f0b6a4c42b6396370
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41295
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2021-02-19 09:53:36 +00:00
Gabe Black
9a0b79459d misc: Fix mismatched struct/class "tags" and reenable that warning.
The mismatches were from places where Params structs had been declared
as classes instead of structs, and ruby's MachineID struct.

A comment describing why the warning had been disabled said that it was
because of libstdc++ version 4.8. As far as I can tell, that version is
old enough to be outside the window we support, and so that should no
longer be a problem. It looks like the oldest version of gcc we
support, 5.0, corresponds with approximately libstdc++ version 6.0.21.

https://gcc.gnu.org/onlinedocs/libstdc++/manual/abi.html#abi.versioning

Change-Id: I75ad92f3723a1883bd47e3919c5572a353344047
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40953
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-19 08:29:00 +00:00
Gabe Black
55a3e35388 cpu,mem: Add or remove parenthesis to make the compiler happy.
Remove extraneous parenthesis in an if condition, and add some
parenthesis where an assignment was being used as a condition in a while
loop.

Change-Id: Ie12c74ac681ef042138e3b41f257ea1bb2ce4267
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40956
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-19 04:43:54 +00:00
kai.ren
28564ef315 arch-riscv: Using Softfloat Library to implements float operation
The Riscv float instruction could not pass riscv-tests. This patch
use Softfloat Library interface to implements float operation. The
riscv-tests float instruction tests now pass.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-373

Change-Id: I2c95af8161a8d3f92c933aa82d797db5adebc574
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/39735
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-19 02:26:43 +00:00
kai.ren
3a9d0de609 ext: Add SoftFloat Library to ext directory
This patch adds Softfloat library for supporting RISCV
float operation implement.

Using SoftFloat Package to reinplement Riscv FPops.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-373

Change-Id: Ic96e6c8adec0713bdbd744d581c750034b88246c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/39357
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-19 02:26:13 +00:00
Gabe Black
d07fd9667e base: Introduce a version of reverseBits for 8 bit types.
These types shouldn't be shifted by 8, since shifting a type by its
width is technically undefined behavior. We never actually use the
result from this shift, but it still upsets certain versions of clang.

Change-Id: I425431473fa44a6e0de2edf780c265ff4e3f440e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41593
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-18 23:44:03 +00:00
Gabe Black
e12fc34bd1 scons: Move imports below version checks in site_init.py.
Without knowing for sure we're using python 3, it's dangerous to start
pulling in code which may make that assumption.

Change-Id: Ic13af74a686ee0fb8f36bb672beadea4334b431c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40966
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2021-02-18 23:39:55 +00:00
Gabe Black
3c23c3f075 cpu: Use std::abs() in traffic_gen.cc.
When building with clang with the --without-tcmalloc flag set, the
-fno-builtin flag is not used, and clang can then detect that the
integer version of abs(), apparently the C version, is being used on a
floating point value in traffic_gen.cc.

This change takes clang's suggestion to use std::abs instead, and also
includes a header file which will provide it.

Change-Id: Ic28ed7454b2ac00c89328d9d0314aed74e946643
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41597
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-18 23:38:32 +00:00
Gabe Black
11f0fe0283 scons,systemc: Drop the check for gcc version when building systemc.
The minimum version of gcc is 5, and the check would only fail if gcc
was older than that.

Change-Id: I20f4f42661baf415b7cbe80ec0ace4e427666348
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41595
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2021-02-18 23:38:10 +00:00
Alexander Klimov
d90461d067 sim: Define PARAMS macro utility
To reduce code duplication and to ensure that the result of [1] will not
deteriorate, define a macro to be used in every descendant of SimObject
that needs its own params().

[1] 91d83cc8a1

Change-Id: I1a1a0dedf91ae228ea27b8ed324577ee3439ea68
Signed-off-by: Alexander Klimov <Alexander.Klimov@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/39898
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-18 09:58:48 +00:00
Gabe Black
a0b5b999b0 scons: Enable LTO for opt, perf and prof builds.
The name of the build is opt, so it should be fully optomized. Also, the
fast build, the only one with LTO historically, is dangerous to use
since it disables many error checks. I personally run gem5 many times
while developing, iterating and trying to fix bugs, and so want it to
run quickly then too, not just the final time when collecting results.

Also, since they mirror the opt build, the perf and prof builds also
have LTO options added.

This has the nice side effect of speeding up the build time of build/X86
significantly (6:20 -> 4:27) due to parallelization of the link, and
reduces the size of the build/X86 directory (with debug compression
enabled) from 3.4GB to 2.8GB.

The size of build/X86/python/_m5 is still 1.6GB, so still more than half
of the total size of build/X86.

Change-Id: I8feabf99454693fdd100d9e1a64fdeae53362f75
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40815
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Earl Ou <shunhsingou@google.com>
2021-02-18 02:28:36 +00:00
Gabe Black
96a8073212 base: Clean up style in bitfield.(hh|cc|test.cc).
Fix pure style issues, convert bit indices to unsigned, and add
constexpr to most functions. constexpr will allow these functions to be
used to calculate constants at compile time like template parameters or
fixed constants.

Change-Id: Ic98a8ff451ca13f0872411ba5b8b27fc42de8093
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41434
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-17 22:33:50 +00:00
Gabe Black
1a13423408 base: Add some operators to the BitUnion types.
The operators it seems to need are ones which modify the BitUnion being
operated on, vs ones which just use it to produce a new value. The later
kind can be handled by converting the BitUnion into its underlying type
and then applying the built in operators.

Change-Id: I8aa08bf74d8ad88f4dfbb0031610c52ad412d03b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41515
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-17 22:33:50 +00:00
Gabe Black
12d9fadc59 util: Delete the build_cross_gcc utility.
Now that crosstool-ng can be used for any of the supported ISAs, the
build_cross_gcc tool is no longer needed.

Change-Id: Ie72d84197662eb0bea03ec27830b3ad4dbaa3084
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41454
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Gabe Black <gabe.black@gmail.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-17 19:35:16 +00:00
Gabe Black
01294faea6 util: Add a crosstool-ng defconfig for RISCV.
This may have been available before as well, but it was hidden behind an
"experimental" flag which needed to be enabled before riscv was
selectable.

Change-Id: I76239d826163e54d0b8a48c3492930bb787bea02
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41453
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
2021-02-17 19:35:16 +00:00
Tiago Mück
205f8fdb5d mem-ruby: add TBEStorage structure
The TBEStorage is used to track the resources consumed by the TBETable,
i.e. the number of available TBE slots.

structure(TBEStorage, external ="yes") {
    int size();
    int capacity();
    int reserved();
    int slotsAvailable();
    bool areNSlotsAvailable(int n);
    void incrementReserved();
    void decrementReserved();
    int addEntryToNewSlot();
    void addEntryToSlot(int slot);
    void removeEntryFromSlot(int slot);
}

TBEStorage resource tracking has two main differences from TBETable:

1) Allows slot reservation. This is useful to implement protocols that
employ retry/credit messages instead of stall when the controller runs
out of TBEs to accept new request.

2) Can also assign multiple entries to the same slot. This is useful to
more easily model cases where multiple transactions share the same TBE
resource (i.e. the slot).
E.g: a request that triggers a replacement in a system without
dedicated WB/Eviction buffer; both transactions can can have separate
logical TBEs associated to the same slot.

The motivation for having a separate structures for tracking TBEs
availability are twofold:

- Keeps TBETable simple and without the additional overhead for
protocols that do not need these additional features.

- Having two separate transactions sharing the same TBE resource using
the current TBETable would be cumbersome since the TBETable is indexed
by the transaction address.

Change-Id: I64106d50068320bc925243732ef8ff9ef0b6c4bf
Signed-off-by: Tiago Mück <tiago.muck@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41157
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-17 18:30:58 +00:00
Giacomo Travaglini
e48bcb706d sim: Fix initialization of ticksClkGated distribution
The third init argument is the bucket size. This should be evaluated
according to the following formula:

bucket size = (max - min + 1.0) / #buckets

Current initialization is not taking into considering the minimum value
(and the +1 offset)

Change-Id: Ie4b8dd7e26d3db60288ab1715ff1b7f0f4fe419e
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41413
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-17 09:59:33 +00:00
Gabe Black
83056b7ddb scons: Work around very long command lines and arg size limits.
In the background, scons invokes commands using what is essentially
'sh -c ${CMD}'. It's a little more sophisticated than that, but the net
effect is that all of the arguments of a given command are collected
into a single argument for sh. While Linux has a very generous limit
on the number of command line arguments you can have, and a relatively
generous limit on the total size of the arguments and environment
variables which can be read with "getconf ARG_MAX" (about 2MB only my
system), the limit on an individual argument, defined in the little
documented constant MAX_ARG_STRLEN, is much smaller, 32 pages or
131072 bytes from what I've read.

Unfortunately, when building gem5, especially without partial linking,
the command line for the final linking step can be very long, and with
some extra files brought in with EXTRAS can relatively easily exceed
this limit.

To work around this problem, this change adds a new scons "tool" which
replaces the SPAWN and PSPAWN construction environment variables (not
the shell environment, scon's env, aka main) with wrappes. These
wrappers create a temporary file, write the command into it, and then
tell the original SPAWN/PSPAWN implementation to run that file as the
actual command.

This works, but it has two potential drawbacks. First, it creates
extra temporary files which may add some overhead to the build. The
overhead is likely small, but is non-zero.

Second, while this restores the original breaks between command line
arguments, it doesn't completely avoid the total argument/environment
size limit which would be harder to hit, but does still exist.

Another option would be to use the same sort of technique, but to use
gcc's (and I assume clang's) ability to read options from a file using
an @file argument, where file is replaced with the name of the
arguments.

The upside of this approach is that it avoids all of these limits
since gcc is just reading a file, and the only limits are ones it self
imposes. Also, this would only apply to invocations of gcc, and so
would be worth plumbing in to only affect, say, the linking step.
There would be no hypothetical overhead from creating temp files.

One downside though, is that this is not a universal approach and
would break anything which doesn't understand @file style arguments.
Also, when intercepting calls to the shell, the arguments we're
getting have been made appropriate for that environment (escaping,
quoting, etc). The rules for escaping arguments in an @file may not be
quite the same as for the shell, and so there may be weird cases where
a command line gets garbled this way.

Given the tradeoffs, I think always putting the commands into temp
files and running them as scripts is the way to go.

Change-Id: I0a5288aed745a432ed72ffd990ceded2b9422585
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41273
Reviewed-by: Earl Ou <shunhsingou@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-17 09:42:59 +00:00
Earl Ou
11cc834b3f fastmodel: print stdout when build command fail
Originally we only print command stdout in verbose build. This leads
to misleading debug message when there is error happen in a non-verbose
build. This CL prints stdout when the step fails.

Change-Id: I8c34ac5576269177ae70fc5e01650193fd252b0b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40475
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Earl Ou <shunhsingou@google.com>
2021-02-17 04:06:49 +00:00
Gabe Black
6bcb68e07c util: Delete the ccdrv kernel module.
This very small kernel module seems to be intended to measure the access
time to device registers when running in a linux kernel. It mentions
kernel version 2.6.x and so is fairly old and may not work with modern
kernels.

While there is probably some utility (no pun intended) to having a
driver like that and that sort of measurement capability, the usefulness
is probably not huge compared to its small but non-zero maintenance
burden. It seems like it's not something that gets active attention
given it's revision history, and is probably just taking up space these days.

Change-Id: I3b1f44d718d7e6ee23695e3117bb169268f2157a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41473
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-02-16 22:11:06 +00:00