Matthias Jung
7faccaa02b
Included SystemC in CMAKE Build process
2020-02-26 14:44:59 +01:00
Matthias Jung
eee04e897b
Small syntactic change
2020-02-26 12:20:22 +01:00
Matthias Jung
757ec296cf
FIXME: workaround for bankwise parameters.
2020-02-26 00:01:27 +01:00
Matthias Jung
d96e8c316a
CMAKE: Workaround for python
2020-02-26 00:00:05 +01:00
Matthias Jung
f4a0e9fded
Added first CMAKE configuration
...
A first CMAKE configuration was added. Right now it was just tested
under Debian linux in the WSL context. Further tests on native Windows,
Linux and macOS have to be performed.
2020-02-25 23:58:47 +01:00
Matthias Jung
cc9f436e13
Updated to newest DRAMPower
2020-02-25 22:05:25 +01:00
Matthias Jung
1bc4914d9f
Updated DRAMPower to head
2020-02-25 19:56:39 +01:00
Matthias Jung
369db7f289
install_deb.sh updated
2020-02-25 19:42:57 +01:00
Matthias Jung
3eb406f0b1
Added missing include in Utils.cpp
2020-02-25 19:42:09 +01:00
Matthias Jung
bd11d34abc
Library pro file simplified
2020-02-25 19:41:23 +01:00
Matthias Jung
8a7ad0c7b9
Simulator pro file simplified
2020-02-25 19:40:36 +01:00
Matthias Jung
4f4b88936f
Trance Analyser pro-file simplified
2020-02-25 19:38:12 +01:00
Matthias Jung
a56b39d344
New Script for wget SystemC and build with CMAKE
2020-02-25 19:34:04 +01:00
Lukas Steiner (2)
169627de2e
Included address range check. Fixed bug with FIFO Strict in controllerMethod().
2020-02-21 14:55:06 +01:00
Lukas Steiner (2)
e3c4a923cf
getNextCommand() mechanism is now working rankwise.
2020-02-13 16:51:24 +01:00
Lukas Steiner (2)
fbc0a3d7e6
Moved buffer mechanism to scheduler.
2020-02-13 16:47:51 +01:00
Lukas Steiner (2)
7611163bc3
Re-included blocking mechanism into BM, small bugfix in HBM2 timing checker.
2020-02-10 15:45:23 +01:00
Lukas Steiner (2)
26b2893def
Improved placement of refresh commands.
2020-02-06 17:21:49 +01:00
Lukas Steiner (2)
bb783837ba
Removed nextRow in BankMachine.
2020-02-04 15:42:54 +01:00
Lukas Steiner (2)
9f5616c8dd
Included chrono clock for higher precision.
2020-02-03 10:26:06 +01:00
Lukas Steiner (2)
e39d182f05
New address mapping for bosch.
2020-02-03 08:54:51 +01:00
Lukas Steiner
705729dee0
Fix of memory leak in controllerMethod.
2019-12-17 23:25:22 +01:00
Lukas Steiner (2)
10f577c38f
Adapted bankwise refresh manager to new controller functionality.
2019-12-11 11:11:21 +01:00
Lukas Steiner
5111973983
Small bugfixes in controller and HBM2 checker.
2019-11-30 00:13:08 +01:00
Lukas Steiner
ccfe1f45af
Small bugfix in LPDDR4 checker, some method renaming.
2019-11-25 23:44:54 +01:00
Lukas Steiner
7380edfac2
Small code refactoring.
2019-11-25 00:18:51 +01:00
Lukas Steiner
fa301d2bb4
Staggered power-down working, adapt per-bank refresh.
2019-11-22 01:01:08 +01:00
Lukas Steiner
7997648521
Fixed position of power-down entry trigger.
2019-11-21 23:29:55 +01:00
Lukas Steiner
037cd4f334
Removed old controller core files.
2019-11-21 21:38:52 +01:00
Lukas Steiner
4bd9987c9c
Staggered power-down with all-bank refresh is working.
2019-11-21 17:21:54 +01:00
Lukas Steiner
9d7f17451a
Included interface and dummy for power-down manager.
2019-11-21 00:03:15 +01:00
Lukas Steiner
6e6d839bd1
First version of power down working, added some helper functions for enum Command.
2019-11-20 00:30:27 +01:00
Lukas Steiner (2)
bddec3022a
Some preparations for power down.
2019-11-18 19:16:42 +01:00
Lukas Steiner (2)
e970ad194e
Correction of timing dependency WR -<> RDA.
2019-10-17 15:47:27 +02:00
Lukas Steiner (2)
5f7cb7a326
Included memspec, dram and checker for GDDR5, GDDR5X and GDDR6.
2019-10-17 15:00:28 +02:00
Lukas Steiner
a3fa363a87
Bugfix for triggering controllerMethod() multiple times at the same time.
2019-10-15 20:26:49 +02:00
Lukas Steiner (2)
2aa5d125c7
Fixed BM deadlock.
2019-10-15 16:09:59 +02:00
Lukas Steiner (2)
04a59c8bd2
Changed MemSpec::getExecutionTime() for different tRCDs.
2019-10-15 16:03:34 +02:00
Lukas Steiner
ed29186adc
Included HBM2 example, fixed fifo strict issue with HBM2's command buses.
2019-10-11 20:35:45 +02:00
Lukas Steiner
f4803f4b8c
Included checker for HBM2.
2019-10-10 18:17:21 +02:00
Lukas Steiner (2)
606d273bee
Included memspec and dram component for HBM2.
2019-10-10 15:21:58 +02:00
Lukas Steiner (2)
256abe449c
Included CheckerWideIO2, tPPD fix in CheckerLPDDR4.
2019-10-09 09:49:46 +02:00
Lukas Steiner (2)
a5b00ea3be
Further inclusion of WideIO2.
2019-10-08 15:27:18 +02:00
Lukas Steiner (2)
65db413a20
Included MemSpecWideIO2, some adaptions for all memspecs.
2019-10-08 14:14:42 +02:00
Lukas Steiner (2)
932027112e
Adapted timing checkers of DDR4 and WideIO to new refresh.
2019-10-07 15:37:23 +02:00
Lukas Steiner
86d5082434
Further improvements in refresh managers.
2019-10-06 20:54:30 +02:00
Lukas Steiner
d1f6bc6233
Improved flexible refresh, implemented first version of bankwise flexible refresh.
2019-10-06 18:56:13 +02:00
Lukas Steiner
aa6a205872
Implemented first version of flexible refresh (only REFA).
2019-10-04 21:46:29 +02:00
Lukas Steiner
b22cfa4a94
Improved controller method, some code and output formatting.
2019-10-03 19:04:34 +02:00
Lukas Steiner
6e71e435c5
Implemented first version of new bankwise refresh.
2019-10-02 21:55:19 +02:00
