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Some preparations for power down.

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This commit is contained in:
Lukas Steiner (2)
2019-11-18 19:16:42 +01:00
parent e970ad194e
commit bddec3022a
11 changed files with 56 additions and 29 deletions
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3
DRAMSys/library/src/controller/BankMachine.cpp
View File

@@ -66,7 +66,8 @@ void BankMachine::updateState(Command command)
currentState = BmState::Precharged;
currentPayload = nullptr;
}
else if (command == Command::REFA || command == Command::REFB)
else if (command == Command::REFA || command == Command::REFB
|| command == Command::PDXA || command == Command::PDXP)
blocked = false;
else
SC_REPORT_FATAL("BankMachine", "Unknown phase");

17
DRAMSys/library/src/controller/Command.cpp
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@@ -135,3 +135,20 @@ bool commandIsIn(Command command, std::vector<Command> commands)
}
return false;
}
std::array<tlm_phase, 16> phaseOfCommand = {UNINITIALIZED_PHASE,
BEGIN_PRE,
BEGIN_PREA,
BEGIN_ACT,
BEGIN_RD,
BEGIN_WR,
BEGIN_RDA,
BEGIN_WRA,
BEGIN_REFA,
BEGIN_REFB,
BEGIN_PDNA,
END_PDNA,
BEGIN_PDNP,
END_PDNP,
BEGIN_SREF,
END_SREF};

7
DRAMSys/library/src/controller/Command.h
View File

@@ -38,6 +38,11 @@
#include <string>
#include <vector>
#include <array>
#include <tlm.h>
#include "../common/protocol.h"
using namespace tlm;
enum Command
{
@@ -64,4 +69,6 @@ const std::vector<Command> &getAllCommands();
unsigned numberOfCommands();
bool commandIsIn(Command command, std::vector<Command> commands);
extern std::array<tlm_phase, 16> phaseOfCommand;
#endif // COMMAND_H

35
DRAMSys/library/src/controller/Controller.cpp
View File

@@ -64,6 +64,7 @@ Controller::Controller(sc_module_name name) :
Configuration &config = Configuration::getInstance();
MemSpec *memSpec = config.memSpec;
maxNumberOfPayloads = config.MaxNrOfTransactions;
ranksNumberOfPayloads = std::vector<unsigned>(memSpec->NumberOfRanks, 0);
if (memSpec->MemoryType == "DDR3")
checker = new CheckerDDR3();
@@ -195,7 +196,7 @@ void Controller::controllerMethod()
// (3) Accept new request from arbiter and start appropriate BM if necessary
if (sc_time_stamp() >= timeToAcquire && payloadToAcquire != nullptr)
{
if (numberOfPayloads < Configuration::getInstance().MaxNrOfTransactions)
if (totalNumberOfPayloads < Configuration::getInstance().MaxNrOfTransactions)
{
Bank bank = DramExtension::getBank(payloadToAcquire);
acquirePayload();
@@ -316,13 +317,14 @@ void Controller::releasePayload()
uint64_t id __attribute__((unused)) = DramExtension::getPayloadID(payloadToRelease);
PRINTDEBUGMESSAGE(name(), "Payload " + std::to_string(id) + " left system.");
totalNumberOfPayloads--;
ranksNumberOfPayloads[DramExtension::getRank(payloadToRelease).ID()]--;
payloadToRelease->release();
numberOfPayloads--;
payloadToRelease = nullptr;
timeToRelease = sc_max_time();
numberOfTransactionsServed++;
if (numberOfPayloads == 0)
if (totalNumberOfPayloads == 0)
startBandwidthIdleCollector();
}
@@ -331,12 +333,13 @@ void Controller::acquirePayload()
uint64_t id __attribute__((unused)) = DramExtension::getPayloadID(payloadToAcquire);
PRINTDEBUGMESSAGE(name(), "Payload " + std::to_string(id) + " entered system.");
if (numberOfPayloads == 0)
if (totalNumberOfPayloads == 0)
endBandwithIdleCollector();
scheduler->storeRequest(payloadToAcquire);
payloadToAcquire->acquire();
numberOfPayloads++;
totalNumberOfPayloads++;
ranksNumberOfPayloads[DramExtension::getRank(payloadToAcquire).ID()]++;
payloadToAcquire->set_response_status(TLM_OK_RESPONSE);
sendToFrontend(payloadToAcquire, END_REQ);
payloadToAcquire = nullptr;
@@ -355,27 +358,7 @@ void Controller::sendToDram(Command command, tlm_generic_payload *payload)
checker->insert(command, extension.getRank(), extension.getBankGroup(), extension.getBank());
sc_time delay = SC_ZERO_TIME;
tlm_phase phase;
if (command == Command::ACT)
phase = BEGIN_ACT;
else if (command == Command::PRE)
phase = BEGIN_PRE;
else if (command == Command::RD)
phase = BEGIN_RD;
else if (command == Command::RDA)
phase = BEGIN_RDA;
else if (command == Command::WR)
phase = BEGIN_WR;
else if (command == Command::WRA)
phase = BEGIN_WRA;
else if (command == Command::PREA)
phase = BEGIN_PREA;
else if (command == Command::REFA)
phase = BEGIN_REFA;
else if (command == Command::REFB)
phase = BEGIN_REFB;
else
SC_REPORT_FATAL("Controller", "Unknown phase");
tlm_phase phase = phaseOfCommand[command];
iSocket->nb_transport_fw(*payload, phase, delay);
}

3
DRAMSys/library/src/controller/Controller.h
View File

@@ -72,7 +72,8 @@ protected:
virtual void sendToDram(Command, tlm_generic_payload *);
private:
unsigned numberOfPayloads = 0;
unsigned totalNumberOfPayloads = 0;
std::vector<unsigned> ranksNumberOfPayloads;
unsigned maxNumberOfPayloads;
tlm_generic_payload *payloadToAcquire = nullptr;
sc_time timeToAcquire = sc_max_time();

5
DRAMSys/library/src/controller/refresh/RefreshManager.cpp
View File

@@ -59,6 +59,11 @@ std::pair<Command, tlm_generic_payload *> RefreshManager::getNextCommand()
return std::pair<Command, tlm_generic_payload *>(Command::NOP, nullptr);
}
void RefreshManager::block()
{
blocked = true;
}
sc_time RefreshManager::start()
{
timeToSchedule = sc_max_time();

3
DRAMSys/library/src/controller/refresh/RefreshManager.h
View File

@@ -50,6 +50,7 @@ public:
std::pair<Command, tlm_generic_payload *> getNextCommand();
sc_time start();
void updateState(Command, tlm_generic_payload *);
void block();
private:
enum class RmState {Regular, Precharged, Pulledin} state = RmState::Regular;
@@ -65,6 +66,8 @@ private:
int flexibilityCounter = 0;
int maxPostponed = 0;
int maxPulledin = 0;
bool blocked = false;
};
#endif // REFRESHMANAGER_H

7
DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.cpp
View File

@@ -59,13 +59,18 @@ RefreshManagerBankwise::RefreshManagerBankwise(std::vector<BankMachine *> &bankM
std::pair<Command, tlm_generic_payload *> RefreshManagerBankwise::getNextCommand()
{
if (sc_time_stamp() == timeToSchedule)
if (sc_time_stamp() == timeToSchedule && !blocked)
return std::pair<Command, tlm_generic_payload *>
(nextCommand, &refreshPayloads[currentBankMachine->getBank().ID() % memSpec->BanksPerRank]);
else
return std::pair<Command, tlm_generic_payload *>(Command::NOP, nullptr);
}
void RefreshManagerBankwise::block()
{
blocked = true;
}
sc_time RefreshManagerBankwise::start()
{
timeToSchedule = sc_max_time();

3
DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.h
View File

@@ -52,6 +52,7 @@ public:
std::pair<Command, tlm_generic_payload *> getNextCommand();
sc_time start();
void updateState(Command, tlm_generic_payload *);
void block();
private:
enum class RmState {Regular, Precharged, Pulledin} state = RmState::Regular;
@@ -71,6 +72,8 @@ private:
int flexibilityCounter = 0;
int maxPostponed = 0;
int maxPulledin = 0;
bool blocked = false;
};
#endif // REFRESHMANAGERBANKWISE_H

1
DRAMSys/library/src/controller/refresh/RefreshManagerDummy.h
View File

@@ -49,6 +49,7 @@ public:
std::pair<Command, tlm_generic_payload *> getNextCommand();
sc_time start();
void updateState(Command, tlm_generic_payload *) {}
void block() {}
};
#endif // REFRESHMANAGERDUMMY_H

1
DRAMSys/library/src/controller/refresh/RefreshManagerIF.h
View File

@@ -50,6 +50,7 @@ public:
virtual std::pair<Command, tlm_generic_payload *> getNextCommand() = 0;
virtual sc_time start() = 0;
virtual void updateState(Command, tlm_generic_payload *) = 0;
virtual void block() = 0;
};
#endif // REFRESHMANAGERIF_H