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Improved controller method, some code and output formatting.

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This commit is contained in:
Lukas Steiner
2019-10-03 19:04:34 +02:00
parent 6e71e435c5
commit b22cfa4a94
13 changed files with 68 additions and 57 deletions
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14
DRAMSys/library/src/common/XmlAddressDecoder.cpp
View File

@@ -172,12 +172,12 @@ void XmlAddressDecoder::print()
{
std::cout << headline << std::endl;
std::cout << "Address Mapping:" << std::endl << std::endl;
std::cout << std::setw(11) << "channel: " << std::bitset<64>(masks.channel) << std::endl;
std::cout << std::setw(11) << "rank: " << std::bitset<64>(masks.rank) << std::endl;
std::cout << std::setw(11) << "bankgroup: " << std::bitset<64>(masks.bankgroup) << std::endl;
std::cout << std::setw(11) << "bank: " << std::bitset<64>(masks.bank) << std::endl;
std::cout << std::setw(11) << "row: " << std::bitset<64>(masks.row) << std::endl;
std::cout << std::setw(11) << "column: " << std::bitset<64>(masks.column) << std::endl;
std::cout << std::setw(11) << "bytes: " << std::bitset<64>(masks.bytes) << std::endl;
std::cout << " channel: " << std::bitset<64>(masks.channel) << std::endl;
std::cout << " rank: " << std::bitset<64>(masks.rank) << std::endl;
std::cout << " bankgroup: " << std::bitset<64>(masks.bankgroup) << std::endl;
std::cout << " bank: " << std::bitset<64>(masks.bank) << std::endl;
std::cout << " row: " << std::bitset<64>(masks.row) << std::endl;
std::cout << " column: " << std::bitset<64>(masks.column) << std::endl;
std::cout << " bytes: " << std::bitset<64>(masks.bytes) << std::endl;
std::cout << std::endl;
}

25
DRAMSys/library/src/configuration/Configuration.cpp
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@@ -337,6 +337,7 @@ void Configuration::setParameters(std::map<std::string, std::string>
std::uint64_t Configuration::getSimMemSizeInBytes()
{
// 1. Get number of banks, rows, columns and data width in bits for one die (or chip)
std::string type = memSpec->MemoryType;
std::uint64_t ranks = memSpec->NumberOfRanks;
std::uint64_t bankgroups = memSpec->NumberOfBankGroups;
std::uint64_t banks = memSpec->NumberOfBanks;
@@ -350,17 +351,19 @@ std::uint64_t Configuration::getSimMemSizeInBytes()
// 4. Total memory size in Bytes of one DIMM (with only support of 1 rank on a DIMM)
std::uint64_t memorySize = chipSize * NumberOfDevicesOnDIMM;
std::cout << headline << std::endl << std::endl;
std::cout << std::setw(24) << "Memory size in bytes : " << memorySize << std::endl;
std::cout << std::setw(24) << "Number of ranks : " << ranks << std::endl;
std::cout << std::setw(24) << "Number of bankgroups : " << bankgroups << std::endl;
std::cout << std::setw(24) << "Number of banks : " << banks << std::endl;
std::cout << std::setw(24) << "Number of rows : " << rows << std::endl;
std::cout << std::setw(24) << "Number of columns : " << columns << std::endl;
std::cout << std::setw(24) << "Chip data bus width : " << bitWidth << std::endl;
std::cout << std::setw(24) << "Chip size in bits : " << chipBitSize << std::endl;
std::cout << std::setw(24) << "Chip Size in bytes : " << chipSize << std::endl;
std::cout << std::setw(24) << "Devices/Chips on DIMM: " << NumberOfDevicesOnDIMM << std::endl;
std::cout << headline << std::endl;
std::cout << "Per Channel Configuration:" << std::endl << std::endl;
std::cout << " Memory type: " << type << std::endl;
std::cout << " Memory size in bytes: " << memorySize << std::endl;
std::cout << " Number of ranks: " << ranks << std::endl;
std::cout << " Number of bankgroups: " << bankgroups << std::endl;
std::cout << " Number of banks: " << banks << std::endl;
std::cout << " Number of rows: " << rows << std::endl;
std::cout << " Number of columns: " << columns << std::endl;
std::cout << " Chip data bus width: " << bitWidth << std::endl;
std::cout << " Chip size in bits: " << chipBitSize << std::endl;
std::cout << " Chip Size in bytes: " << chipSize << std::endl;
std::cout << " Devices/Chips on DIMM: " << NumberOfDevicesOnDIMM << std::endl;
std::cout << std::endl;
assert(memorySize > 0);

13
DRAMSys/library/src/controller/BankMachine.cpp
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@@ -97,10 +97,15 @@ BmState BankMachine::getState()
return currentState;
}
bool BankMachine::isIdle()
{
return (currentPayload == nullptr);
}
BankMachineOpen::BankMachineOpen(SchedulerIF *scheduler, CheckerIF *checker, Bank bank)
: BankMachine(scheduler, checker, bank) {}
sc_time BankMachineOpen::startBankMachine()
sc_time BankMachineOpen::start()
{
if (currentPayload == nullptr)
{
@@ -147,7 +152,7 @@ sc_time BankMachineOpen::startBankMachine()
BankMachineClosed::BankMachineClosed(SchedulerIF *scheduler, CheckerIF *checker, Bank bank)
: BankMachine(scheduler, checker, bank) {}
sc_time BankMachineClosed::startBankMachine()
sc_time BankMachineClosed::start()
{
if (currentPayload == nullptr)
{
@@ -194,7 +199,7 @@ sc_time BankMachineClosed::startBankMachine()
BankMachineOpenAdaptive::BankMachineOpenAdaptive(SchedulerIF *scheduler, CheckerIF *checker, Bank bank)
: BankMachine(scheduler, checker, bank) {}
sc_time BankMachineOpenAdaptive::startBankMachine()
sc_time BankMachineOpenAdaptive::start()
{
if (currentPayload == nullptr)
{
@@ -259,7 +264,7 @@ sc_time BankMachineOpenAdaptive::startBankMachine()
BankMachineClosedAdaptive::BankMachineClosedAdaptive(SchedulerIF *scheduler, CheckerIF *checker, Bank bank)
: BankMachine(scheduler, checker, bank) {}
sc_time BankMachineClosedAdaptive::startBankMachine()
sc_time BankMachineClosedAdaptive::start()
{
if (currentPayload == nullptr)
{

11
DRAMSys/library/src/controller/BankMachine.h
View File

@@ -59,7 +59,7 @@ class BankMachine
{
public:
virtual ~BankMachine() {}
virtual sc_time startBankMachine() = 0;
virtual sc_time start() = 0;
std::pair<Command, tlm_generic_payload *> getNextCommand();
void updateState(Command);
void block();
@@ -68,6 +68,7 @@ public:
Bank getBank();
Row getOpenRow();
BmState getState();
bool isIdle();
protected:
BankMachine(SchedulerIF *, CheckerIF *, Bank);
@@ -89,28 +90,28 @@ class BankMachineOpen final : public BankMachine
{
public:
BankMachineOpen(SchedulerIF *, CheckerIF *, Bank);
sc_time startBankMachine();
sc_time start();
};
class BankMachineClosed final : public BankMachine
{
public:
BankMachineClosed(SchedulerIF *, CheckerIF *, Bank);
sc_time startBankMachine();
sc_time start();
};
class BankMachineOpenAdaptive final : public BankMachine
{
public:
BankMachineOpenAdaptive(SchedulerIF *, CheckerIF *, Bank);
sc_time startBankMachine();
sc_time start();
};
class BankMachineClosedAdaptive final : public BankMachine
{
public:
BankMachineClosedAdaptive(SchedulerIF *, CheckerIF *, Bank);
sc_time startBankMachine();
sc_time start();
};
#endif // BANKMACHINE_H

46
DRAMSys/library/src/controller/Controller.cpp
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@@ -127,7 +127,7 @@ Controller::Controller(sc_module_name name) :
RefreshManagerIF *manager = new RefreshManagerBankwise
(bankMachinesOnRank[rankID], Rank(rankID), checker);
refreshManagers.push_back(manager);
refreshEvent.notify(manager->startRefreshManager());
refreshEvent.notify(manager->start());
}
}
else
@@ -137,7 +137,7 @@ Controller::Controller(sc_module_name name) :
RefreshManagerIF *manager = new RefreshManager
(bankMachinesOnRank[rankID], Rank(rankID), checker);
refreshManagers.push_back(manager);
refreshEvent.notify(manager->startRefreshManager());
refreshEvent.notify(manager->start());
}
}
@@ -163,16 +163,7 @@ void Controller::controllerMethod()
if (sc_time_stamp() == timeToRelease && payloadToRelease != nullptr)
releasePayload();
// (2) Accept new request from arbiter
if (sc_time_stamp() >= timeToAcquire && payloadToAcquire != nullptr)
{
if (numberOfPayloads < Configuration::getInstance().MaxNrOfTransactions)
acquirePayload();
else
PRINTDEBUGMESSAGE(name(), "Total number of payloads exceeded, backpressure!");
}
// (3) Send result to arbiter
// (2) Send next result to arbiter
if (payloadToRelease == nullptr && !responseQueue.empty())
{
std::pair<sc_time, tlm_generic_payload *> element = responseQueue.front();
@@ -184,21 +175,32 @@ void Controller::controllerMethod()
}
}
// (4) Start bank machines to issue new requests for current time
for (auto it : bankMachines)
it->startBankMachine();
// (3) Accept new request from arbiter and start appropriate BM if necessary
if (sc_time_stamp() >= timeToAcquire && payloadToAcquire != nullptr)
{
if (numberOfPayloads < Configuration::getInstance().MaxNrOfTransactions)
{
Bank bank = DramExtension::getBank(payloadToAcquire);
acquirePayload();
// (5) Choose one request and send it to DRAM
if (bankMachines[bank.ID()]->isIdle())
bankMachines[bank.ID()]->start();
}
else
PRINTDEBUGMESSAGE(name(), "Total number of payloads exceeded, backpressure!");
}
// (4) Choose one request and send it to DRAM
std::pair<Command, tlm_generic_payload *> commandPair;
std::vector<std::pair<Command, tlm_generic_payload *>> readyCommands;
// (5.1) Check for refresh command (PREA/PRE or REFA/REFB)
// (4.1) Check for refresh command (PREA/PRE or REFA/REFB)
for (auto it : refreshManagers)
{
commandPair = it->getNextCommand();
if (commandPair.second != nullptr)
readyCommands.push_back(commandPair);
}
// (5.2) Check for other commands (PRE, ACT, RD or WR)
// (4.2) Check for other commands (PRE, ACT, RD or WR)
for (auto it : bankMachines)
{
commandPair = it->getNextCommand();
@@ -226,13 +228,13 @@ void Controller::controllerMethod()
}
}
// (6) Restart bank machines and refresh managers to issue new requests for the future
// (5) Restart bank machines and refresh managers to issue new requests for the future
for (auto it : refreshManagers)
bankMachineEvent.notify(it->startRefreshManager());
bankMachineEvent.notify(it->start());
// TODO: order, first BM then RM?
for (auto it : bankMachines)
{
sc_time delay = it->startBankMachine();
sc_time delay = it->start();
if (delay != SC_ZERO_TIME) // TODO: must be checked to avoid livelock
bankMachineEvent.notify(delay);
}

2
DRAMSys/library/src/controller/refresh/RefreshManager.cpp
View File

@@ -53,7 +53,7 @@ std::pair<Command, tlm_generic_payload *> RefreshManager::getNextCommand()
return std::pair<Command, tlm_generic_payload *>(Command::NOP, nullptr);
}
sc_time RefreshManager::startRefreshManager()
sc_time RefreshManager::start()
{
if (sc_time_stamp() >= timeForNextTrigger)
{

2
DRAMSys/library/src/controller/refresh/RefreshManager.h
View File

@@ -48,7 +48,7 @@ public:
RefreshManager(std::vector<BankMachine *> &, Rank, CheckerIF *);
std::pair<Command, tlm_generic_payload *> getNextCommand();
sc_time startRefreshManager();
sc_time start();
void updateState(Command, tlm_generic_payload *);
private:

2
DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.cpp
View File

@@ -57,7 +57,7 @@ std::pair<Command, tlm_generic_payload *> RefreshManagerBankwise::getNextCommand
return std::pair<Command, tlm_generic_payload *>(Command::NOP, nullptr);
}
sc_time RefreshManagerBankwise::startRefreshManager()
sc_time RefreshManagerBankwise::start()
{
if (sc_time_stamp() >= timeForNextTrigger)
{

2
DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.h
View File

@@ -48,7 +48,7 @@ public:
RefreshManagerBankwise(std::vector<BankMachine *> &, Rank, CheckerIF *);
std::pair<Command, tlm_generic_payload *> getNextCommand();
sc_time startRefreshManager();
sc_time start();
void updateState(Command, tlm_generic_payload *);
private:

2
DRAMSys/library/src/controller/refresh/RefreshManagerDummy.cpp
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@@ -39,7 +39,7 @@ std::pair<Command, tlm_generic_payload *> RefreshManagerDummy::getNextCommand()
return std::pair<Command, tlm_generic_payload *>(Command::NOP, nullptr);
}
sc_time RefreshManagerDummy::startRefreshManager()
sc_time RefreshManagerDummy::start()
{
return sc_max_time() - sc_time_stamp();
}

2
DRAMSys/library/src/controller/refresh/RefreshManagerDummy.h
View File

@@ -47,7 +47,7 @@ class RefreshManagerDummy final : public RefreshManagerIF
{
public:
std::pair<Command, tlm_generic_payload *> getNextCommand();
sc_time startRefreshManager();
sc_time start();
void updateState(Command, tlm_generic_payload *) {}
};

2
DRAMSys/library/src/controller/refresh/RefreshManagerIF.h
View File

@@ -48,7 +48,7 @@ public:
virtual ~RefreshManagerIF() {}
virtual std::pair<Command, tlm_generic_payload *> getNextCommand() = 0;
virtual sc_time startRefreshManager() = 0;
virtual sc_time start() = 0;
virtual void updateState(Command, tlm_generic_payload *) = 0;
};

2
DRAMSys/library/src/simulation/DRAMSys.cpp
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@@ -169,7 +169,7 @@ void DRAMSys::logo()
cout << REDTXT("=| |= ") << BOLDBLUETXT("University of Kaiserslautern")
<< endl;
cout << REDTXT(" +---+ ") << endl;
cout << REDTXT(" ||| ") << "DRAMSys v3.0" << endl;
cout << REDTXT(" ||| ") << "DRAMSys v4.0" << endl;
cout << endl;
#undef REDTXT
#undef BOLDBLUETXT