Further inclusion of WideIO2.

DRAMSys/library/library.pro

@@ -110,17 +110,17 @@ SOURCES += \
     src/error/eccbaseclass.cpp \
     src/error/ecchamming.cpp \
     src/common/AddressDecoder.cpp \
-    src/simulation/Dram.cpp \
+    src/simulation/dram/Dram.cpp \
     src/simulation/Arbiter.cpp \
     src/common/CongenAddressDecoder.cpp \
     src/common/XmlAddressDecoder.cpp \
     src/common/timingCalculations.cpp \
     src/common/dramExtensions.cpp \
     src/common/utils.cpp \
-    src/simulation/DramDDR3.cpp \
-    src/simulation/DramDDR4.cpp \
-    src/simulation/DramRecordable.cpp \
-    src/simulation/DramWideIO.cpp \
+    src/simulation/dram/DramDDR3.cpp \
+    src/simulation/dram/DramDDR4.cpp \
+    src/simulation/dram/DramRecordable.cpp \
+    src/simulation/dram/DramWideIO.cpp \
     src/configuration/memspec/MemSpec.cpp \
     src/controller/BankMachine.cpp \
     src/controller/Controller.cpp \
@@ -139,8 +139,11 @@ SOURCES += \
     src/configuration/memspec/MemSpecWideIO.cpp \
     src/configuration/memspec/MemSpecLPDDR4.cpp \
     src/controller/checker/CheckerDDR4.cpp \
-    src/simulation/DramLPDDR4.cpp \
-    src/controller/checker/CheckerLPDDR4.cpp
+    src/simulation/dram/DramLPDDR4.cpp \
+    src/controller/checker/CheckerLPDDR4.cpp \
+    src/configuration/memspec/MemSpecWideIO2.cpp \
+    src/simulation/dram/DramWideIO2.cpp \
+    src/controller/checker/CheckerWideIO2.cpp
 
 HEADERS += \
     src/common/third_party/tinyxml2/tinyxml2.h \
@@ -154,7 +157,7 @@ HEADERS += \
     src/controller/core/powerdown/PowerDownManager.h \
     src/simulation/TracePlayer.h \
     src/simulation/MemoryManager.h \
-    src/simulation/Dram.h \
+    src/simulation/dram/Dram.h \
     src/simulation/Arbiter.h \
     src/common/libDRAMPower.h \
     src/simulation/ReorderBuffer.h \
@@ -187,10 +190,10 @@ HEADERS += \
     src/common/dramExtensions.h \
     src/common/utils.h \
     src/configuration/TemperatureSimConfig.h \
-    src/simulation/DramDDR3.h \
-    src/simulation/DramDDR4.h \
-    src/simulation/DramRecordable.h \
-    src/simulation/DramWideIO.h \
+    src/simulation/dram/DramDDR3.h \
+    src/simulation/dram/DramDDR4.h \
+    src/simulation/dram/DramRecordable.h \
+    src/simulation/dram/DramWideIO.h \
     src/controller/GenericController.h \
     src/controller/BankMachine.h \
     src/controller/Controller.h \
@@ -213,8 +216,11 @@ HEADERS += \
     src/configuration/memspec/MemSpecDDR4.h \
     src/configuration/memspec/MemSpecLPDDR4.h \
     src/controller/checker/CheckerDDR4.h \
-    src/simulation/DramLPDDR4.h \
-    src/controller/checker/CheckerLPDDR4.h
+    src/simulation/dram/DramLPDDR4.h \
+    src/controller/checker/CheckerLPDDR4.h \
+    src/configuration/memspec/MemSpecWideIO2.h \
+    src/simulation/dram/DramWideIO2.h \
+    src/controller/checker/CheckerWideIO2.h
     #src/common/third_party/json/include/nlohmann/json.hpp \
 
 thermalsim = $$(THERMALSIM)

DRAMSys/library/src/configuration/memspec/MemSpec.cpp

@@ -35,8 +35,8 @@
 
 #include "MemSpec.h"
 
-#include <systemc>
-#include <tlm>
+#include <systemc.h>
+#include <tlm.h>
 #include "../../controller/Command.h"
 #include "../Configuration.h"
 

DRAMSys/library/src/configuration/memspec/MemSpecDDR3.h

@@ -38,7 +38,7 @@
 
 #include "MemSpec.h"
 
-struct MemSpecDDR3 : public MemSpec
+struct MemSpecDDR3 final : public MemSpec
 {
     // Memspec Variables:
     sc_time tCKE;       // min time in pdna or pdnp
@@ -78,11 +78,11 @@ struct MemSpecDDR3 : public MemSpec
     double iDD3P0;
     double iDD3P1;
 
-    sc_time getRefreshIntervalAB() const override;
-    sc_time getRefreshIntervalPB() const override;
+    virtual sc_time getRefreshIntervalAB() const override;
+    virtual sc_time getRefreshIntervalPB() const override;
 
-    sc_time getExecutionTime(Command) const override;
-    TimeInterval getIntervalOnDataStrobe(Command) const override;
+    virtual sc_time getExecutionTime(Command) const override;
+    virtual TimeInterval getIntervalOnDataStrobe(Command) const override;
 };
 
 #endif // MEMSPECDDR3_H

DRAMSys/library/src/configuration/memspec/MemSpecDDR4.h

@@ -38,7 +38,7 @@
 
 #include "MemSpec.h"
 
-struct MemSpecDDR4 : public MemSpec
+struct MemSpecDDR4 final : public MemSpec
 {
     // Memspec Variables:
     sc_time tCKE;       // min time in pdna or pdnp
@@ -84,11 +84,11 @@ struct MemSpecDDR4 : public MemSpec
     double iDD62;
     double vDD2;
 
-    sc_time getRefreshIntervalPB() const override;
-    sc_time getRefreshIntervalAB() const override;
+    virtual sc_time getRefreshIntervalPB() const override;
+    virtual sc_time getRefreshIntervalAB() const override;
 
-    sc_time getExecutionTime(Command) const override;
-    TimeInterval getIntervalOnDataStrobe(Command) const override;
+    virtual sc_time getExecutionTime(Command) const override;
+    virtual TimeInterval getIntervalOnDataStrobe(Command) const override;
 };
 
 #endif // MEMSPECDDR4_H

DRAMSys/library/src/configuration/memspec/MemSpecLPDDR4.h

@@ -38,7 +38,7 @@
 
 #include "MemSpec.h"
 
-struct MemSpecLPDDR4 : public MemSpec
+struct MemSpecLPDDR4 final : public MemSpec
 {
     MemSpecLPDDR4();
 
@@ -75,11 +75,11 @@ struct MemSpecLPDDR4 : public MemSpec
     // Currents and Voltages:
     // TODO: to be completed
 
-    sc_time getRefreshIntervalPB() const override;
-    sc_time getRefreshIntervalAB() const override;
+    virtual sc_time getRefreshIntervalPB() const override;
+    virtual sc_time getRefreshIntervalAB() const override;
 
-    sc_time getExecutionTime(Command) const override;
-    TimeInterval getIntervalOnDataStrobe(Command) const override;
+    virtual sc_time getExecutionTime(Command) const override;
+    virtual TimeInterval getIntervalOnDataStrobe(Command) const override;
 };
 
 #endif // MEMSPECLPDDR4_H

DRAMSys/library/src/configuration/memspec/MemSpecWideIO.h

@@ -38,7 +38,7 @@
 
 #include "MemSpec.h"
 
-struct MemSpecWideIO : public MemSpec
+struct MemSpecWideIO final : public MemSpec
 {
     // Memspec Variables:
     sc_time tCKE;       // min time in pdna or pdnp
@@ -88,11 +88,11 @@ struct MemSpecWideIO : public MemSpec
     double iDD62;
     double vDD2;
 
-    sc_time getRefreshIntervalPB() const override;
-    sc_time getRefreshIntervalAB() const override;
+    virtual sc_time getRefreshIntervalPB() const override;
+    virtual sc_time getRefreshIntervalAB() const override;
 
-    sc_time getExecutionTime(Command) const override;
-    TimeInterval getIntervalOnDataStrobe(Command) const override;
+    virtual sc_time getExecutionTime(Command) const override;
+    virtual TimeInterval getIntervalOnDataStrobe(Command) const override;
 };
 
 #endif // MEMSPECWIDEIO_H

DRAMSys/library/src/configuration/memspec/MemSpecWideIO2.h

@@ -38,7 +38,7 @@
 
 #include "MemSpec.h"
 
-struct MemSpecWideIO2 : public MemSpec
+struct MemSpecWideIO2 final : public MemSpec
 {
     // Memspec Variables:
     sc_time tDQSCK;
@@ -69,11 +69,11 @@ struct MemSpecWideIO2 : public MemSpec
     // Currents and Voltages:
     // TODO: to be completed
 
-    sc_time getRefreshIntervalPB() const override;
-    sc_time getRefreshIntervalAB() const override;
+    virtual sc_time getRefreshIntervalPB() const override;
+    virtual sc_time getRefreshIntervalAB() const override;
 
-    sc_time getExecutionTime(Command) const override;
-    TimeInterval getIntervalOnDataStrobe(Command) const override;
+    virtual sc_time getExecutionTime(Command) const override;
+    virtual TimeInterval getIntervalOnDataStrobe(Command) const override;
 };
 
 #endif // MEMSPECWIDEIO2_H

DRAMSys/library/src/controller/Controller.cpp

@@ -45,6 +45,7 @@
 #include "checker/CheckerDDR4.h"
 #include "checker/CheckerWideIO.h"
 #include "checker/CheckerLPDDR4.h"
+#include "checker/CheckerWideIO2.h"
 #include "refresh/RefreshManager.h"
 #include "refresh/RefreshManagerDummy.h"
 #include "refresh/RefreshManagerBankwise.h"
@@ -68,6 +69,8 @@ Controller::Controller(sc_module_name name) :
         checker = new CheckerWideIO();
     else if (memSpec->MemoryType == "LPDDR4")
         checker = new CheckerLPDDR4();
+    else if (memSpec->MemoryType == "WIDEIO2")
+        checker = new CheckerWideIO2();
     else
         SC_REPORT_FATAL("Controller", "Unsupported DRAM type");
 

DRAMSys/library/src/controller/checker/CheckerDDR3.h

@@ -45,8 +45,8 @@ class CheckerDDR3 final : public CheckerIF
 {
 public:
     CheckerDDR3();
-    sc_time delayToSatisfyConstraints(Command, Rank, BankGroup, Bank) const;
-    void insert(Command, Rank, BankGroup, Bank);
+    virtual sc_time delayToSatisfyConstraints(Command, Rank, BankGroup, Bank) const override;
+    virtual void insert(Command, Rank, BankGroup, Bank) override;
 
 private:
     const MemSpecDDR3 *memSpec;

DRAMSys/library/src/controller/checker/CheckerDDR4.h

@@ -45,8 +45,8 @@ class CheckerDDR4 final : public CheckerIF
 {
 public:
     CheckerDDR4();
-    sc_time delayToSatisfyConstraints(Command, Rank, BankGroup, Bank) const;
-    void insert(Command, Rank, BankGroup, Bank);
+    virtual sc_time delayToSatisfyConstraints(Command, Rank, BankGroup, Bank) const override;
+    virtual void insert(Command, Rank, BankGroup, Bank) override;
 
 private:
     const MemSpecDDR4 *memSpec;

DRAMSys/library/src/controller/checker/CheckerLPDDR4.h

@@ -45,8 +45,8 @@ class CheckerLPDDR4 final : public CheckerIF
 {
 public:
     CheckerLPDDR4();
-    sc_time delayToSatisfyConstraints(Command, Rank, BankGroup, Bank) const;
-    void insert(Command, Rank, BankGroup, Bank);
+    virtual sc_time delayToSatisfyConstraints(Command, Rank, BankGroup, Bank) const override;
+    virtual void insert(Command, Rank, BankGroup, Bank) override;
 
 private:
     const MemSpecLPDDR4 *memSpec;

DRAMSys/library/src/controller/checker/CheckerWideIO.h

@@ -45,8 +45,8 @@ class CheckerWideIO final : public CheckerIF
 {
 public:
     CheckerWideIO();
-    sc_time delayToSatisfyConstraints(Command, Rank, BankGroup, Bank) const;
-    void insert(Command, Rank, BankGroup, Bank);
+    virtual sc_time delayToSatisfyConstraints(Command, Rank, BankGroup, Bank) const override;
+    virtual void insert(Command, Rank, BankGroup, Bank) override;
 
 private:
     const MemSpecWideIO *memSpec;

DRAMSys/library/src/controller/checker/CheckerWideIO2.cpp

@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2019, University of Kaiserslautern
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Lukas Steiner
+ */
+
+#include "CheckerWideIO2.h"
+
+CheckerWideIO2::CheckerWideIO2()
+{
+    Configuration &config = Configuration::getInstance();
+    memSpec = dynamic_cast<MemSpecWideIO2 *>(config.memSpec);
+    if (memSpec == nullptr)
+        SC_REPORT_FATAL("CheckerWideIO2", "Wrong MemSpec chosen");
+
+    lastScheduledByCommandAndBank = std::vector<std::vector<sc_time>>
+            (numberOfCommands(), std::vector<sc_time>(memSpec->NumberOfBanks));
+    lastScheduledByCommandAndRank = std::vector<std::vector<sc_time>>
+            (numberOfCommands(), std::vector<sc_time>(memSpec->NumberOfRanks));
+    lastScheduledByCommand = std::vector<sc_time>(numberOfCommands());
+
+    lastActivates = std::vector<std::queue<sc_time>>(memSpec->NumberOfRanks);
+}
+
+sc_time CheckerWideIO2::delayToSatisfyConstraints(Command command, Rank rank, BankGroup, Bank bank) const
+{
+    return SC_ZERO_TIME;
+}
+
+void CheckerWideIO2::insert(Command command, Rank rank, BankGroup, Bank bank)
+{
+    PRINTDEBUGMESSAGE("CheckerWideIO2", "Changing state on bank " + bank.ID()
+                      + " command is " + commandToString(command));
+
+    lastScheduledByCommandAndBank[command][bank.ID()] = sc_time_stamp();
+    lastScheduledByCommandAndRank[command][rank.ID()] = sc_time_stamp();
+    lastScheduledByCommand[command] = sc_time_stamp();
+    lastCommandOnBus = sc_time_stamp();
+
+    if (command == Command::ACT || command == Command::REFB)
+    {
+        if (lastActivates[rank.ID()].size() == 4)
+            lastActivates[rank.ID()].pop();
+        lastActivates[rank.ID()].push(sc_time_stamp());
+    }
+}

DRAMSys/library/src/controller/checker/CheckerWideIO2.h

@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2019, University of Kaiserslautern
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Lukas Steiner
+ */
+
+#ifndef CHECKERWIDEIO2_H
+#define CHECKERWIDEIO2_H
+
+#include "CheckerIF.h"
+#include <queue>
+#include <vector>
+#include "../../configuration/memspec/MemSpecWideIO2.h"
+#include "../../configuration/Configuration.h"
+
+class CheckerWideIO2 final : public CheckerIF
+{
+public:
+    CheckerWideIO2();
+    virtual sc_time delayToSatisfyConstraints(Command, Rank, BankGroup, Bank) const override;
+    virtual void insert(Command, Rank, BankGroup, Bank) override;
+
+private:
+    const MemSpecWideIO2 *memSpec;
+
+    std::vector<std::vector<sc_time>> lastScheduledByCommandAndBank;
+    std::vector<std::vector<sc_time>> lastScheduledByCommandAndRank;
+    std::vector<sc_time> lastScheduledByCommand;
+    sc_time lastCommandOnBus;
+
+    // Four activate window
+    std::vector<std::queue<sc_time>> lastActivates;
+
+    // PowerDown TODO: Implement this method?
+    //sc_time getTimeConstraintToEnterPowerDown(Command lastCmd, Command pdnCmd) const;
+};
+
+#endif // CHECKERWIDEIO2_H

DRAMSys/library/src/simulation/DRAMSys.cpp

@@ -52,11 +52,12 @@
 #include "../common/utils.h"
 #include "../simulation/TemperatureController.h"
 #include "../error/ecchamming.h"
-#include "DramRecordable.h"
-#include "DramDDR3.h"
-#include "DramDDR4.h"
-#include "DramWideIO.h"
-#include "DramLPDDR4.h"
+#include "dram/DramRecordable.h"
+#include "dram/DramDDR3.h"
+#include "dram/DramDDR4.h"
+#include "dram/DramWideIO.h"
+#include "dram/DramLPDDR4.h"
+#include "dram/DramWideIO2.h"
 #include "../controller/Controller.h"
 #include "../controller/ControllerRecordable.h"
 

DRAMSys/library/src/simulation/DRAMSys.h

@@ -42,7 +42,7 @@
 #include <string>
 #include <systemc.h>
 
-#include "DramRecordable.h"
+#include "dram/Dram.h"
 #include "Arbiter.h"
 #include "TraceGenerator.h"
 #include "ReorderBuffer.h"
@@ -52,6 +52,7 @@
 #include "../common/tlm2_base_protocol_checker.h"
 #include "../error/eccbaseclass.h"
 #include "../controller/GenericController.h"
+#include "../common/TlmRecorder.h"
 
 class DRAMSys : public sc_module
 {
@@ -72,7 +73,6 @@ public:
 
     void logo();
 
-
 private:
 
     std::string traceName;

DRAMSys/library/src/simulation/dram/Dram.cpp

@@ -40,21 +40,21 @@
 #include "Dram.h"
 
 #include <sys/mman.h>
-#include <tlm>
-#include <systemc>
+#include <tlm.h>
+#include <systemc.h>
 #include <tlm_utils/simple_target_socket.h>
 #include <vector>
 #include <array>
 #include <cassert>
 #include <cstdint>
 #include <stdlib.h>
-#include "../common/DebugManager.h"
-#include "../common/dramExtensions.h"
-#include "../common/timingCalculations.h"
-#include "../configuration/Configuration.h"
-#include "../common/protocol.h"
-#include "../common/utils.h"
-#include "../common/third_party/DRAMPower/src/libdrampower/LibDRAMPower.h"
+#include "../../common/DebugManager.h"
+#include "../../common/dramExtensions.h"
+#include "../../common/timingCalculations.h"
+#include "../../configuration/Configuration.h"
+#include "../../common/protocol.h"
+#include "../../common/utils.h"
+#include "../../common/third_party/DRAMPower/src/libdrampower/LibDRAMPower.h"
 
 using namespace tlm;
 using namespace Data;

DRAMSys/library/src/simulation/dram/Dram.h

@@ -40,13 +40,13 @@
 #ifndef DRAM_H
 #define DRAM_H
 
-#include <tlm>
-#include <systemc>
+#include <tlm.h>
+#include <systemc.h>
 #include <tlm_utils/simple_target_socket.h>
-#include "../common/protocol.h"
-#include "../configuration/Configuration.h"
-#include "../configuration/memspec/MemSpec.h"
-#include "../common/third_party/DRAMPower/src/libdrampower/LibDRAMPower.h"
+#include "../../common/protocol.h"
+#include "../../configuration/Configuration.h"
+#include "../../configuration/memspec/MemSpec.h"
+#include "../../common/third_party/DRAMPower/src/libdrampower/LibDRAMPower.h"
 
 using namespace std;
 using namespace tlm;

DRAMSys/library/src/simulation/dram/DramDDR3.cpp

@@ -36,9 +36,9 @@
 #include "DramDDR3.h"
 
 #include "Dram.h"
-#include "../configuration/Configuration.h"
-#include "../common/third_party/DRAMPower/src/libdrampower/LibDRAMPower.h"
-#include "../configuration/memspec/MemSpecDDR3.h"
+#include "../../configuration/Configuration.h"
+#include "../../common/third_party/DRAMPower/src/libdrampower/LibDRAMPower.h"
+#include "../../configuration/memspec/MemSpecDDR3.h"
 
 DramDDR3::DramDDR3(sc_module_name name) : Dram(name)
 {

DRAMSys/library/src/simulation/dram/DramDDR3.h

@@ -36,8 +36,8 @@
 #ifndef DRAMDDR3_H
 #define DRAMDDR3_H
 
-#include <systemc>
-#include <tlm>
+#include <systemc.h>
+#include <tlm.h>
 #include "Dram.h"
 
 class DramDDR3 : public Dram

DRAMSys/library/src/simulation/dram/DramDDR4.cpp

@@ -36,9 +36,9 @@
 #include "DramDDR4.h"
 
 #include "Dram.h"
-#include "../configuration/Configuration.h"
-#include "../common/third_party/DRAMPower/src/libdrampower/LibDRAMPower.h"
-#include "../configuration/memspec/MemSpecDDR4.h"
+#include "../../configuration/Configuration.h"
+#include "../../common/third_party/DRAMPower/src/libdrampower/LibDRAMPower.h"
+#include "../../configuration/memspec/MemSpecDDR4.h"
 
 DramDDR4::DramDDR4(sc_module_name name) : Dram(name)
 {

DRAMSys/library/src/simulation/dram/DramDDR4.h

@@ -36,8 +36,8 @@
 #ifndef DRAMDDR4_H
 #define DRAMDDR4_H
 
-#include <systemc>
-#include <tlm>
+#include <systemc.h>
+#include <tlm.h>
 #include "Dram.h"
 
 class DramDDR4 : public Dram

DRAMSys/library/src/simulation/dram/DramLPDDR4.cpp

@@ -35,7 +35,7 @@
 
 #include "DramLPDDR4.h"
 
-#include "../configuration/memspec/MemSpecLPDDR4.h"
+#include "../../configuration/memspec/MemSpecLPDDR4.h"
 
 DramLPDDR4::DramLPDDR4(sc_module_name name) : Dram(name)
 {

DRAMSys/library/src/simulation/dram/DramLPDDR4.h

@@ -36,8 +36,8 @@
 #ifndef DRAMLPDDR4_H
 #define DRAMLPDDR4_H
 
-#include <systemc>
-#include <tlm>
+#include <systemc.h>
+#include <tlm.h>
 #include "Dram.h"
 
 class DramLPDDR4 : public Dram

DRAMSys/library/src/simulation/dram/DramRecordable.cpp

@@ -34,14 +34,16 @@
  */
 
 #include "DramRecordable.h"
-#include <systemc>
-#include <tlm>
-#include "../common/TlmRecorder.h"
+
+#include <systemc.h>
+#include <tlm.h>
+#include "../../common/TlmRecorder.h"
+#include "../../common/utils.h"
 #include "DramDDR3.h"
 #include "DramDDR4.h"
 #include "DramWideIO.h"
 #include "DramLPDDR4.h"
-#include "../common/utils.h"
+#include "DramWideIO2.h"
 
 using namespace tlm;
 
@@ -144,4 +146,5 @@ template class DramRecordable<DramDDR3>;
 template class DramRecordable<DramDDR4>;
 template class DramRecordable<DramWideIO>;
 template class DramRecordable<DramLPDDR4>;
+template class DramRecordable<DramWideIO2>;
 

DRAMSys/library/src/simulation/dram/DramRecordable.h

@@ -36,11 +36,11 @@
 #ifndef DRAMRECORDABLE_H
 #define DRAMRECORDABLE_H
 
-#include <systemc>
-#include <tlm>
-#include "DramDDR3.h"
-#include "DramDDR4.h"
-#include "../common/TlmRecorder.h"
+#include <systemc.h>
+#include <tlm.h>
+#include "../../common/TlmRecorder.h"
+#include "../../configuration/Configuration.h"
+#include "../../common/third_party/DRAMPower/src/libdrampower/LibDRAMPower.h"
 
 using namespace tlm;
 
@@ -50,12 +50,11 @@ class DramRecordable final : public BaseDram
 public:
     DramRecordable(sc_module_name, TlmRecorder *);
     SC_HAS_PROCESS(DramRecordable);
-
     ~DramRecordable();
 
 private:
-    tlm_sync_enum nb_transport_fw(tlm_generic_payload &payload,
-                                          tlm_phase &phase, sc_time &delay);
+    virtual tlm_sync_enum nb_transport_fw(tlm_generic_payload &payload,
+                                          tlm_phase &phase, sc_time &delay) override;
     TlmRecorder *tlmRecorder;
 
     libDRAMPower *DRAMPower;

DRAMSys/library/src/simulation/dram/DramWideIO.cpp

@@ -35,13 +35,13 @@
 
 #include "DramWideIO.h"
 
-#include <systemc>
-#include <tlm>
+#include <systemc.h>
+#include <tlm.h>
 #include "Dram.h"
-#include "../configuration/Configuration.h"
-#include "../error/errormodel.h"
-#include "../common/third_party/DRAMPower/src/libdrampower/LibDRAMPower.h"
-#include "../configuration/memspec/MemSpecWideIO.h"
+#include "../../configuration/Configuration.h"
+#include "../../error/errormodel.h"
+#include "../../common/third_party/DRAMPower/src/libdrampower/LibDRAMPower.h"
+#include "../../configuration/memspec/MemSpecWideIO.h"
 
 using namespace tlm;
 

DRAMSys/library/src/simulation/dram/DramWideIO.h

@@ -36,10 +36,10 @@
 #ifndef DRAMWIDEIO_H
 #define DRAMWIDEIO_H
 
-#include <systemc>
-#include <tlm>
+#include <systemc.h>
+#include <tlm.h>
 #include "Dram.h"
-#include "../error/errormodel.h"
+#include "../../error/errormodel.h"
 
 using namespace tlm;
 
@@ -48,12 +48,11 @@ class DramWideIO : public Dram
 public:
     DramWideIO(sc_module_name);
     SC_HAS_PROCESS(DramWideIO);
-
     virtual ~DramWideIO();
 
 protected:
     virtual tlm_sync_enum nb_transport_fw(tlm_generic_payload &payload,
-                                          tlm_phase &phase, sc_time &delay);
+                                          tlm_phase &phase, sc_time &delay) override;
 
 private:
     std::vector<errorModel *> ememory;

DRAMSys/library/src/simulation/dram/DramWideIO2.cpp

@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2019, University of Kaiserslautern
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors:
+ *    Lukas Steiner
+ */
+
+#include "DramWideIO2.h"
+
+#include "Dram.h"
+#include "../../configuration/Configuration.h"
+#include "../../common/third_party/DRAMPower/src/libdrampower/LibDRAMPower.h"
+#include "../../configuration/memspec/MemSpecWideIO2.h"
+
+DramWideIO2::DramWideIO2(sc_module_name name) : Dram(name)
+{
+    if (StoreMode == StorageMode::ErrorModel)
+        SC_REPORT_FATAL("DramWideIO2", "Error Model not supported for WideIO2");
+
+    // Parameters for DRAMPower
+    MemSpecWideIO2 *memSpec = dynamic_cast<MemSpecWideIO2 *>(this->memSpec);
+    if (memSpec == nullptr)
+        SC_REPORT_FATAL("DramWideIO2", "Wrong MemSpec chosen");
+
+    if (Configuration::getInstance().PowerAnalysis)
+    {
+        SC_REPORT_FATAL("DramWideIO2", "DRAMPower not supported for WideIO2");
+    }
+    else
+        DRAMPower = new libDRAMPowerDummy();
+}

DRAMSys/library/src/simulation/dram/DramWideIO2.h

@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2019, University of Kaiserslautern
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors:
+ *    Lukas Steiner
+ */
+
+#ifndef DRAMWIDEIO2_H
+#define DRAMWIDEIO2_H
+
+#include <systemc.h>
+#include <tlm.h>
+#include "Dram.h"
+
+using namespace tlm;
+
+class DramWideIO2 : public Dram
+{
+public:
+    DramWideIO2(sc_module_name);
+    SC_HAS_PROCESS(DramWideIO2);
+    virtual ~DramWideIO2() {}
+};
+
+#endif // DRAMWIDEIO2_H