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334df18dce9857fb33b96d991dee5d12001450e4
gem5/src/dev
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Bobby R. Bruce 334df18dce arch-riscv: Add bootloader+kernel workload (#390) 
Aims to boot OpenSBI + Linux kernel.
2023-10-18 09:17:12 -07:00
..
amdgpu
misc: Run pre-commit run --all-files
2023-10-10 14:01:58 -07:00
arm
misc: Run pre-commit run --all-files
2023-10-10 14:01:58 -07:00
hsa
dev-hsa,gpu-compute: Add timestamps to AMD HSA signals
2023-10-06 13:21:40 -05:00
i2c
misc: Stop excluding code when building the NULL ISA.
2022-08-20 07:30:07 +00:00
lupio
misc: Run pre-commit run --all-files
2023-10-10 14:01:58 -07:00
mips
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
net
arch,base,dev,sim: Convert objects to use the HostSocket param type.
2023-04-12 02:18:22 +00:00
pci
misc: Run pre-commit run --all-files
2023-10-10 14:01:58 -07:00
ps2
dev: Remove a couple of deprecated namespaces
2023-01-17 09:16:20 +00:00
qemu
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
riscv
arch-riscv,dev: Add HiFive Base Platform
2023-03-02 21:12:46 +00:00
serial
dev,arch-riscv: Mark gem5's 8250 UART as 16550a compatible
2023-10-06 00:48:12 -07:00
sparc
misc: Run pre-commit run --all-files
2023-10-10 14:01:58 -07:00
storage
misc: Fix 'unused variable' clang errors with gem5.fast
2023-05-08 22:54:06 +00:00
virtio
misc: Stop excluding code when building the NULL ISA.
2022-08-20 07:30:07 +00:00
x86
mem,arch-arm,mem-ruby,cpu: Remove use of deprecated base port owner
2023-02-03 06:11:45 +00:00
baddev.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
baddev.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
BadDevice.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
Device.py
misc: Use python f-strings for string formatting
2023-03-16 09:05:29 +00:00
dma_device.cc
dev: Warn when resp packet is error in dma port
2023-07-07 07:12:54 +00:00
dma_device.hh
cpu,mem,dev: Use Addr for cacheLineSize
2023-09-20 14:16:46 -07:00
dma_virt_device.cc
misc: Remove AMD license addition
2021-12-11 04:00:56 +00:00
dma_virt_device.hh
misc: Remove AMD license addition
2021-12-11 04:00:56 +00:00
intel_8254_timer.cc
dev: Refactor how counters are set up in the 8254 timer.
2022-01-16 03:43:58 +00:00
intel_8254_timer.hh
dev: Refactor how counters are set up in the 8254 timer.
2022-01-16 03:43:58 +00:00
intpin.hh
fastmodel,dev: Rework the Int*Pin classes with Signal*Port.
2022-12-16 07:19:05 +00:00
IntPin.py
misc: Run pre-commit run --all-files
2023-10-10 14:01:58 -07:00
io_device.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
io_device.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
isa_fake.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
isa_fake.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
mc146818.cc
dev: Ignore MC146818 UIP bit / Fix x86 Linux 5.11+ boot
2023-01-17 16:43:10 +00:00
mc146818.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
pixelpump.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
pixelpump.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
platform.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
platform.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
Platform.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
reg_bank.hh
dev: add method to set initial register value out of constructor.
2023-02-15 02:07:09 +00:00
reg_bank.test.cc
dev: add method to set initial register value out of constructor.
2023-02-15 02:07:09 +00:00
ResetPort.py
misc: Run pre-commit run --all-files
2023-10-10 14:01:58 -07:00
rtcreg.h
misc: Run pre-commit run on all files in repo
2022-08-24 21:47:07 +00:00
SConscript
fastmodel,dev: Replace the reset port with a Signal*Port<bool>.
2022-12-16 07:19:05 +00:00