Commit Graph

  • 529e502f05 x86: Separate system call tables into their own files. Gabe Black 2020-10-20 17:37:13 -07:00
  • 81c5ca17be arm: Implement an SE workload for Linux and FreeBSD. Gabe Black 2020-10-20 17:37:10 -07:00
  • 0ab84ea848 arch: Re-add copyrights that were accidentally removed. Gabe Black 2020-10-27 21:28:55 -07:00
  • 642fc59b29 sim: Add a missing include to sim/syscall_abi.hh. Gabe Black 2020-10-26 18:29:47 -07:00
  • b6a08919e9 sim: Replace any getDTBPtr/getITBPtr usage Giacomo Travaglini 2020-09-13 12:53:05 +01:00
  • 40d28262cb tests: fix dezip of ubuntu images in long regr mupton 2020-10-26 14:58:22 -07:00
  • 5500400950 arch-x86: Replace any getDTBPtr/getITBPtr usage Giacomo Travaglini 2020-09-13 12:13:59 +01:00
  • 18f2e3ab3c arch-sparc: Replace any getDTBPtr/getITBPtr usage Giacomo Travaglini 2020-09-13 15:44:29 +01:00
  • f28b2e773f arch-riscv: Replace any getDTBPtr/getITBPtr usage Giacomo Travaglini 2020-09-13 12:44:18 +01:00
  • 4eb2360001 sparc: Remove support for Solaris SE mode. Gabe Black 2020-10-20 17:37:00 -07:00
  • 175355f71e sparc: Implement an SE workload for Linux and Solaris. Gabe Black 2020-10-20 17:36:57 -07:00
  • 3a49ed0156 gpu: Use X86ISA instead of TheISA in src/gpu-compute. Gabe Black 2020-10-21 04:32:46 -07:00
  • 26ed502d4c power: Implement an SE workload for Linux. Gabe Black 2020-10-20 17:37:05 -07:00
  • bfad4b77d0 x86: Delegate process loading to the EmuLinux workload. Gabe Black 2020-10-20 17:36:54 -07:00
  • ab474613bc mem: Replace any getDTBPtr/getITBPtr usage Giacomo Travaglini 2020-09-14 09:55:49 +01:00
  • f07dbdacfd fastmodel: Fix up for the new standardized create() methods. Gabe Black 2020-10-15 13:15:52 -07:00
  • 0d091f6e07 mem-cache: Implement FPC cache compressor Daniel R. Carvalho 2018-07-05 14:53:15 +02:00
  • a9cce6d645 mem-cache: Make (de)compression latencies params Daniel R. Carvalho 2020-10-22 18:45:12 +02:00
  • 8bee8630c1 python: Add support for Proxy division Daniel R. Carvalho 2020-10-22 13:34:24 +02:00
  • 8f68d9d1be mem-cache: Undefine compression ratio of perfect compression Daniel R. Carvalho 2020-10-22 20:30:40 +02:00
  • 9a8985a57f util: Fix an incorrect print statement in git pre-commit hook Hoa Nguyen 2020-10-23 01:43:27 -07:00
  • ad5fa9ebe4 arch-arm: Fix implementation of TLBI ALLEx instructions Giacomo Travaglini 2020-09-17 17:31:55 +01:00
  • 32d88ae46c arch-arm: Rewrite the TLB flushing interface Giacomo Travaglini 2020-09-18 14:53:46 +01:00
  • 2a91ea7586 arch-arm: Reimplement TLB::flushAll Giacomo Travaglini 2020-09-18 15:08:52 +01:00
  • 1a897957d6 arch-arm: TLBIALL/TLBIASID/TLBIMVA base classes for I/D flavours Giacomo Travaglini 2020-09-18 14:30:09 +01:00
  • 4af84816a4 scons: Don't check for Python 2 Andreas Sandberg 2020-10-23 10:49:43 +01:00
  • bc2e12321a scons: Test if binaries can embed the Python interpreter Andreas Sandberg 2020-10-21 17:41:56 +01:00
  • 74005aa8d6 misc: Replace enable_if<>::type with enable_if_t<>. Gabe Black 2020-10-22 21:52:26 -07:00
  • 360b7b06a4 dev-arm: Fix VExpressFastmodel interrupt configs Yu-hsin Wang 2020-10-22 18:12:06 +08:00
  • a79ce29cd6 x86: Move syscall handling for Linux into the EmuLinux workload. Gabe Black 2020-10-20 17:36:50 -07:00
  • 4e6339acd2 x86: Create an SEWorkload for x86 linux. Gabe Black 2020-10-20 17:44:44 -07:00
  • e3d8b93142 base,sim: Move BitUnion serialization support to bitunion.hh. Gabe Black 2020-10-20 19:53:47 -07:00
  • 31fc4b24fc sim: Move the serialization backend handlers to their own header. Gabe Black 2020-10-20 19:25:21 -07:00
  • f62d1862e0 sim: Refactor how serialization types are handled in the backend. Gabe Black 2020-10-20 19:17:18 -07:00
  • f9bd874b7f base: Narrow the applicability of the default to_number. Gabe Black 2020-10-20 19:11:07 -07:00
  • 37146cb942 sim: Fix API comments for optParamIn. Gabe Black 2020-10-20 19:03:00 -07:00
  • edccff8f23 sim: Generalize the arrayParamOut and arrayParamIn functions. Gabe Black 2020-10-20 21:11:53 -07:00
  • efabe5ec1b mem-ruby: L1/L2 hit/miss tracking for MOESI_AMD_BASE/GPU_VIPER Daniel Gerzhoy 2020-09-23 17:22:17 -04:00
  • 85ede9a180 mem-ruby: L3 hit/miss tracking to MOESI_AMD_BASE-dir Daniel Gerzhoy 2020-09-23 16:39:08 -04:00
  • 076a0e1f5f mem-garnet: Fix garnet network interface stats jiemingyin 2020-10-21 19:43:05 -04:00
  • 3ecc998514 misc: Update my email address. Gabe Black 2020-10-21 05:37:13 -07:00
  • bd03072062 configs: Use absolute path for VirtIO9PDiod default root Yu-hsin Wang 2020-10-21 18:25:34 +08:00
  • c70b4e28c4 configs: Fix FastmodelCluster cpu initialization Yu-hsin Wang 2020-10-21 18:23:00 +08:00
  • 7bcef5c048 misc: Fix a few accidental transitive includes. Gabe Black 2020-10-20 19:50:28 -07:00
  • 368e5a492b sim: Implement optParamIn using paramIn. Gabe Black 2020-10-20 18:46:02 -07:00
  • c1217f4e89 arch: Use getTlb in BaseMMU to reduce boilerplate Giacomo Travaglini 2020-10-06 11:18:46 +01:00
  • f6a3e0a2fd arch-arm: Replace any getDTBPtr/getITBPtr usage Giacomo Travaglini 2020-09-13 11:37:55 +01:00
  • a07fd8fe41 cpu: Remove unused demapInstPage and demapDataPage Giacomo Travaglini 2020-09-11 22:14:28 +01:00
  • 330a5f7bad misc: BaseCPU using ArchMMU instead of ArchDTB/ArchITB Giacomo Travaglini 2019-12-13 00:18:47 +00:00
  • 85a36581d4 cpu-kvm, arch-x86: Fix KVM on Intel platforms Jason Lowe-Power 2018-08-28 18:50:21 -07:00
  • f612d836fc dev-arm: Adding a SRAM in VExpress_GEM5_V1 Giacomo Travaglini 2019-05-13 10:32:13 +01:00
  • 257834d23f scons: Raise an exception when scons is run a Python2 environment Hoa Nguyen 2020-10-15 14:08:41 -07:00
  • 2f3f146034 misc: Minor updates to CONTRIBUTING.md Jason Lowe-Power 2020-10-16 15:15:57 -07:00
  • 215e12b884 misc: Wrap __attribute__((aligned())) in a macro in compiler.hh. Gabe Black 2020-10-14 01:09:21 -07:00
  • 463cb28ca5 misc: Use compiler.hh macros when available. Gabe Black 2020-10-14 00:38:42 -07:00
  • b3dc64acb9 arch-arm: Implement ArmPMU DTB generation Giacomo Travaglini 2020-09-24 13:26:53 +01:00
  • 24bada6835 dev: Use generateFdtProperty in the PioDevice Giacomo Travaglini 2020-09-28 17:48:58 +01:00
  • aee7bb1769 dev-arm: Use generateFdtProperty in the GenericTimer Giacomo Travaglini 2020-09-28 17:36:30 +01:00
  • 328880aaa9 dev-arm: Automate FdtProperty generation with ArmInterruptPin Giacomo Travaglini 2020-09-28 17:33:57 +01:00
  • 007f2d9533 dev-arm, fastmodel: Rewrite Gic.interruptCells Giacomo Travaglini 2020-10-16 11:09:44 +01:00
  • 1c5bbb6e1a dev-arm: Define ArmInterruptType Giacomo Travaglini 2020-09-28 17:27:39 +01:00
  • ab482789ab configs: Make GPU_VIPER config python3 friendly Matthew Poremba 2020-10-09 20:57:21 -05:00
  • 834d28c792 configs: python3 compatibility for apu_se Kyle Roarty 2020-10-15 16:29:53 -05:00
  • 9c826b8f19 util: Update GCN dockerfile for python3 Kyle Roarty 2020-10-15 16:21:52 -05:00
  • 370cfb078c sim,python: Flip logic on loopback listeners Jason Lowe-Power 2020-10-15 16:46:23 -07:00
  • 9be18aa66d dev: Rework how PCI BARs are set up in python and C++. Gabe Black 2020-10-02 03:00:04 -07:00
  • b20cc7e6d8 gpu-compute,mem-ruby: Properly create/handle WriteCompletePkts Kyle Roarty 2020-08-28 17:42:10 -05:00
  • 41958f4afe configs: Remove dangling reference to bus port in devices.py Giacomo Travaglini 2020-10-07 13:41:39 +01:00
  • edf8b34026 base: Clean up some #ifs in _format_string. Gabe Black 2020-10-14 01:21:41 -07:00
  • 91d83cc8a1 misc: Standardize the way create() constructs SimObjects. Gabe Black 2020-10-07 06:49:23 -07:00
  • aeb39c1441 ext: Add support for comma-separated inputs of testlib argparser Hoa Nguyen 2020-09-08 13:04:14 -07:00
  • 2ae079c6be cpu: Remove automatic overriding of numThreads in SE on O3. Gabe Black 2020-10-11 17:26:10 -07:00
  • 05e60080dc arch-arm: Implement Armv8.2-LPA Jordi Vaquero 2020-07-03 09:58:51 +02:00
  • e90fb2ca4f arch-arm: Implement Armv8.2-LVA Jordi Vaquero 2020-06-25 10:54:59 +02:00
  • ab65f6acc5 systemc: Use the new M5_WEAK macro to hide [[gnu::weak]]. Gabe Black 2020-10-13 04:01:00 -07:00
  • 1e0bc0df25 base: Add an M5_WEAK macro to compiler.hh. Gabe Black 2020-10-13 03:59:34 -07:00
  • 34c2a5a227 fastmodel: Update to c++14, and add some missing consts. Gabe Black 2020-10-10 03:55:28 -07:00
  • b3e8097f34 python: Remove a call to reduce() from code_formatter.py. Gabe Black 2020-10-13 05:00:37 -07:00
  • df6269b634 cpu: Change how O3 handles requests for SMT in full system. Gabe Black 2020-10-11 17:19:51 -07:00
  • 539247a4c7 cpu: Remove the "SingleThreaded" fetch policy from the O3 CPU. Gabe Black 2020-10-11 17:03:50 -07:00
  • 7681fd2edd misc: Remove an extra file in src/cpu Hoa Nguyen 2020-10-13 01:21:48 -07:00
  • 58a30eeea6 mem-ruby: allow qualifiers in SLICC functions Tiago Mück 2019-09-09 19:13:52 -05:00
  • c7fabb979c mem-ruby: more specialized address to node mapping Tiago Mück 2019-09-04 12:26:02 -05:00
  • 544bf8bde7 mem-ruby: Expose MessageBuffer methods Tiago Mück 2020-05-28 12:31:03 -05:00
  • cb48ce2a34 mem-ruby: add addressOffset util Tiago Mück 2020-06-05 12:55:42 -05:00
  • 7e738c00d2 fastmodel: Add a wrapper for the CortexR52. Gabe Black 2020-08-04 00:46:52 -07:00
  • ad704c25fd util: Add a copyright to gem5img.py. Gabe Black 2020-10-10 04:08:10 -07:00
  • b489e49c68 configs,tests: Update configs to use compatible SE workloads. Gabe Black 2020-08-31 23:00:27 -07:00
  • 14bdba8c66 arch: Use finditer in the (Sub)OperandList classes. Gabe Black 2020-09-29 21:11:19 -07:00
  • a44460bf3d arch: Pull the (Sub)OperandList classes into their own file. Gabe Black 2020-09-29 21:04:30 -07:00
  • 523d42d1ce mem-cache: Create ReplacementPolicy namespace Daniel R. Carvalho 2019-12-28 23:38:21 +01:00
  • 0d5a80cb46 mem-ruby: detailed transaction latency profiling Tiago Mück 2020-07-16 11:37:22 -05:00
  • 60df5a4d44 mem-ruby: expose transition info to actions Tiago Mück 2020-07-16 11:14:40 -05:00
  • 64a3e28852 mem-ruby: change MessageBuffer randomization param Tiago Mück 2020-06-19 21:16:45 -05:00
  • f8e3ba7b7b mem-ruby: sequencer callback for unique writes Tiago Mück 2020-06-08 19:01:14 -05:00
  • 1a512d8f77 mem-ruby: move AddrRange propagation to RubyPort Tiago Mück 2020-06-01 18:08:03 -05:00
  • ab309b9e4e mem-ruby: Sequencer can be used without cache Tiago Mück 2020-05-28 16:16:20 -05:00
  • aa8bca47f4 mem-ruby: int to Cycle converter Tiago Mück 2020-05-27 16:40:33 -05:00
  • afdbe98b17 mem-ruby: support for template types in structs Tiago Mück 2020-04-29 18:04:21 -05:00
  • 5a9fe54d58 mem-ruby: added function to check addr range Tiago Mück 2020-02-25 17:26:05 -06:00