configs,tests: Update configs to use compatible SE workloads.

If there's no more compatible workload than the base SEWorkload class it
will fall back to that for now.

Change-Id: Id27172c3074a7976823a891878ab9eecf6246c47
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33901
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>

configs/example/apu_se.py

@@ -501,7 +501,7 @@ system = System(cpu = cpu_list,
                 mem_ranges = [AddrRange(options.mem_size)],
                 cache_line_size = options.cacheline_size,
                 mem_mode = mem_mode,
-                workload = SEWorkload())
+                workload = SEWorkload.init_compatible(executable))
 if fast_forward:
     system.future_cpu = future_cpu_list
 system.voltage_domain = VoltageDomain(voltage = options.sys_voltage)

configs/example/arm/starter_se.py

@@ -171,7 +171,7 @@ def create(args):
               (len(processes), args.num_cores))
         sys.exit(1)
 
-    system.workload = SEWorkload()
+    system.workload = SEWorkload.init_compatible(processes[0].executable)
 
     # Assign one workload to each CPU
     for cpu, workload in zip(system.cpu_cluster.cpus, processes):

configs/example/hmc_hello.py

@@ -50,7 +50,6 @@ HMC.add_options(parser)
 options = parser.parse_args()
 # create the system we are going to simulate
 system = System()
-system.workload = SEWorkload()
 # use timing mode for the interaction between master-slave ports
 system.mem_mode = 'timing'
 # set the clock fequency of the system
@@ -77,6 +76,8 @@ binary = 'tests/test-progs/hello/bin/' + isa + '/linux/hello'
 process = Process()
 # cmd is a list which begins with the executable (like argv)
 process.cmd = [binary]
+# set the system workload
+system.workload = SEWorkload.init_compatible(binary)
 # set the cpu workload
 system.cpu.workload = process
 # create thread contexts

configs/example/se.py

@@ -169,11 +169,12 @@ if options.smt and options.num_cpus > 1:
     fatal("You cannot use SMT with multiple CPUs!")
 
 np = options.num_cpus
+mp0_path = multiprocesses[0].executable
 system = System(cpu = [CPUClass(cpu_id=i) for i in range(np)],
                 mem_mode = test_mem_mode,
                 mem_ranges = [AddrRange(options.mem_size)],
                 cache_line_size = options.cacheline_size,
-                workload = SEWorkload())
+                workload = SEWorkload.init_compatible(mp0_path))
 
 if numThreads > 1:
     system.multi_thread = True

configs/learning_gem5/part1/simple.py

@@ -94,7 +94,7 @@ thispath = os.path.dirname(os.path.realpath(__file__))
 binary = os.path.join(thispath, '../../../',
                       'tests/test-progs/hello/bin/', isa, 'linux/hello')
 
-system.workload = SEWorkload()
+system.workload = SEWorkload.init_compatible(binary)
 
 # Create a process for a simple "Hello World" application
 process = Process()

configs/learning_gem5/part1/two_level.py

@@ -137,7 +137,7 @@ system.mem_ctrl.dram = DDR3_1600_8x8()
 system.mem_ctrl.dram.range = system.mem_ranges[0]
 system.mem_ctrl.port = system.membus.master
 
-system.workload = SEWorkload()
+system.workload = SEWorkload.init_compatible(binary)
 
 # Create a process for a simple "Hello World" application
 process = Process()

configs/learning_gem5/part2/simple_cache.py

@@ -84,8 +84,6 @@ system.mem_ctrl.port = system.membus.master
 # Connect the system up to the membus
 system.system_port = system.membus.slave
 
-system.workload = SEWorkload()
-
 # Create a process for a simple "Hello World" application
 process = Process()
 # Set the command
@@ -99,6 +97,8 @@ process.cmd = [binpath]
 system.cpu.workload = process
 system.cpu.createThreads()
 
+system.workload = SEWorkload.init_compatible(binpath)
+
 # set up the root SimObject and start the simulation
 root = Root(full_system = False, system = system)
 # instantiate all of the objects we've created above

configs/learning_gem5/part2/simple_memobj.py

@@ -82,8 +82,6 @@ system.mem_ctrl.port = system.membus.master
 # Connect the system up to the membus
 system.system_port = system.membus.slave
 
-system.workload = SEWorkload()
-
 # Create a process for a simple "Hello World" application
 process = Process()
 # Set the command
@@ -97,6 +95,8 @@ process.cmd = [binpath]
 system.cpu.workload = process
 system.cpu.createThreads()
 
+system.workload = SEWorkload.init_compatible(binpath)
+
 # set up the root SimObject and start the simulation
 root = Root(full_system = False, system = system)
 # instantiate all of the objects we've created above

configs/learning_gem5/part3/simple_ruby.py

@@ -89,8 +89,6 @@ thispath = os.path.dirname(os.path.realpath(__file__))
 binary = os.path.join(thispath, '../../../', 'tests/test-progs/threads/bin/',
                       isa, 'linux/threads')
 
-system.workload = SEWorkload()
-
 # Create a process for a simple "multi-threaded" application
 process = Process()
 # Set the command
@@ -101,6 +99,8 @@ for cpu in system.cpu:
     cpu.workload = process
     cpu.createThreads()
 
+system.workload = SEWorkload.init_compatible(binary)
+
 # Set up the pseudo file system for the threads function above
 config_filesystem(system)
 

configs/splash2/cluster.py

@@ -216,8 +216,6 @@ system.clock = '1GHz'
 system.toL2bus = L2XBar(clock = busFrequency)
 system.l2 = L2(size = options.l2size, assoc = 8)
 
-system.workload = SEWorkload()
-
 # ----------------------
 # Connect the L2 cache and memory together
 # ----------------------
@@ -284,6 +282,8 @@ for cluster in clusters:
     for cpu in cluster.cpus:
         cpu.workload = root.workload
 
+system.workload = SEWorkload.init_compatible(root.workload.executable)
+
 # ----------------------
 # Run the simulation
 # ----------------------

configs/splash2/run.py

@@ -195,8 +195,7 @@ else:
 # Create a system, and add system wide objects
 # ----------------------
 system = System(cpu = cpus, physmem = SimpleMemory(),
-                membus = SystemXBar(clock = busFrequency),
-                workload = SEWorkload())
+                membus = SystemXBar(clock = busFrequency))
 system.clock = '1GHz'
 
 system.toL2bus = L2XBar(clock = busFrequency)
@@ -268,6 +267,8 @@ else:
 for cpu in cpus:
     cpu.workload = root.workload
 
+system.workload = SEWorkload.init_compatible(root.workload.executable)
+
 # ----------------------
 # Run the simulation
 # ----------------------

tests/gem5/cpu_tests/run.py

@@ -119,7 +119,7 @@ args = parser.parse_args()
 
 system = System()
 
-system.workload = SEWorkload()
+system.workload = SEWorkload.init_compatible(args.binary)
 
 system.clk_domain = SrcClockDomain()
 system.clk_domain.clock = '1GHz'

tests/gem5/m5threads_test_atomic/atomic_system.py

@@ -40,7 +40,7 @@ args = parser.parse_args()
 root = Root(full_system = False)
 root.system = System()
 
-root.system.workload = SEWorkload()
+root.system.workload = SEWorkload.init_compatible(args.cmd)
 
 root.system.clk_domain = SrcClockDomain()
 root.system.clk_domain.clock = '3GHz'