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mem: Replace any getDTBPtr/getITBPtr usage

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JIRA: https://gem5.atlassian.net/browse/GEM5-790

Change-Id: I0759baec87b3682a057239a6b3b8f79fe3f5592c
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34983
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Giacomo Travaglini
2020-09-14 09:55:49 +01:00
parent f07dbdacfd
commit ab474613bc
1 changed files with 4 additions and 4 deletions
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8
src/mem/translating_port_proxy.cc
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@@ -45,6 +45,7 @@
#include "mem/translating_port_proxy.hh"
#include "arch/generic/mmu.hh"
#include "base/chunk_generator.hh"
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
@@ -61,10 +62,9 @@ TranslatingPortProxy::TranslatingPortProxy(
bool
TranslatingPortProxy::tryTLBsOnce(RequestPtr req, BaseTLB::Mode mode) const
{
BaseTLB *dtb = _tc->getDTBPtr();
BaseTLB *itb = _tc->getDTBPtr();
return dtb->translateFunctional(req, _tc, mode) == NoFault ||
itb->translateFunctional(req, _tc, BaseTLB::Read) == NoFault;
BaseMMU *mmu = _tc->getMMUPtr();
return mmu->translateFunctional(req, _tc, mode) == NoFault ||
mmu->translateFunctional(req, _tc, BaseTLB::Execute) == NoFault;
}
bool