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fastmodel: Fix up for the new standardized create() methods.

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Change-Id: I2e3610b5cad37b67d32907a2c2568b504d5ed113
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/36155
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Gabe Black
2020-10-15 13:15:52 -07:00
parent 0d091f6e07
commit f07dbdacfd
5 changed files with 8 additions and 8 deletions
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4
src/arch/arm/fastmodel/CortexA76/cortex_a76.cc
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@@ -98,8 +98,8 @@ CortexA76::getPort(const std::string &if_name, PortID idx)
return Base::getPort(if_name, idx);
}
CortexA76Cluster::CortexA76Cluster(Params &p) :
SimObject(&p), _params(p), cores(p.cores), evs(p.evs)
CortexA76Cluster::CortexA76Cluster(const Params &p) :
SimObject(p), _params(p), cores(p.cores), evs(p.evs)
{
for (int i = 0; i < p.cores.size(); i++)
p.cores[i]->setCluster(this, i);

6
src/arch/arm/fastmodel/CortexA76/cortex_a76.hh
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@@ -62,8 +62,8 @@ class CortexA76 : public Iris::CPU<CortexA76TC>
const Params &params() { return _params; }
public:
CortexA76(Params &p) : Base(&p, scx::scx_get_iris_connection_interface()),
_params(p)
CortexA76(const Params &p) :
Base(p, scx::scx_get_iris_connection_interface()), _params(p)
{}
void
@@ -110,7 +110,7 @@ class CortexA76Cluster : public SimObject
CortexA76 *getCore(int num) const { return cores.at(num); }
sc_core::sc_module *getEvs() const { return evs; }
CortexA76Cluster(Params &p);
CortexA76Cluster(const Params &p);
const Params &params() { return _params; }
Port &getPort(const std::string &if_name,

2
src/arch/arm/fastmodel/CortexR52/cortex_r52.cc
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@@ -94,7 +94,7 @@ CortexR52::getPort(const std::string &if_name, PortID idx)
}
CortexR52Cluster::CortexR52Cluster(const Params &p) :
SimObject(&p), _params(p), cores(p.cores), evs(p.evs)
SimObject(p), _params(p), cores(p.cores), evs(p.evs)
{
for (int i = 0; i < p.cores.size(); i++)
p.cores[i]->setCluster(this, i);

2
src/arch/arm/fastmodel/CortexR52/cortex_r52.hh
View File

@@ -63,7 +63,7 @@ class CortexR52 : public Iris::CPU<CortexR52TC>
public:
CortexR52(const Params &p) :
Base(&p, scx::scx_get_iris_connection_interface()), _params(p)
Base(p, scx::scx_get_iris_connection_interface()), _params(p)
{}
template <class T>

2
src/arch/arm/fastmodel/GIC/gic.cc
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@@ -297,7 +297,7 @@ SCGIC::before_end_of_elaboration()
}
GIC::GIC(const FastModelGICParams &params) :
BaseGic(&params),
BaseGic(params),
ambaM(params.sc_gic->amba_m, params.name + ".amba_m", -1),
ambaS(params.sc_gic->amba_s, params.name + ".amba_s", -1),
redistributors(params.port_redistributor_connection_count),