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  • 071858595d cpu: In SimpleExecContext, use arrays to map reg classes to stats. Gabe Black 2021-08-11 01:28:51 -07:00
  • 6d27a3bb50 cpu,arch: Turn the read|set*Operand methods into get/setRegOperand. Gabe Black 2021-08-06 21:42:49 -07:00
  • 211c7df045 arch-riscv: fix memory leak problem in page table walker Luming Wang 2022-01-24 08:32:36 +00:00
  • 0d59a8417a ext-testlib: Import MutableSet properly. Gabe Black 2022-02-15 16:22:34 -08:00
  • 78451f6685 gpu-compute: Fix register checking and allocation in dyn manager Kyle Roarty 2022-02-17 15:28:35 -06:00
  • 4d2cbefd1e gpu-compute: Set scratch_base, lds_base for gfx902 Kyle Roarty 2021-12-21 14:55:24 -06:00
  • f5fc1006c3 cpu: fix issues with ruby's memtest Tiago Mück 2022-02-14 15:17:38 -06:00
  • 48aa4692df configs: Allow for no DMAs in Ruby GPU tester Matthew Poremba 2022-02-04 15:26:56 -06:00
  • 5530bd42d5 cpu: Only acquire needed tokens in PTL tester Matthew Poremba 2022-02-03 16:50:18 -06:00
  • 1bc23ca966 mem-ruby: Add protocol prints to MOESI_AMD_BASE-dma Matthew Poremba 2022-02-04 14:38:30 -06:00
  • 7018c2b34e mem-ruby: Remove DirectoryMemory storage in MOESI_AMD_BASE-dir Matthew Poremba 2022-02-04 14:25:32 -06:00
  • 54fc137945 mem-ruby: Ensure MOESI_AMD_Base-dir has probe destinations Matthew Poremba 2022-01-21 16:55:51 -06:00
  • b354e1a252 mem-ruby: Fix handling of stale CleanUnique Tiago Mück 2022-02-08 17:34:52 -06:00
  • 88e12c5d01 scons: Work around a SCons bug in Glob. Gabe Black 2022-02-10 19:48:38 -08:00
  • b4c285b3c0 arch-x86: Make sure the TLB checks against CS for fetches. Gabe Black 2022-01-09 01:48:33 -08:00
  • 15df63624b arch-x86: Add some DPRINTFs to the TLB. Gabe Black 2022-01-09 01:47:57 -08:00
  • c71058cfa5 configs: Call createThreads() for FutureCPUs. Zhengrong Wang 2022-02-14 22:27:09 +00:00
  • a19bb5f5ab arch,cpu: Turn (read|set)*Reg into inline helpers. Gabe Black 2021-08-06 05:04:08 -07:00
  • a9ef634fa8 arch-x86: Use the seg unusable bit and not a null selector in the TLB. Gabe Black 2022-01-08 23:52:13 -08:00
  • 0ad4a0b774 arch-x86: Fix immediate based IN instructions. Gabe Black 2022-01-09 21:29:12 -08:00
  • 557ee3f74c python: Update gem5 url output by the simulator Bobby R. Bruce 2022-02-09 14:42:24 -08:00
  • 4e4f8f1347 tests: Add o3 classic init x86 boot tests Bobby R. Bruce 2022-01-28 11:13:01 -08:00
  • 8cd70b7da1 arch-riscv,sim-se: correct the spelling of sendto Luming Wang 2022-02-10 08:31:01 +00:00
  • 65f5f61ca8 fastmodel: Adopt the default implementations of TC *Reg funcs. Gabe Black 2021-08-06 04:46:05 -07:00
  • 17c7f33fdb cpu: Implement (get|set)Reg(Flat|) for the checker CPU. Gabe Black 2021-08-06 04:41:16 -07:00
  • 5c9b4c096f cpu: Implement (get|set)Reg(Flat|) for SimpleThread. Gabe Black 2021-08-06 04:34:15 -07:00
  • 3ca13734ac cpu: Implement getReg and setReg for O3. Gabe Black 2021-08-06 03:54:09 -07:00
  • 772b2ab8ba ext: Update ply to version 3.11. Gabe Black 2022-01-31 13:16:02 -08:00
  • 00221a68bd scons: Exclude parsetab.py when collecting python deps. Gabe Black 2022-01-31 16:43:16 -08:00
  • 9e62fcf2bd dev-arm: Add a KVM Gicv3 model to VExpress_GEM5_Foundation Giacomo Travaglini 2021-12-13 15:14:44 +00:00
  • 6cf0e0bcc2 arch-arm, kvm: Handle vcpu2 if more than 256 vCPUs are in use Giacomo Travaglini 2022-01-25 16:17:41 +00:00
  • 469d90cbbe arch-arm: Add a KvmKernelGicV3 model Giacomo Travaglini 2021-12-09 11:35:30 +00:00
  • a315df2dd8 tests: Add x86 mutlicore boot tests for timing CPUs Bobby R. Bruce 2022-01-21 11:56:34 -08:00
  • 43df899229 mem-cache,tests: Add unit test for ReplaceableEntry Daniel R. Carvalho 2021-03-21 20:12:19 -03:00
  • f65e370e39 sim,tests: Add a tag for drain-related files Daniel R. Carvalho 2021-03-21 19:31:28 -03:00
  • 0ea570c8a1 sim,tests: Add a tag for gem5 events Daniel R. Carvalho 2021-03-21 19:19:26 -03:00
  • a4195d3ed1 sim,tests: Add unit test for Globals Daniel R. Carvalho 2021-03-21 19:24:21 -03:00
  • 8767fca212 scons: Remove a blanket USE_KVM disable check from SConstruct. Gabe Black 2022-01-28 00:09:18 -08:00
  • 1924be92ea arch-riscv: Fix the pmp check for pagetable walker Erhu 2021-12-30 07:45:09 +00:00
  • 141cc37c2d misc: Fix typo in RELEASE-NOTES.md Bobby R. Bruce 2022-02-08 11:41:10 -08:00
  • 1851934f13 misc,base: Update the version to v21.2.1.0 Bobby R. Bruce 2022-01-28 17:46:08 -08:00
  • 7eb732b60b misc: Update REALEASE-NOTES.md for v21.2.1.0 Bobby R. Bruce 2022-01-28 17:39:59 -08:00
  • 5403054acf tests: Fix gem5 stdlib NPB example test Bobby R. Bruce 2022-01-28 11:49:23 -08:00
  • 3fa2d4bdf1 dev-arm: Mask el2_watchdog in VExpressFastmodel platform Yu-hsin Wang 2022-01-10 13:36:39 +08:00
  • 13852f0811 fastmodel: Fix cluster build failed Yu-hsin Wang 2022-01-10 13:36:30 +08:00
  • 8f812a803c stdlib: Remove final decorator from abstract board Hoa Nguyen 2022-01-23 22:52:27 -08:00
  • df69a56670 arch-riscv, dev: add VirtIO entropy device(VirtIORng) support Luming Wang 2022-01-14 03:21:50 +00:00
  • 4adbb52238 stdlib: Remove stdlib README.md Bobby R. Bruce 2022-01-10 11:28:05 -08:00
  • bf986c2d18 arch-riscv: rvc instruction is mistaken as branch Cui Jin 2021-12-21 23:15:03 +08:00
  • 714b9b2356 mem-cache: adding round-robin aribitration to multiprefetchers Majid Jalili 2022-02-01 16:30:29 +00:00
  • c6df79628c arch-arm: Generate a decode map for AArch32 MiscRegs Giacomo Travaglini 2022-02-03 10:29:07 +00:00
  • 9d63b391d2 base: Fix ListenSocket binding logic Jui-min Lee 2022-01-25 09:14:21 +08:00
  • 06d455ec4e cpu: Add generalized register accessors setReg and getReg. Gabe Black 2021-08-06 02:39:36 -07:00
  • d0b7de0f87 cpu: Store raw byte vectors for register files. Gabe Black 2021-04-25 04:51:45 -07:00
  • 886339e927 arch-arm: Fix typo in SDCR name Giacomo Travaglini 2022-02-02 21:08:51 +00:00
  • 24893f090d arch-arm: Replace MISCREG_CP14/15_UNIMPL with MISCREG_UNKNOWN Giacomo Travaglini 2022-02-02 16:49:24 +00:00
  • c419207b82 arch-x86: Filter out the NMI masking bit from the CMOS offset. Gabe Black 2022-01-08 23:46:54 -08:00
  • 10b8bc95d3 python: Remove the m5.config and options.py mechanism. Gabe Black 2022-02-03 01:02:30 -08:00
  • e7f2d17338 scons: Make CC, CXX and PROTOC no longer sticky. Gabe Black 2022-02-02 04:58:30 -08:00
  • ab73158c1d arch-x86: Use operand size consistently pushing for near calls. Gabe Black 2022-01-09 06:13:27 -08:00
  • 97d5120982 cpu,arch-arm: Track register size in RegClassInfo. Gabe Black 2021-04-25 04:47:59 -07:00
  • a0e36759a1 cpu: rename RegClass::size to RegClass::numRegs. Gabe Black 2022-02-01 14:01:26 -08:00
  • 9c7576d8e7 cpu-kvm,sim: Reverse the relationship between System and KvmVM. Gabe Black 2022-01-28 00:07:15 -08:00
  • 45a07f1eeb dev-arm: Gicv3 implementation of the Gicv3Registers interface Giacomo Travaglini 2021-12-10 18:01:05 +00:00
  • 03176aa025 arch-arm: Define an Affinity type Giacomo Travaglini 2022-01-20 15:58:05 +00:00
  • 342ad01168 dev-arm: Use ArmISA::getAffinity in GICv3 redistributor Giacomo Travaglini 2022-01-20 15:34:14 +00:00
  • c28feb20f2 arch-arm: Templatize MuxingKvmGic to support flexible hierarchy Giacomo Travaglini 2021-12-10 15:52:40 +00:00
  • 0865772b28 arch-arm, dev-arm: Remove generic BaseGicRegisters interface Giacomo Travaglini 2022-01-20 09:40:25 +00:00
  • 3e3799dab9 arch-arm: Fix gem5 build on aarch64 host Giacomo Travaglini 2022-02-02 15:06:49 +00:00
  • 7399bbc5b6 dev: Rework how IDE controllers, channels and disks relate. Gabe Black 2022-01-15 21:30:53 -08:00
  • 0e0ca633a2 cpu: Get rid of the unused o3::ThreadContext::readReg. Gabe Black 2021-08-06 02:49:25 -07:00
  • 6bbeba8f94 arch-arm, kvm: Define a base KvmKernelGic Giacomo Travaglini 2021-12-08 13:55:23 +00:00
  • ac5f79af28 cpu-kvm: Move the validKvmEnvironment method into KvmVM. Gabe Black 2022-01-27 23:52:41 -08:00
  • 5e1fdf7586 arch: Remove TheISA::VecElem from arch/vecregs.hh. Gabe Black 2021-08-10 03:25:06 -07:00
  • f4ee1a9536 arch: Get rid of the TheISA::NumVecElemPerVecReg variable. Gabe Black 2021-08-10 02:52:16 -07:00
  • a00a6f953f cpu: Stop using NumVecElemPerVecReg. Gabe Black 2021-08-10 00:16:54 -07:00
  • 0eba590d01 arch-arm: De-virtualize updateIntState Giacomo Travaglini 2021-12-15 10:54:02 +00:00
  • 4f833b539a arch-arm: Avoid Gic write side effect with blockIntUpdate Giacomo Travaglini 2021-12-15 10:33:58 +00:00
  • 05d733d0cd arch-arm: Generalize KVM Gic state copying logic Giacomo Travaglini 2021-12-09 16:05:36 +00:00
  • e1af2b71d4 tests: Fix gem5 stdlib NPB example test Bobby R. Bruce 2022-01-28 11:49:23 -08:00
  • d5e734c540 arch-riscv: Fix (c.)addiw sign-extension behaviour Alex Richardson 2022-01-27 14:11:04 +00:00
  • 7129e2559e mem-ruby: Fix -Werror=unused-variable from recent ruby patch Giacomo Travaglini 2022-01-27 16:20:18 +00:00
  • 8a7fcd340f mem-ruby: Add missing CHI transition SD_RSC + *_Stale->BUSY_BLKD Gabriel Busnot 2022-01-27 13:32:18 +01:00
  • 7c0c23b2da tests: Use clang-11 for the Kokoro compilation test Bobby R. Bruce 2022-01-26 15:07:50 -08:00
  • 0e3c97569f scons: protobuf builder, support source paths Adrián Herrera Arcila 2022-01-25 14:12:21 +00:00
  • 0ba36d8a2e scons: protobuf scanner, support source paths Adrián Herrera Arcila 2022-01-20 15:07:00 +00:00
  • 748b613c94 mem-ruby: Fix switch storage in SimpleNetwork Gabriel Busnot 2022-01-21 15:12:56 +01:00
  • 85a1d43c10 mem-ruby: additional SimpleNetwork stats Tiago Muck 2019-05-29 18:13:58 -05:00
  • 9c8f79310f mem-ruby: add priorities in SimpleNetwork routing Tiago Mück 2020-07-26 19:08:38 -05:00
  • b476d7c1d3 mem-ruby: fine tunning SimpleNetwork buffers Tiago Mück 2020-09-30 16:44:46 -05:00
  • 986e7b90d3 mem-ruby: int/ext SimpleNetwork routing latency Tiago Mück 2020-08-19 19:47:19 -05:00
  • ac278e44f9 mem-ruby: fix SimpleNetwork WeightBased routing Tiago Mück 2020-08-13 20:37:39 -05:00
  • f748fbe7e1 mem-ruby: refactor SimpleNetwork buffers Tiago Mück 2020-07-20 20:12:21 -05:00
  • d657c28279 arch-arm: Add a reverse map MiscRegIndex -> MiscRegNum64 Giacomo Travaglini 2021-12-19 14:05:45 +01:00
  • 8f199c9b7c arch-arm: Reimplement decodeAArch64SysReg using new decode map Giacomo Travaglini 2021-12-19 08:15:24 +01:00
  • 167fb09aaf arch-arm: Generate a decode map for AArch64 MiscRegs Giacomo Travaglini 2021-12-16 18:44:54 +01:00
  • b982437b6e arch-arm: Define MiscRegNum64 data structure Giacomo Travaglini 2021-12-16 17:54:04 +01:00
  • 329ec5e201 stdlib: Remove final decorator from abstract board Hoa Nguyen 2022-01-23 22:52:27 -08:00
  • 0544944b47 systemc: Fixed ctor ordering for sc_fifo.hh Franklin He 2022-01-21 06:08:35 +00:00
  • d9e973b6f5 dev: Clean up the IDE disk and controller classes a little. Gabe Black 2022-01-15 19:56:21 -08:00