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Author SHA1 Message Date
Mahyar Samani
d28981742f test: Updating simple_traffic_run and adding tests 
This change updates simple_traffic_run.py with adding clock_domain
for GUPSGen based generators. Also the tests that resulted in
error before are now fixed and added.

Change-Id: I992898a3aef509afd9dec1f9b5d14c5fd67cff37
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53164
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-07 08:06:39 +00:00
Mahyar Samani
2d0de8e524 stdlib: Adding clock_domain to GUPSGenerators 
This change adds clock domain as a parameter to the GUPSGen
classes. This way the generator and other components can
work on different clock frequencies.

Change-Id: If916877a57b3c3a61073dad075e35f3f93af8459
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53163
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
 2021-12-07 08:06:27 +00:00
Mahyar Samani
2671c59858 tests: Adding new test for traffic_gen 
This change adds new tests for MultiChannelMemory,
PrivateL1CacheHierarchy, PrivateL1PrivateL2CacheHierachy,
GUPSGenerator, GUPSGeneratorEP, GUPSGeneratorPAR.

Change-Id: I1db1281cdd4ade65d9abf2d979ef45342b63496a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52905
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
 2021-12-07 08:06:16 +00:00
Mahyar Samani
998cc8e679 stdlib: Updated MuliChannelMemory constructor 
This change updates the constructor for MultiChannelMemory. The
constructor now assumes every input parameter is of type string
and casts them to proper types inside the function. This way
the MultiChannelMemory could be tested easier. Considering that
tests might not want to pass in all the arguments and might use
argparser to read the inputs.

Change-Id: I80786066ccbb9cb1b7111831d9bc9d95e5204f40
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52904
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
 2021-12-07 08:05:58 +00:00
Hoa Nguyen
cf7ce21848 tests: Add a nightly test for SST integration. 
This test includes,
- A dockerfile creating a Docker image containing SST-Core
and SST-Elements installed. The image also contains the
bbl-busybox-boot-exit binary from gem5-resources.
- A nightly test involving compiling gem5 as a library, and
booting a linux kernel without a disk image using SST where
gem5 TimingSimpleCPU is the CPU core.

Change-Id: I2bf90b4121ed0d38300451648f2e358a7c3fffe2
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52564
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-07 04:12:22 +00:00
Bobby R. Bruce
b1f3ca4647 stdlib: Add X86DemoBoard 
Change-Id: I5aae95d2d8fe37374c393b337243526eb1c90aa1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53004
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-07 00:39:51 +00:00
Bobby R. Bruce
331be22adb scons,misc: Update default X86 protocol to MESI_Two_Level 
MI_Example is a particularly poor protocol as the default for X86.
MESI_Two_Level is a suitable replacement.

The primary reason for this change is so the vanilla X86 build can run
the X86DemoBoard, submitted here:
https://gem5-review.googlesource.com/c/public/gem5/+/53004

Change-Id: I46212f795684bd1f2ce285c69ffcad2f148ab328
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53503
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
 2021-12-07 00:39:51 +00:00
Gabe Black
35362d15f5 arch: Delete the decoder.hh switching header file. 
Change-Id: I9340aa9fa87bcb03c27cb7107b6697ad96060dbe
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52082
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-06 03:09:22 +00:00
Gabe Black
50732981ba cpu: Stop including arch/decoder.hh. 
Stop including arch/decoder.hh, and fix up transitive includes.

Change-Id: I9ef2efd0ab427e17bea4382b89a097c17e619332
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52081
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-06 03:09:22 +00:00
Gabe Black
25d36c81c9 arch,cpu: Turn the Decoder objects into SimObjects. 
Change-Id: I85839880db588b3b92064b8fcbf053c1811a1fdc
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52080
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-06 03:09:22 +00:00
Gabe Black
3e766837b0 arch,cpu: Stop using TheISA::Decoder in most places. 
The only places that still use that indirection are where the decoder
itself is instantiated with "new".

Also, add an "as" method which makes casting to an ISA specific decoder
type easier and less error prone.

Change-Id: Ib4a9cce7f96da2a9a8fe19113628694904893b17
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52079
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-06 03:09:22 +00:00
Gabe Black
3d52a0ea97 arch: Make the decoder decode() method virtual. 
Change-Id: I60f0c4ffbd63069caaee190a78f007df79b61808
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52078
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-06 03:09:22 +00:00
Gabe Black
ce60dc8d3a arch: Make the decoder moreBytes method virtual. 
Change-Id: I9135508916de91172ec9649d59d80574ac2aaf16
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52077
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
 2021-12-06 03:09:22 +00:00
Gabe Black
792745f4f0 arch: Make the decoder takeOverFrom method virtual. 
This is only implemented for x86. It's called very rarely, and so
virtual function overhead is practically irrelevant.

Change-Id: Ib6e05a903df95b801164e44d1662e130419fdbd8
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52076
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Earl Ou <shunhsingou@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
 2021-12-06 03:09:22 +00:00
Gabe Black
4ed7341abb cpu-minor: Ensure the pc in BranchData is always set. 
Change the type passed to updateBranchData in execute to be a reference,
and replace the nullptr being passed in from Execute::evaluate() with
the current thread's pc. We could use any generic PC instead which might
be slightly faster, but there is likely not a significant difference
and this is a lot easier.

Change-Id: I306ca53b33997f76217c61123e5922df612005f9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53584
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-04 07:44:13 +00:00
Gabe Black
fb2f99cb6c cpu-minor: Get rid of the MinorDynInst::init function. 
Just initialize the global MinorDynInst::bubbleInst with a lambda to
avoid having a init() function somebody needs to remember to call, and
which needs to only be called once (or which should only do something
once).

Change-Id: Ied6397e52ccefd6e6bdca012a01f004a47d6f26e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53583
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-04 07:44:13 +00:00
Gabe Black
b65272e7f1 arch: Remove "process()" from the Decoder interface. 
This method was only ever an implementation detail on ARM and x86, the
only places it actually did anything. Remove it from the other decoders,
and also make it protected on x86 to remove confusion.

Change-Id: I3a719648039c1edfbc2bd044f0a21c8983b249f5
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52075
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-03 03:24:44 +00:00
Gabe Black
81fa62fc91 arch: Make the decoder reset() method virtual. 
This is called very infrequently, and so it's virtual overhead is
practically irrelevant.

Change-Id: If92cd96f75234c65c4cdffe392c32cfdd9b0c8cb
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52074
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-03 03:24:44 +00:00
Gabe Black
5e7c964158 arch: Promote outOfBytes/needMoreBytes to the InstDecoder class. 
Change-Id: Ie8f31e424081f002e3d74edd1685b4a977c545c3
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52073
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-03 03:24:44 +00:00
Gabe Black
29950b81ce arch: Promote instReady to the base InstDecoder class. 
Move the instDone flag, and the instReady function which was
consistently implemented just to return it, to the base InstDecoder
class. This flag can still be accessed easily from the subclasses, but
now it can be retrieved with just an InstDecoder pointer without a
virtual function call.

Change-Id: I8c662aa01da8fe33ffe679071c701e0aadc1a795
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52072
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-03 03:24:44 +00:00
Gabe Black
21d7ae9508 arch: Implement StaticInst::advancePC(ThreadContext *) for the ISAs. 
Change-Id: Icc0332eca55c38f80964e7f898ccfa35da64fdf9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52070
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-03 03:05:41 +00:00
Gabe Black
0f90b7cb09 cpu: Add a StaticInst::advancePC which takes a ThreadContext. 
This will avoid having to create a new heap allocated PCState, since the
instruction will know what type of backing storage to allocate on the
stack for the working copy.

Change-Id: Id208e015f6cb764bf7b13e0faf1677278b7e4641
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52069
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-03 03:05:41 +00:00
Gabe Black
7216fc8e29 cpu-simple: Use a local temporary for the PC in preExecute. 
This avoids having to dynamically allocate and then free a temporary
when working with the pc in preExecute.

Change-Id: Ic86e23d0f0c7e786122a6024a154bb2907a6afcb
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52071
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
 2021-12-02 21:35:22 +00:00
Bobby R. Bruce
848746b094 tests: Disable failing tests until root cause determined 
This should be a temporary change. Due to an issue, outlined here:
https://gem5.atlassian.net/browse/GEM5-1120, these tests have been
disabled. One of these tests, if not a combination of them, is causing a
timeout event to occur in the Nightly tests. They have therefore been
disabled until the exact cause of failure is established.

Change-Id: I4303e7b157dcf32a7879b014a9f5a88efa62b756
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53504
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-02 18:37:53 +00:00
Bobby R. Bruce
a8cd6bce3f tests: Update nightly.sh to separate compile and run threads 
This allows us to set a high number of threads for gem5 compilation
tasks, and a lower number of threads for running gem5. The latter is
more memory intensive and, therefore, we cannot always use the maximum
number of threads in a system.

Change-Id: I699d9f74b21d31841bf31e3589d323b007cb4601
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53483
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-02 18:37:53 +00:00
Arun Rodrigues
353d2063b1 scons: CheckLinkFlag() only adds to flags if test succeeds 
Previously, did not check the return of TryLink() before appending, so
unsupported flags can be used when building shared libraries. This
patch adds checking.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-1115

Change-Id: Ief62be15009cae9e02aaaa81b4d9c2d7b26e0223
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53025
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-01 19:01:48 +00:00
Hoa Nguyen
56c57db298 ext: Update ext/sst/INSTALL.md 
Currently, the installation instructions are for installing
SST-core and SST-elements version 11.0.0. This change updates
instructions to the current SST-core and SST-element version,
11.1.0.

This change also reflects that manually downloading the
`bbl-busybox-boot-exit` is no longer necessary as the example
gem5 config will download automatically.

Change-Id: I616ca38316213dcbd71b6eab121b5ac89eed1962
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53463
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-01 18:10:24 +00:00
Gabe Black
9fcafefe27 arch-sparc: Fix a bug in SparcNativeTrace::check. 
This method is responsible for comparing gem5's state against the state
of the real process. When checking the value of NPC, it accessed the
value of nnpc() by calling pc.nnpc(), but did not actually update regVal
with it, so the comparison was between the value from the real process
and npc().

It's mildly confusing that nnpc is compared against npc, and npc against
pc, but that's because of what the state looks like in the real process
when single stepping through it with ptrace.

You can actually see where this bug was introduced if you look at the
change which created the PCState types originally. There, you can see
how regVal was set using a method of the ThreadContext, but after that
change the value is only accessed and not actually used.

Change-Id: I0f0101db5f807640b8d25fef6448081d9cfa0213
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53363
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Boris Shingarov <shingarov@labware.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-11-30 23:30:06 +00:00
Gabe Black
a17eb869dc arch: Remove the pcstate.hh switching header file. 
Change-Id: I8c9cf0ec0c867b76ee8dd8f83b1d2d0835ecb3af
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52068
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
 2021-11-30 23:30:06 +00:00
Gabe Black
2805f3dee1 misc: Stop including arch/pcstate.hh. 
Change-Id: Ic9ea62ae9c59fd838175fd6af4c075101d46a0b1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52067
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
 2021-11-30 23:30:06 +00:00
Gabe Black
7d00ef8c5b arch: Rename PCStateCommon to PCStateWithNext. 
This intermediate class has a fairly vague name. This new name more
specifically describes what this PCState class adds to its base class.

Change-Id: I6d19383f3eb2895d924187ddbf8185352db71542
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52486
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Daniel Carvalho <odanrc@yahoo.com.br>
 2021-11-30 23:30:06 +00:00
Gabe Black
9f2fa6c4ce arch,cpu: Make branching() a virtual member of PCStateBase. 
Change-Id: I4422d07024e97dbd67e97ad95a16e1b06fd6be12
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52066
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
 2021-11-30 23:30:06 +00:00
Gabe Black
f8b8ab90ac arch: Make the advance() method virtual and in PCStateBase. 
It's occasionally necessary to advance the PC to the next instruction
without having an instruction to do it with. This makes it available
without having to cast to a PCState subclass.

Change-Id: I3b7d94afdfb27b34279e58158782e87ab5066a37
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52065
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
 2021-11-30 23:30:06 +00:00
Gabe Black
b1716fb8bd arch,cpu-minor: Make the uReset method virtual in PCStateBase. 
This is used in the minor CPU, but maybe shouldn't. This makes it
accessible from a generic PCStatePtr without having to cast it to a
PCState subclass.

Change-Id: Ied89e2c9c69b1a7d647129fdade10312e21dcaa1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52064
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: ZHENGRONG WANG <seanyukigeek@gmail.com>
Maintainer: ZHENGRONG WANG <seanyukigeek@gmail.com>
 2021-11-30 23:30:06 +00:00
Gabe Black
e75ae455ad arch,cpu: Use PCStateBase for decoder methods. 
Change-Id: I79f1c5dd39de7015a5c5b891e1888d9a176bb5b4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52063
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
 2021-11-30 23:30:06 +00:00
Gabe Black
f315461bb7 arch,cpu: Stop using and remove ThreadContext::instAddr. 
Change-Id: I9cd8077fd72a9d7bff20f1bd7ba37e4e038b8fac
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52062
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
 2021-11-30 23:30:06 +00:00
Gabe Black
9d79b751c8 cpu: Eliminate the ThreadContext::microPC method. 
This was originally intended to make it more efficient to get the
microPC without making a copy of the entire PCState object to return.
Now that the PCState is returned through a pointer without a copy and
the microPC can be accessed with an inline accessor, we don't need to
create a special accessor for it.

Change-Id: I1d354dfca6be5d954e147f23dc9d27917b379bf2
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52061
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
 2021-11-30 23:30:06 +00:00
Gabe Black
2ca49044bd cpu: Eliminate the ThreadContext::setNPC method. 
It is no longer used.

Change-Id: Ic0526097550b109455cb09707e712775a0be56c4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52060
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
 2021-11-30 23:30:06 +00:00
Gabe Black
e12120372c arch,cpu,base: Make add a virtual method to stutter the PC for KVM. 
As described in a comment in the base KVM CPU, there needs to be a way
to set the next PC of a PCState object to the actual current PC. Since
this is the only place that sort of operation is needed and it's a bit
of a hack to get around a quirk of calling pseudo instructions in a KVM
CPU, we can support it by adding a virtual method for it which is
implemented by the ISA specific subclasses of the KVM CPU.

Change-Id: Idf390e9c4ffa7398cd08e76846c61cb6da754dce
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52059
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
 2021-11-30 23:30:06 +00:00
Gabe Black
8279191cd9 misc,cpu: Make ThreadContext work with PCStateBase-s. 
Change-Id: I92f1d79c697bb45f610604c9e84b24ea93d58776
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52058
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-11-30 23:30:06 +00:00
Gabe Black
aa949dba0f cpu: In SimpleIndirectPredictor, avoid an accidental nullptr deref. 
The default value of IPredEntry::tag is 0, and if we just blindly
compare the tag we're looking for against this value, we might run into
cases where we match against an uninitialized IPredEntry. In that case,
IPredEntry::target has not been initialized, and if we try to use it in
lookup(...) we'll dereference nullptr and segfault.

To avoid that, we can just add one additional check that makes sure that
not only does the tag of the IPredEntry match, but also that the value
of target is not null, and so the IPredEntry *actually* has tag 0 and
isn't just uninitialized.

Change-Id: I892d0df7c00a0a4cd3ca215fe3a7586ddbca9395
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53403
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-11-30 23:29:23 +00:00
Giacomo Travaglini
29a6b75e33 arch-arm: Fix coding style in isa.hh 
Change-Id: Ib827e4ae9662e79512a18c13e1cd262213406fbf
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53267
Reviewed-by: Richard Cooper <richard.cooper@arm.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-11-30 13:49:33 +00:00
Giacomo Travaglini
759adb78da arch-arm: Allow EL2 trapping of secure AA32 instructions 
With the introduction of FEAT_SEL2 we should allow trapping
to EL2 in secure mode. This is already implemented for AArch64
EL1. With this patch we are extending it to AArch32

Change-Id: I3551a93af7db0b1d2bdf0935c3a29e39e8db55f8
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53266
Reviewed-by: Richard Cooper <richard.cooper@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-11-30 13:49:33 +00:00
Giacomo Travaglini
d937b470ad arch-arm: Fix coding style in utility.cc 
Change-Id: I46318878a9ecfacdb1b891da6064d2058774856a
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53265
Reviewed-by: Richard Cooper <richard.cooper@arm.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-11-30 13:49:33 +00:00
Giacomo Travaglini
c52e74f971 arch-arm: Remove unused Hdcr/Hcptr operands 
Change-Id: Id20c235e765195750a18c85eb4d19cc96865ae81
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53264
Reviewed-by: Richard Cooper <richard.cooper@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-11-30 13:49:33 +00:00
Giacomo Travaglini
cee3b6ead0 arch-arm: Use ThreadContext when trapping MCR/MRC to cop14 
We are aligning to cop15 read/writes. By passing the TC directly
we unlock the usage of TC based helper functions.

Change-Id: I1d06d31ce0bd04508f44f34cc0dcef8828d9c48c
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53263
Reviewed-by: Richard Cooper <richard.cooper@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-11-30 13:49:33 +00:00
huangjs
ea6b0a03d3 mem: Setup stats for Cache hitLatency 
Change-Id: I18de75d3b6c4ce1784b90653e2d132ffecf1b1af
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53103
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
 2021-11-30 02:59:05 +00:00
Gabe Black
39584edc72 arch,cpu: Convert ExecContext::pcState to use PCStateBase. 
Some places need persistent temporaries for the return values of
ThreadContext::pcState(), which is currently by value.

Change-Id: Icd4924f1d16ebe1c99c54ed47616733422340cfe
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52057
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-11-29 22:00:54 +00:00
Gabe Black
a9b75bed05 cpu: Use PCStateBase in the checker CPU. 
Change-Id: I3f07e2083f803224035198b91064806991aea16e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52056
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
 2021-11-29 22:00:54 +00:00
Gabe Black
8ef9f70fcb cpu: Use PCStateBase in the branch predictors. 
Use PCStateBase instead of TheISA::PCState in the branch predictors.

Change-Id: I0b0867bc09b6191a54d7658813c0b9656c436811
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52055
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Earl Ou <shunhsingou@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-11-29 22:00:54 +00:00