stdlib: Add X86DemoBoard
Change-Id: I5aae95d2d8fe37374c393b337243526eb1c90aa1 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53004 Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu> Maintainer: Bobby Bruce <bbruce@ucdavis.edu> Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Bobby R. Bruce
committed by
Bobby Bruce
Bobby Bruce
parent
331be22adb
commit
b1f3ca4647
144
configs/example/gem5_library/x86-ubuntu-run-with-kvm.py
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144
configs/example/gem5_library/x86-ubuntu-run-with-kvm.py
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@@ -0,0 +1,144 @@
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# Copyright (c) 2021 The Regents of the University of California
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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"""
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This script shows an example of running a full system Ubuntu boot simulation
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using the gem5 library. This simulation boots Ubuntu 18.04 using 2 KVM CPU
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cores. The simulation then switches to 2 Timing CPU cores before running an
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echo statement.
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Usage
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-----
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```
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scons build/X86_MESI_Two_Level/gem5.opt
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./build/X86/gem5.opt configs/example/gem5_library/x86-ubuntu-run-with-kvm.py
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```
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"""
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import m5
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from m5.objects import Root
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from gem5.utils.requires import requires
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from gem5.components.boards.x86_board import X86Board
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from gem5.components.memory.single_channel import SingleChannelDDR3_1600
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from gem5.components.processors.simple_switchable_processor import (
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SimpleSwitchableProcessor,
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)
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from gem5.components.processors.cpu_types import CPUTypes
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from gem5.isas import ISA
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from gem5.coherence_protocol import CoherenceProtocol
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from gem5.resources.resource import Resource
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# This runs a check to ensure the gem5 binary is compiled to X86 and to the
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# MESI Two Level coherence protocol.
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requires(
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isa_required=ISA.X86,
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coherence_protocol_required=CoherenceProtocol.MESI_TWO_LEVEL,
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kvm_required=True,
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)
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from gem5.components.cachehierarchies.ruby.\
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mesi_two_level_cache_hierarchy import (
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MESITwoLevelCacheHierarchy,
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)
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# Here we setup a MESI Two Level Cache Hierarchy.
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cache_hierarchy = MESITwoLevelCacheHierarchy(
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l1d_size="16kB",
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l1d_assoc=8,
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l1i_size="16kB",
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l1i_assoc=8,
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l2_size="256kB",
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l2_assoc=16,
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num_l2_banks=1,
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)
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# Setup the system memory.
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memory = SingleChannelDDR3_1600(size="3GB")
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# Here we setup the processor. This is a special switchable processor in which
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# a starting core type and a switch core type must be specified. Once a
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# configuration is instantiated a user may call `processor.switch()` to switch
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# from the starting core types to the switch core types. In this simulation
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# we start with KVM cores to simulate the OS boot, then switch to the Timing
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# cores for the command we wish to run after boot.
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processor = SimpleSwitchableProcessor(
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starting_core_type=CPUTypes.KVM,
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switch_core_type=CPUTypes.TIMING,
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num_cores=2,
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)
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# Here we setup the board. The X86Board allows for Full-System X86 simulations.
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board = X86Board(
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clk_freq="3GHz",
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processor=processor,
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memory=memory,
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cache_hierarchy=cache_hierarchy,
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)
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# Here we set the Full System workload.
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# The `set_kernel_disk_workload` function for the X86Board takes a kernel, a
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# disk image, and, optionally, a command to run.
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# This is the command to run after the system has booted. The first `m5 exit`
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# will stop the simulation so we can switch the CPU cores from KVM to timing
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# and continue the simulation to run the echo command, sleep for a second,
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# then, again, call `m5 exit` to terminate the simulation. After simulation
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# has ended you may inspect `m5out/system.pc.com_1.device` to see the echo
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# output.
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command = "m5 exit;" \
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+ "echo 'This is running on Timing CPU cores.';" \
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+ "sleep 1;" \
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+ "m5 exit;"
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board.set_kernel_disk_workload(
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# The x86 linux kernel will be automatically downloaded to the if not
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# already present.
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kernel=Resource("x86-linux-kernel-5.4.49"),
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# The x86 ubuntu image will be automatically downloaded to the if not
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# already present.
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disk_image=Resource("x86-ubuntu-img"),
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readfile_contents=command,
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)
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root = Root(full_system=True, system=board)
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root.sim_quantum = int(1e9) # sim_quantum must be st if KVM cores are used.
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m5.instantiate()
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# This first stretch of the simulation runs using the KVM cores. In this setup
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# this will terminate until Ubuntu boot is complete.
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m5.simulate()
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# This will switch from the KVM cores to the Timing cores.
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processor.switch()
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# This final stretch of the simulation will be run using the Timing cores. In
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# this setup an echo statement will be executed prior to exiting.
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m5.simulate()
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@@ -25,11 +25,15 @@
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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"""
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This script utilizes the X86DemoBoard to run a simple Ubunutu boot. The script
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will boot the the OS to login before exiting the simulation.
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This script shows an example of running a full system Ubuntu boot simulation
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using the gem5 library. This simulation boots Ubuntu 18.04 using 2 KVM CPU
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cores. The simulation then switches to 2 Timing CPU cores before running an
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echo statement.
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A detailed terminal output can be found in `m5out/system.pc.com_1.device`.
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**Warning:** The X86DemoBoard uses the Timing CPU. The boot may take
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considerable time to complete execution.
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`configs/example/gem5_library/x86-ubuntu-run-with-kvm.py` can be referenced as
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an example of booting Ubuntu with a KVM CPU.
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Usage
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-----
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@@ -43,102 +47,21 @@ scons build/X86/gem5.opt
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import m5
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from m5.objects import Root
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from gem5.utils.requires import requires
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from gem5.components.boards.x86_board import X86Board
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from gem5.components.memory.single_channel import SingleChannelDDR3_1600
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from gem5.components.processors.simple_switchable_processor import (
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SimpleSwitchableProcessor,
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)
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from gem5.components.processors.cpu_types import CPUTypes
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from gem5.isas import ISA
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from gem5.coherence_protocol import CoherenceProtocol
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from gem5.prebuilt.demo.x86_demo_board import X86DemoBoard
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from gem5.resources.resource import Resource
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# This runs a check to ensure the gem5 binary is compiled to X86 and to the
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# MESI Two Level coherence protocol.
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requires(
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isa_required=ISA.X86,
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coherence_protocol_required=CoherenceProtocol.MESI_TWO_LEVEL,
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kvm_required=True,
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)
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from gem5.components.cachehierarchies.ruby.\
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mesi_two_level_cache_hierarchy import (
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MESITwoLevelCacheHierarchy,
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)
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# Here we setup a MESI Two Level Cache Hierarchy.
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cache_hierarchy = MESITwoLevelCacheHierarchy(
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l1d_size="16kB",
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l1d_assoc=8,
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l1i_size="16kB",
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l1i_assoc=8,
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l2_size="256kB",
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l2_assoc=16,
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num_l2_banks=1,
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)
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# Setup the system memory.
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memory = SingleChannelDDR3_1600(size="3GB")
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# Here we setup the processor. This is a special switchable processor in which
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# a starting core type and a switch core type must be specified. Once a
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# configuration is instantiated a user may call `processor.switch()` to switch
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# from the starting core types to the switch core types. In this simulation
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# we start with KVM cores to simulate the OS boot, then switch to the Timing
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# cores for the command we wish to run after boot.
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processor = SimpleSwitchableProcessor(
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starting_core_type=CPUTypes.KVM,
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switch_core_type=CPUTypes.TIMING,
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num_cores=2,
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)
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# Here we setup the board. The X86Board allows for Full-System X86 simulations.
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board = X86Board(
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clk_freq="3GHz",
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processor=processor,
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memory=memory,
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cache_hierarchy=cache_hierarchy,
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)
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# Here we set the Full System workload.
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# The `set_kernel_disk_workload` function for the X86Board takes a kernel, a
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# disk image, and, optionally, a command to run.
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# This is the command to run after the system has booted. The first `m5 exit`
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# will stop the simulation so we can switch the CPU cores from KVM to timing
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# and continue the simulation to run the echo command, sleep for a second,
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# then, again, call `m5 exit` to terminate the simulation. After simulation
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# has ended you may inspect `m5out/system.pc.com_1.device` to see the echo
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# output.
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command = "m5 exit;" \
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+ "echo 'This is running on Timing CPU cores.';" \
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+ "sleep 1;" \
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+ "m5 exit;"
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# Here we setup the board. The prebuilt X86DemoBoard allows for Full-System X86
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# simulation.
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board = X86DemoBoard()
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# We then set the workload. Here we use the 5.4.49 Linux kernel with an X86
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# Ubuntu OS. If these cannot be found locally they will be automatically
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# downloaded.
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board.set_kernel_disk_workload(
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# The x86 linux kernel will be automatically downloaded to the if not
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# already present.
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kernel=Resource("x86-linux-kernel-5.4.49"),
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# The x86 ubuntu image will be automatically downloaded to the if not
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# already present.
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disk_image=Resource("x86-ubuntu-img"),
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readfile_contents=command,
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)
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root = Root(full_system=True, system=board)
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root.sim_quantum = int(1e9) # sim_quantum must be st if KVM cores are used.
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m5.instantiate()
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# This first stretch of the simulation runs using the KVM cores. In this setup
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# this will terminate until Ubuntu boot is complete.
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m5.simulate()
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# This will switch from the KVM cores to the Timing cores.
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processor.switch()
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# This final stretch of the simulation will be run using the Timing cores. In
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# this setup an echo statement will be executed prior to exiting.
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m5.simulate()
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m5.simulate()
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@@ -194,6 +194,9 @@ PySource('gem5.components.processors',
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'gem5/components/processors/simple_switchable_processor.py')
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PySource('gem5.components.processors',
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'gem5/components/processors/switchable_processor.py')
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PySource('gem5.prebuilt', 'gem5/prebuilt/__init__.py')
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PySource('gem5.prebuilt.demo', 'gem5/prebuilt/demo/__init__.py')
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PySource('gem5.prebuilt.demo', 'gem5/prebuilt/demo/x86_demo_board.py')
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PySource('gem5.resources', 'gem5/resources/__init__.py')
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PySource('gem5.resources', 'gem5/resources/downloader.py')
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PySource('gem5.resources', 'gem5/resources/resource.py')
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0
src/python/gem5/prebuilt/__init__.py
Normal file
0
src/python/gem5/prebuilt/__init__.py
Normal file
0
src/python/gem5/prebuilt/demo/__init__.py
Normal file
0
src/python/gem5/prebuilt/demo/__init__.py
Normal file
94
src/python/gem5/prebuilt/demo/x86_demo_board.py
Normal file
94
src/python/gem5/prebuilt/demo/x86_demo_board.py
Normal file
@@ -0,0 +1,94 @@
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# Copyright (c) 2021 The Regents of the University of California
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
|
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# modification, are permitted provided that the following conditions are
|
||||
# met: redistributions of source code must retain the above copyright
|
||||
# notice, this list of conditions and the following disclaimer;
|
||||
# redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
|
||||
# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
|
||||
# this software without specific prior written permission.
|
||||
#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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from m5.util import warn
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from ...components.processors.cpu_types import CPUTypes
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from ...components.boards.x86_board import X86Board
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from ...components.memory.single_channel import SingleChannelDDR3_1600
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from ...components.processors.simple_processor import SimpleProcessor
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from ...components.cachehierarchies.ruby.mesi_two_level_cache_hierarchy \
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import MESITwoLevelCacheHierarchy
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from ...coherence_protocol import CoherenceProtocol
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from ...isas import ISA
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from ...utils.requires import requires
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class X86DemoBoard(X86Board):
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"""
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This prebuilt X86 board is used for demonstration purposes. It simulates
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an X86 3GHz quad-core system with a 2GB DDR3_1600 memory system. A
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MESI_Two_Level cache hierarchy is set with an l1 data and instruction
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cache, each 32kB with an associativity of 8, and a single bank l2 cache of
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1MB with an associativity of 16.
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**DISCLAIMER**: This board is solely for demonstration purposes. This board
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is not known to be representative of any real-world system or produce
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reliable statistical results.
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Example
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-------
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An example of using the X86DemoBoard can be found in
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`configs/example/gem5_library/x86-ubuntu-run.py`.
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To run:
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```
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scons build/X86/gem5.opt -j`nproc`
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./build/X86/gem5.opt configs/example/gem5_library/x86-ubuntu-run.py
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```
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"""
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def __init__(self):
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requires(
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isa_required=ISA.X86,
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coherence_protocol_required=CoherenceProtocol.MESI_TWO_LEVEL,
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)
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warn("The X86DemoBoard is solely for demonstration purposes. "
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"This board is not known to be be representative of any "
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"real-world system. Use with caution.")
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memory = SingleChannelDDR3_1600(size="2GB")
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processor = SimpleProcessor(cpu_type=CPUTypes.TIMING, num_cores=4)
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cache_hierarchy = MESITwoLevelCacheHierarchy(
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l1d_size="32kB",
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l1d_assoc=8,
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l1i_size="32kB",
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l1i_assoc=8,
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l2_size="1MB",
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l2_assoc=16,
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num_l2_banks=1,
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)
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super().__init__(
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clk_freq="3GHz",
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processor=processor,
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memory=memory,
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cache_hierarchy=cache_hierarchy,
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)
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@@ -56,7 +56,7 @@ if os.access("/dev/kvm", mode=os.R_OK | os.W_OK):
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# The x86-ubuntu-run uses KVM cores, this test will therefore only be run
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# on systems that support KVM.
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gem5_verify_config(
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name="test-gem5-library-example-x86-ubuntu-run",
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name="test-gem5-library-example-x86-ubuntu-run-with-kvm",
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fixtures=(),
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verifiers=(),
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config=joinpath(
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@@ -64,10 +64,27 @@ if os.access("/dev/kvm", mode=os.R_OK | os.W_OK):
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"configs",
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"example",
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"gem5_library",
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"x86-ubuntu-run.py",
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"x86-ubuntu-run-with-kvm.py",
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),
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config_args=[],
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valid_isas=(constants.x86_tag,),
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valid_hosts=constants.supported_hosts,
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length=constants.long_tag,
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)
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gem5_verify_config(
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name="test-gem5-library-example-x86-ubuntu-run",
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fixtures=(),
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verifiers=(),
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config=joinpath(
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config.base_dir,
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"configs",
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"example",
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"gem5_library",
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"x86-ubuntu-run.py",
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),
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config_args=[],
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valid_isas=(constants.x86_tag,),
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valid_hosts=constants.supported_hosts,
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length=constants.long_tag,
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)
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Reference in New Issue
Block a user