arch,cpu: Use PCStateBase for decoder methods.
Change-Id: I79f1c5dd39de7015a5c5b891e1888d9a176bb5b4 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52063 Tested-by: kokoro <noreply+kokoro@google.com> Maintainer: Gabe Black <gabe.black@gmail.com> Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
This commit is contained in:
@@ -152,8 +152,9 @@ Decoder::consumeBytes(int numBytes)
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}
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void
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Decoder::moreBytes(const PCState &pc, Addr fetchPC)
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Decoder::moreBytes(const PCStateBase &_pc, Addr fetchPC)
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{
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auto &pc = _pc.as<PCState>();
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data = letoh(data);
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offset = (fetchPC >= pc.instAddr()) ? 0 : pc.instAddr() - fetchPC;
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emi.thumb = pc.thumb();
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@@ -171,11 +172,13 @@ Decoder::moreBytes(const PCState &pc, Addr fetchPC)
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}
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StaticInstPtr
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Decoder::decode(ArmISA::PCState &pc)
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Decoder::decode(PCStateBase &_pc)
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{
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if (!instDone)
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return NULL;
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auto &pc = _pc.as<PCState>();
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const int inst_size((!emi.thumb || emi.bigThumb) ? 4 : 2);
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ExtMachInst this_emi(emi);
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@@ -182,7 +182,7 @@ class Decoder : public InstDecoder
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* @param fetchPC The address this chunk was fetched from.
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* @param inst Raw instruction data.
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*/
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void moreBytes(const PCState &pc, Addr fetchPC);
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void moreBytes(const PCStateBase &pc, Addr fetchPC);
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/**
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* Decode an instruction or fetch it from the code cache.
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@@ -195,7 +195,7 @@ class Decoder : public InstDecoder
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* @return A pointer to a static instruction or NULL if the
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* decoder isn't ready (see instReady()).
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*/
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StaticInstPtr decode(ArmISA::PCState &pc);
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StaticInstPtr decode(PCStateBase &pc);
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/**
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* Take over the state from an old decoder when switching CPUs.
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@@ -70,7 +70,7 @@ class Decoder : public InstDecoder
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//Use this to give data to the decoder. This should be used
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//when there is control flow.
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void
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moreBytes(const PCState &pc, Addr fetchPC)
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moreBytes(const PCStateBase &pc, Addr fetchPC)
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{
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emi = letoh(machInst);
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instDone = true;
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@@ -111,12 +111,12 @@ class Decoder : public InstDecoder
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public:
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StaticInstPtr
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decode(MipsISA::PCState &nextPC)
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decode(PCStateBase &next_pc)
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{
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if (!instDone)
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return NULL;
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instDone = false;
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return decode(emi, nextPC.instAddr());
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return decode(emi, next_pc.instAddr());
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}
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};
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@@ -67,9 +67,9 @@ class Decoder : public InstDecoder
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// Use this to give data to the predecoder. This should be used
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// when there is control flow.
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void
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moreBytes(const PCState &pc, Addr fetchPC)
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moreBytes(const PCStateBase &pc, Addr fetchPC)
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{
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emi = gtoh(emi, pc.byteOrder());
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emi = gtoh(emi, pc.as<PCState>().byteOrder());
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instDone = true;
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}
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@@ -108,12 +108,12 @@ class Decoder : public InstDecoder
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public:
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StaticInstPtr
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decode(PowerISA::PCState &nextPC)
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decode(PCStateBase &next_pc)
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{
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if (!instDone)
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return NULL;
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instDone = false;
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return decode(emi, nextPC.instAddr());
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return decode(emi, next_pc.instAddr());
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}
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};
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@@ -48,7 +48,7 @@ void Decoder::reset()
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}
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void
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Decoder::moreBytes(const PCState &pc, Addr fetchPC)
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Decoder::moreBytes(const PCStateBase &pc, Addr fetchPC)
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{
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// The MSB of the upper and lower halves of a machine instruction.
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constexpr size_t max_bit = sizeof(machInst) * 8 - 1;
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@@ -58,7 +58,7 @@ Decoder::moreBytes(const PCState &pc, Addr fetchPC)
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DPRINTF(Decode, "Requesting bytes 0x%08x from address %#x\n", inst,
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fetchPC);
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bool aligned = pc.pc() % sizeof(machInst) == 0;
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bool aligned = pc.instAddr() % sizeof(machInst) == 0;
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if (aligned) {
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emi = inst;
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if (compressed(emi))
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@@ -97,19 +97,21 @@ Decoder::decode(ExtMachInst mach_inst, Addr addr)
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}
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StaticInstPtr
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Decoder::decode(RiscvISA::PCState &nextPC)
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Decoder::decode(PCStateBase &_next_pc)
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{
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if (!instDone)
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return nullptr;
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instDone = false;
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auto &next_pc = _next_pc.as<PCState>();
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if (compressed(emi)) {
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nextPC.npc(nextPC.instAddr() + sizeof(machInst) / 2);
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next_pc.npc(next_pc.instAddr() + sizeof(machInst) / 2);
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} else {
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nextPC.npc(nextPC.instAddr() + sizeof(machInst));
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next_pc.npc(next_pc.instAddr() + sizeof(machInst));
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}
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return decode(emi, nextPC.instAddr());
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return decode(emi, next_pc.instAddr());
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}
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} // namespace RiscvISA
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@@ -76,13 +76,13 @@ class Decoder : public InstDecoder
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//Use this to give data to the decoder. This should be used
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//when there is control flow.
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void moreBytes(const PCState &pc, Addr fetchPC);
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void moreBytes(const PCStateBase &pc, Addr fetchPC);
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bool needMoreBytes() { return more; }
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bool instReady() { return instDone; }
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void takeOverFrom(Decoder *old) {}
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StaticInstPtr decode(RiscvISA::PCState &nextPC);
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StaticInstPtr decode(PCStateBase &nextPC);
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};
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} // namespace RiscvISA
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@@ -66,7 +66,7 @@ class Decoder : public InstDecoder
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// Use this to give data to the predecoder. This should be used
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// when there is control flow.
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void
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moreBytes(const PCState &pc, Addr fetchPC)
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moreBytes(const PCStateBase &pc, Addr fetchPC)
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{
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emi = betoh(machInst);
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// The I bit, bit 13, is used to figure out where the ASI
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@@ -124,12 +124,12 @@ class Decoder : public InstDecoder
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public:
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StaticInstPtr
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decode(SparcISA::PCState &nextPC)
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decode(PCStateBase &next_pc)
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{
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if (!instDone)
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return NULL;
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instDone = false;
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return decode(emi, nextPC.instAddr());
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return decode(emi, next_pc.instAddr());
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}
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};
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@@ -694,12 +694,12 @@ Decoder::decode(ExtMachInst mach_inst, Addr addr)
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}
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StaticInstPtr
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Decoder::decode(PCState &nextPC)
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Decoder::decode(PCStateBase &next_pc)
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{
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if (!instDone)
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return NULL;
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instDone = false;
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updateNPC(nextPC);
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updateNPC(next_pc.as<PCState>());
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StaticInstPtr &si = instBytes->si;
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if (si)
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@@ -313,7 +313,7 @@ class Decoder : public InstDecoder
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// Use this to give data to the decoder. This should be used
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// when there is control flow.
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void
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moreBytes(const PCState &pc, Addr fetchPC)
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moreBytes(const PCStateBase &pc, Addr fetchPC)
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{
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DPRINTF(Decoder, "Getting more bytes.\n");
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basePC = fetchPC;
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@@ -341,7 +341,7 @@ class Decoder : public InstDecoder
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}
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public:
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StaticInstPtr decode(X86ISA::PCState &nextPC);
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StaticInstPtr decode(PCStateBase &next_pc);
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StaticInstPtr fetchRomMicroop(
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MicroPC micropc, StaticInstPtr curMacroop) override;
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@@ -297,16 +297,14 @@ Checker<DynInstPtr>::verify(const DynInstPtr &completed_inst)
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//If more fetch data is needed, pass it in.
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Addr fetch_pc =
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(pc_state->instAddr() & pc_mask) + fetchOffset;
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decoder.moreBytes(pc_state->as<TheISA::PCState>(),
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fetch_pc);
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decoder.moreBytes(*pc_state, fetch_pc);
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//If an instruction is ready, decode it.
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//Otherwise, we'll have to fetch beyond the
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//memory chunk at the current pc.
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if (decoder.instReady()) {
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fetchDone = true;
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instPtr = decoder.decode(
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pc_state->as<TheISA::PCState>());
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instPtr = decoder.decode(*pc_state);
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thread->pcState(*pc_state);
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} else {
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fetchDone = false;
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@@ -382,7 +382,7 @@ Fetch2::evaluate()
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decoder->moreBytesSize());
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if (!decoder->instReady()) {
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decoder->moreBytes(fetch_info.pc->as<TheISA::PCState>(),
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decoder->moreBytes(*fetch_info.pc,
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line_in->lineBaseAddr + fetch_info.inputIndex);
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DPRINTF(Fetch, "Offering MachInst to decoder addr: 0x%x\n",
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line_in->lineBaseAddr + fetch_info.inputIndex);
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@@ -396,7 +396,7 @@ Fetch2::evaluate()
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* Remember not to assign it until *after* calling
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* decode */
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StaticInstPtr decoded_inst =
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decoder->decode(fetch_info.pc->as<TheISA::PCState>());
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decoder->decode(*fetch_info.pc);
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/* Make a new instruction and pick up the line, stream,
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* prediction, thread ids from the incoming line */
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@@ -1227,7 +1227,7 @@ Fetch::fetch(bool &status_change)
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memcpy(dec_ptr->moreBytesPtr(),
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fetchBuffer[tid] + blkOffset * instSize, instSize);
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decoder[tid]->moreBytes(this_pc.as<TheISA::PCState>(), fetchAddr);
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decoder[tid]->moreBytes(this_pc, fetchAddr);
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if (dec_ptr->needMoreBytes()) {
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blkOffset++;
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@@ -1241,8 +1241,7 @@ Fetch::fetch(bool &status_change)
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do {
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if (!(curMacroop || inRom)) {
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if (dec_ptr->instReady()) {
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staticInst = dec_ptr->decode(
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this_pc.as<TheISA::PCState>());
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staticInst = dec_ptr->decode(this_pc);
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// Increment stat of fetched instructions.
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++fetchStats.insts;
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@@ -330,11 +330,11 @@ BaseSimpleCPU::preExecute()
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Addr fetch_pc =
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(pc_state->instAddr() & decoder.pcMask()) + t_info.fetchOffset;
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decoder.moreBytes(pc_state->as<TheISA::PCState>(), fetch_pc);
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decoder.moreBytes(*pc_state, fetch_pc);
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//Decode an instruction if one is ready. Otherwise, we'll have to
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//fetch beyond the MachInst at the current pc.
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instPtr = decoder.decode(pc_state->as<TheISA::PCState>());
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instPtr = decoder.decode(*pc_state);
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if (instPtr) {
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t_info.stayAtPC = false;
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thread->pcState(*pc_state);
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