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Author SHA1 Message Date
Melissa Jost
be0a75ecb3 stdlib: Added LupioRNG to LupVBoard 
This adds the LupioRNG device to our LupVBoard, adding
random number generation capability to this RISC-V
based system.

Change-Id: I89c78c119a46cc7b056005d8abef16b1816ee4c4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53030
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
 2021-12-07 21:39:57 +00:00
Melissa Jost
f432498c00 dev: Added new LupIO-RNG device 
This device is a random number generator that uses the Mersenne
Twister in order to provide the system with a set of random
numbers.  It is implemented as a BasicPioDevice, and has both
read and write capabilities.

The following are the specifications regarding the LupIO-RNG:
https://gitlab.com/luplab/lupio/lupio-specs/-/blob/main/lupio-rng.md

Change-Id: Ia6aeb610ebe5589ed1f1548b823c5165236b03e6
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53029
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
 2021-12-07 21:39:57 +00:00
Melissa Jost
be582b6c98 stdlib: Introduced new LupV Board 
This LupV Board was created in order to connect all of the LupIO
devices, and allow us to run a full RISC-V system with them.  As
the LupIO devices continue to be added, they will be integrated
into this board, and replace the current IO components.

The LupIO devices are a collection of processor
agnostic and easily implemented virtual devices. Details about the
specifications of all eight LupIO devices can be found here:
https://gitlab.com/luplab/lupio/lupio-specs

Information about how to build a RISCV full system with the LupIO-RTC
can be found here:
https://github.com/darchr/lupio-gem5/blob/lupio/README.md

Change-Id: I7d3186d3778d40b38027f245290432dbf4279dea
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53028
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-07 21:39:57 +00:00
Melissa Jost
ffabe59800 dev: Introduced new LupV Platform 
This is a platform with a RISC-V processor and the LupIO devices that
will allow users to decide which programmable interrupt controller to
use in their system. It currently uses the PLIC device.

Change-Id: Ife6cf5c14845be725e66178693e9ba0ee5fda511
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53027
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
 2021-12-07 21:39:57 +00:00
Laura Hinman
cc87030895 dev: Added new LupIO-RTC device 
This device supplies the computer system with the simulated time by
retrieving the current tick number and converting to seconds, then
returning that time in ISO 8601 format. It is implemented as a
BasicPioDevice and is read-only.

The following are the specifications regarding the LupIO-RTC:
https://gitlab.com/luplab/lupio/lupio-specs/-/blob/main/lupio-rtc.md

Change-Id: Ic99291e5c862e728dac90b15ca818d42f25cbbee
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53026
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
 2021-12-07 21:39:57 +00:00
Bobby R. Bruce
df51612714 scons,misc: Fix broken X86_MI_example build_opts 
This bug was causing the compiler tests to fail:
https://jenkins.gem5.org/job/compiler-checks/65/

Change-Id: I472a50a4a415108d177255fa396e67385104b059
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53684
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-07 20:31:42 +00:00
Matthew Poremba
9cabfd7a9b dev-hsa,gpu-compute: Properly assign DmaVirtDevices in py 
These SimObjects are DmaVirtDevices in C++ but DmaDevices in the sim
object's python file. Make the sim object python files consistent.

Change-Id: I728ae737c5901e448628fc5ac877f261ca4c4393
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53704
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-07 20:26:17 +00:00
Matthew Poremba
e0d62e510d configs,mem-ruby: Remove reference to old GPU ptls 
GPU_VIPER_Baseline, GPU_VIPER_Region, and GPU_RfO were removed some time
ago.

Change-Id: If873b0cfe8cc2b3096cbe97d4e13a8e02d2ec567
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53703
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-07 20:26:17 +00:00
Mahyar Samani
82ef178d68 stdlib: Removing SingleChannelMemory 
This change removes the code base for SingleChannelMemory and
replaces it with MultiChannelMemory. muli_channel defines all
the classes that were defined by single_channel. Basically any
SingleChannelMemory could be thought of as a MultiChannelMemory
with 1 channel.

Change-Id: If96079d5f77be5a3ba26d2c2ddb98f5c60375cd8
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53304
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-07 20:10:59 +00:00
Giacomo Travaglini
664fdd747a arch-arm, dev-arm: Add currEL function to the ISA class 
This utility is strictly ISA related. We are still keeping the
version accepting the TC as an argument; this is just
wrapping the ISA call.

In this way we are simplifying life for ISA devices, which have
a reference to the ISA object rather than a reference to the TC

Change-Id: Icb286d174538b50962d31aa3f6e836b3c791dc1c
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53624
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-07 18:58:49 +00:00
Giacomo Travaglini
2d8996a3eb arch-arm: Remove currOpMode utility function 
This was used by the currEL function only. We are progressively
removing any interface referring to Armv7 concepts

Change-Id: I1d97b392d063e85562b9234c094b1f2166e75ac9
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53623
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-07 18:58:49 +00:00
Giacomo Travaglini
adaab745a3 arch-arm, dev-arm: Move inSecureState helper to ISA class 
The helper function should be really part of the Arm ISA class

Change-Id: Ida0393a12426c8973a9b8171ec2922c2dcec9f5a
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53268
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-07 18:58:49 +00:00
Matthew Poremba
bebed8544a dev-amdgpu: Hotfix variable initialization 
These non-initialized variables were causing the trace reader not to
record all lines.

Change-Id: I88764493d8124c072bc90ff9c08aa26421467f7b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53063
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-07 18:16:10 +00:00
Chen Zou
a1c0436f40 base-stats: HDF5 calls with better compatibility 
H5Object.getObjName() is added at HDF5 V1.8.13.
As an example, compilation error would be thrown on CentOS 7.
obj.getObjnameByIdx(obj.getId()) would work with older versions.

Change-Id: I104eaac050db7501ab3a1aa3ad6dc1ee8b8d7e22
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53283
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-07 15:28:01 +00:00
Jason Lowe-Power
883b8fe826 arch-arm,arch-sparc: Remove legacy stat for faults 
This is a legacy stat that was not easy to tie to a Stats::Group.

In ARM, this stat wasn't actually counting all faults, it was only
counting the faults that occured in 32-bit mode, so it's probably safe
to remove the stat (it was wrong anyway). For SPARC, it's also unlikely
anyone is depending on this stat for their research.

Change-Id: Ic6c60526ea51467627535d732258c50ce0d2c03b
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52504
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-07 15:03:38 +00:00
Giacomo Travaglini
d9b18b0f8d ext: Make gem5-SST Memory Size configurable from script 
The memory interface param was hardcoded to 8GiB therefore
not matching any python changes in the memory size

Change-Id: I180f57f662886010a38a9b7ebbdbb73e0ae48276
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53625
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-07 09:35:38 +00:00
Mahyar Samani
404bf901d0 tests: Adding MultiChannelMemory to riscv-boot 
This change adds MultiChannelMemory to the tests for full system
risc-v.

Change-Id: I3e9b6f7ac539c24ca9694c1c49afa09d0cecca2f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53303
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-07 08:06:58 +00:00
Mahyar Samani
d1b1b52e00 tests: Adding MultiChannelMemory to x86-boot-tests 
This change adds modules from multi_channel.py to full system
tests for x86.

Change-Id: I585a381fa23c6595051ea917c080228e25e0a1a9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53243
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-07 08:06:49 +00:00
Mahyar Samani
d28981742f test: Updating simple_traffic_run and adding tests 
This change updates simple_traffic_run.py with adding clock_domain
for GUPSGen based generators. Also the tests that resulted in
error before are now fixed and added.

Change-Id: I992898a3aef509afd9dec1f9b5d14c5fd67cff37
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53164
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-07 08:06:39 +00:00
Mahyar Samani
2d0de8e524 stdlib: Adding clock_domain to GUPSGenerators 
This change adds clock domain as a parameter to the GUPSGen
classes. This way the generator and other components can
work on different clock frequencies.

Change-Id: If916877a57b3c3a61073dad075e35f3f93af8459
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53163
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
 2021-12-07 08:06:27 +00:00
Mahyar Samani
2671c59858 tests: Adding new test for traffic_gen 
This change adds new tests for MultiChannelMemory,
PrivateL1CacheHierarchy, PrivateL1PrivateL2CacheHierachy,
GUPSGenerator, GUPSGeneratorEP, GUPSGeneratorPAR.

Change-Id: I1db1281cdd4ade65d9abf2d979ef45342b63496a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52905
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
 2021-12-07 08:06:16 +00:00
Mahyar Samani
998cc8e679 stdlib: Updated MuliChannelMemory constructor 
This change updates the constructor for MultiChannelMemory. The
constructor now assumes every input parameter is of type string
and casts them to proper types inside the function. This way
the MultiChannelMemory could be tested easier. Considering that
tests might not want to pass in all the arguments and might use
argparser to read the inputs.

Change-Id: I80786066ccbb9cb1b7111831d9bc9d95e5204f40
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52904
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
 2021-12-07 08:05:58 +00:00
Hoa Nguyen
cf7ce21848 tests: Add a nightly test for SST integration. 
This test includes,
- A dockerfile creating a Docker image containing SST-Core
and SST-Elements installed. The image also contains the
bbl-busybox-boot-exit binary from gem5-resources.
- A nightly test involving compiling gem5 as a library, and
booting a linux kernel without a disk image using SST where
gem5 TimingSimpleCPU is the CPU core.

Change-Id: I2bf90b4121ed0d38300451648f2e358a7c3fffe2
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52564
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-07 04:12:22 +00:00
Bobby R. Bruce
b1f3ca4647 stdlib: Add X86DemoBoard 
Change-Id: I5aae95d2d8fe37374c393b337243526eb1c90aa1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53004
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-07 00:39:51 +00:00
Bobby R. Bruce
331be22adb scons,misc: Update default X86 protocol to MESI_Two_Level 
MI_Example is a particularly poor protocol as the default for X86.
MESI_Two_Level is a suitable replacement.

The primary reason for this change is so the vanilla X86 build can run
the X86DemoBoard, submitted here:
https://gem5-review.googlesource.com/c/public/gem5/+/53004

Change-Id: I46212f795684bd1f2ce285c69ffcad2f148ab328
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53503
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
 2021-12-07 00:39:51 +00:00
Gabe Black
35362d15f5 arch: Delete the decoder.hh switching header file. 
Change-Id: I9340aa9fa87bcb03c27cb7107b6697ad96060dbe
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52082
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-06 03:09:22 +00:00
Gabe Black
50732981ba cpu: Stop including arch/decoder.hh. 
Stop including arch/decoder.hh, and fix up transitive includes.

Change-Id: I9ef2efd0ab427e17bea4382b89a097c17e619332
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52081
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-06 03:09:22 +00:00
Gabe Black
25d36c81c9 arch,cpu: Turn the Decoder objects into SimObjects. 
Change-Id: I85839880db588b3b92064b8fcbf053c1811a1fdc
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52080
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-06 03:09:22 +00:00
Gabe Black
3e766837b0 arch,cpu: Stop using TheISA::Decoder in most places. 
The only places that still use that indirection are where the decoder
itself is instantiated with "new".

Also, add an "as" method which makes casting to an ISA specific decoder
type easier and less error prone.

Change-Id: Ib4a9cce7f96da2a9a8fe19113628694904893b17
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52079
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-06 03:09:22 +00:00
Gabe Black
3d52a0ea97 arch: Make the decoder decode() method virtual. 
Change-Id: I60f0c4ffbd63069caaee190a78f007df79b61808
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52078
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-06 03:09:22 +00:00
Gabe Black
ce60dc8d3a arch: Make the decoder moreBytes method virtual. 
Change-Id: I9135508916de91172ec9649d59d80574ac2aaf16
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52077
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
 2021-12-06 03:09:22 +00:00
Gabe Black
792745f4f0 arch: Make the decoder takeOverFrom method virtual. 
This is only implemented for x86. It's called very rarely, and so
virtual function overhead is practically irrelevant.

Change-Id: Ib6e05a903df95b801164e44d1662e130419fdbd8
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52076
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Earl Ou <shunhsingou@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
 2021-12-06 03:09:22 +00:00
Gabe Black
4ed7341abb cpu-minor: Ensure the pc in BranchData is always set. 
Change the type passed to updateBranchData in execute to be a reference,
and replace the nullptr being passed in from Execute::evaluate() with
the current thread's pc. We could use any generic PC instead which might
be slightly faster, but there is likely not a significant difference
and this is a lot easier.

Change-Id: I306ca53b33997f76217c61123e5922df612005f9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53584
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-04 07:44:13 +00:00
Gabe Black
fb2f99cb6c cpu-minor: Get rid of the MinorDynInst::init function. 
Just initialize the global MinorDynInst::bubbleInst with a lambda to
avoid having a init() function somebody needs to remember to call, and
which needs to only be called once (or which should only do something
once).

Change-Id: Ied6397e52ccefd6e6bdca012a01f004a47d6f26e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53583
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-04 07:44:13 +00:00
Gabe Black
b65272e7f1 arch: Remove "process()" from the Decoder interface. 
This method was only ever an implementation detail on ARM and x86, the
only places it actually did anything. Remove it from the other decoders,
and also make it protected on x86 to remove confusion.

Change-Id: I3a719648039c1edfbc2bd044f0a21c8983b249f5
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52075
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-03 03:24:44 +00:00
Gabe Black
81fa62fc91 arch: Make the decoder reset() method virtual. 
This is called very infrequently, and so it's virtual overhead is
practically irrelevant.

Change-Id: If92cd96f75234c65c4cdffe392c32cfdd9b0c8cb
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52074
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-03 03:24:44 +00:00
Gabe Black
5e7c964158 arch: Promote outOfBytes/needMoreBytes to the InstDecoder class. 
Change-Id: Ie8f31e424081f002e3d74edd1685b4a977c545c3
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52073
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-03 03:24:44 +00:00
Gabe Black
29950b81ce arch: Promote instReady to the base InstDecoder class. 
Move the instDone flag, and the instReady function which was
consistently implemented just to return it, to the base InstDecoder
class. This flag can still be accessed easily from the subclasses, but
now it can be retrieved with just an InstDecoder pointer without a
virtual function call.

Change-Id: I8c662aa01da8fe33ffe679071c701e0aadc1a795
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52072
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-03 03:24:44 +00:00
Gabe Black
21d7ae9508 arch: Implement StaticInst::advancePC(ThreadContext *) for the ISAs. 
Change-Id: Icc0332eca55c38f80964e7f898ccfa35da64fdf9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52070
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-03 03:05:41 +00:00
Gabe Black
0f90b7cb09 cpu: Add a StaticInst::advancePC which takes a ThreadContext. 
This will avoid having to create a new heap allocated PCState, since the
instruction will know what type of backing storage to allocate on the
stack for the working copy.

Change-Id: Id208e015f6cb764bf7b13e0faf1677278b7e4641
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52069
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-03 03:05:41 +00:00
Gabe Black
7216fc8e29 cpu-simple: Use a local temporary for the PC in preExecute. 
This avoids having to dynamically allocate and then free a temporary
when working with the pc in preExecute.

Change-Id: Ic86e23d0f0c7e786122a6024a154bb2907a6afcb
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52071
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
 2021-12-02 21:35:22 +00:00
Bobby R. Bruce
848746b094 tests: Disable failing tests until root cause determined 
This should be a temporary change. Due to an issue, outlined here:
https://gem5.atlassian.net/browse/GEM5-1120, these tests have been
disabled. One of these tests, if not a combination of them, is causing a
timeout event to occur in the Nightly tests. They have therefore been
disabled until the exact cause of failure is established.

Change-Id: I4303e7b157dcf32a7879b014a9f5a88efa62b756
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53504
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-02 18:37:53 +00:00
Bobby R. Bruce
a8cd6bce3f tests: Update nightly.sh to separate compile and run threads 
This allows us to set a high number of threads for gem5 compilation
tasks, and a lower number of threads for running gem5. The latter is
more memory intensive and, therefore, we cannot always use the maximum
number of threads in a system.

Change-Id: I699d9f74b21d31841bf31e3589d323b007cb4601
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53483
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-02 18:37:53 +00:00
Arun Rodrigues
353d2063b1 scons: CheckLinkFlag() only adds to flags if test succeeds 
Previously, did not check the return of TryLink() before appending, so
unsupported flags can be used when building shared libraries. This
patch adds checking.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-1115

Change-Id: Ief62be15009cae9e02aaaa81b4d9c2d7b26e0223
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53025
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-01 19:01:48 +00:00
Hoa Nguyen
56c57db298 ext: Update ext/sst/INSTALL.md 
Currently, the installation instructions are for installing
SST-core and SST-elements version 11.0.0. This change updates
instructions to the current SST-core and SST-element version,
11.1.0.

This change also reflects that manually downloading the
`bbl-busybox-boot-exit` is no longer necessary as the example
gem5 config will download automatically.

Change-Id: I616ca38316213dcbd71b6eab121b5ac89eed1962
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53463
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-12-01 18:10:24 +00:00
Gabe Black
9fcafefe27 arch-sparc: Fix a bug in SparcNativeTrace::check. 
This method is responsible for comparing gem5's state against the state
of the real process. When checking the value of NPC, it accessed the
value of nnpc() by calling pc.nnpc(), but did not actually update regVal
with it, so the comparison was between the value from the real process
and npc().

It's mildly confusing that nnpc is compared against npc, and npc against
pc, but that's because of what the state looks like in the real process
when single stepping through it with ptrace.

You can actually see where this bug was introduced if you look at the
change which created the PCState types originally. There, you can see
how regVal was set using a method of the ThreadContext, but after that
change the value is only accessed and not actually used.

Change-Id: I0f0101db5f807640b8d25fef6448081d9cfa0213
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53363
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Boris Shingarov <shingarov@labware.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-11-30 23:30:06 +00:00
Gabe Black
a17eb869dc arch: Remove the pcstate.hh switching header file. 
Change-Id: I8c9cf0ec0c867b76ee8dd8f83b1d2d0835ecb3af
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52068
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
 2021-11-30 23:30:06 +00:00
Gabe Black
2805f3dee1 misc: Stop including arch/pcstate.hh. 
Change-Id: Ic9ea62ae9c59fd838175fd6af4c075101d46a0b1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52067
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
 2021-11-30 23:30:06 +00:00
Gabe Black
7d00ef8c5b arch: Rename PCStateCommon to PCStateWithNext. 
This intermediate class has a fairly vague name. This new name more
specifically describes what this PCState class adds to its base class.

Change-Id: I6d19383f3eb2895d924187ddbf8185352db71542
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52486
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Daniel Carvalho <odanrc@yahoo.com.br>
 2021-11-30 23:30:06 +00:00
Gabe Black
9f2fa6c4ce arch,cpu: Make branching() a virtual member of PCStateBase. 
Change-Id: I4422d07024e97dbd67e97ad95a16e1b06fd6be12
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52066
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
 2021-11-30 23:30:06 +00:00