arch-arm,arch-sparc: Remove legacy stat for faults

This is a legacy stat that was not easy to tie to a Stats::Group.

In ARM, this stat wasn't actually counting all faults, it was only
counting the faults that occured in 32-bit mode, so it's probably safe
to remove the stat (it was wrong anyway). For SPARC, it's also unlikely
anyone is depending on this stat for their research.

Change-Id: Ic6c60526ea51467627535d732258c50ce0d2c03b
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52504
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>

src/arch/arm/faults.cc

@@ -524,7 +524,6 @@ ArmFault::invoke32(ThreadContext *tc, const StaticInstPtr &inst)
     FaultBase::invoke(tc);
     if (!FullSystem)
         return;
-    countStat()++;
 
     SCTLR sctlr = tc->readMiscReg(MISCREG_SCTLR);
     SCR scr = tc->readMiscReg(MISCREG_SCR);

src/arch/arm/faults.hh

@@ -193,7 +193,6 @@ class ArmFault : public FaultBase
         // (exceptions taken in HYP mode or in AArch64 state)
         const ExceptionClass ec;
 
-        FaultStat count;
         FaultVals(const FaultName& name_, const FaultOffset& offset_,
                 const uint16_t& currELTOffset_, const uint16_t& currELHOffset_,
                 const uint16_t& lowerEL64Offset_,
@@ -237,7 +236,6 @@ class ArmFault : public FaultBase
 
     ArmStaticInst *instrAnnotate(const StaticInstPtr &inst);
     virtual void annotate(AnnotationIDs id, uint64_t val) {}
-    virtual FaultStat& countStat() = 0;
     virtual FaultOffset offset(ThreadContext *tc) = 0;
     virtual FaultOffset offset64(ThreadContext *tc) = 0;
     virtual OperatingMode nextMode() = 0;
@@ -269,7 +267,6 @@ class ArmFaultVals : public ArmFault
     ArmFaultVals<T>(ExtMachInst _machInst = 0, uint32_t _iss = 0) :
         ArmFault(_machInst, _iss) {}
     FaultName name() const override { return vals.name; }
-    FaultStat & countStat() override { return vals.count; }
     FaultOffset offset(ThreadContext *tc) override;
 
     FaultOffset offset64(ThreadContext *tc) override;

src/arch/sparc/faults.cc

@@ -503,7 +503,6 @@ SparcFaultBase::invoke(ThreadContext * tc, const StaticInstPtr &inst)
     if (!FullSystem)
         return;
 
-    countStat()++;
 
     // We can refer to this to see what the trap level -was-, but something
     // in the middle could change it in the regfile out from under us.

src/arch/sparc/faults.hh

@@ -65,7 +65,6 @@ class SparcFaultBase : public FaultBase
         const TrapType trapType;
         const FaultPriority priority;
         const PrivilegeLevelSpec nextPrivilegeLevel;
-        FaultStat count;
         FaultVals(const FaultName& name_, const TrapType& trapType_,
                 const FaultPriority& priority_, const PrivilegeLevelSpec& il)
             : name(name_), trapType(trapType_), priority(priority_),
@@ -76,7 +75,6 @@ class SparcFaultBase : public FaultBase
                 nullStaticInstPtr);
     virtual TrapType trapType() = 0;
     virtual FaultPriority priority() = 0;
-    virtual FaultStat & countStat() = 0;
     virtual PrivilegeLevel getNextLevel(PrivilegeLevel current) = 0;
 };
 
@@ -89,7 +87,6 @@ class SparcFault : public SparcFaultBase
     FaultName name() const { return vals.name; }
     TrapType trapType() { return vals.trapType; }
     FaultPriority priority() { return vals.priority; }
-    FaultStat & countStat() { return vals.count; }
 
     PrivilegeLevel
     getNextLevel(PrivilegeLevel current)