Free the squahsed instructions' heads of DepGraph in IQ squashing
In a system with large register file (ex.2048), the number of
DynInst hits the hardcoded limit (1500). This is caused by
missing freeing the heads of DepGraph in IQ. IQ only clears
out the heads when instructions reach writeback stage.
If a instruction is squashed before writeback stage, its head of
dependency graph, which holds the instruction's DynInstPtr,
would not be cleared out. This prevents freeing the DynInst of the
squahsed instruction even after it is committed.
Change-Id: I05b3db93cb6ad8960183d7ae765149c7f292e5b3
Reviewed-on: https://gem5-review.googlesource.com/7481
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
sc_main is exported as a python method on the SystemC_Kernel class and
takes a series of string arguments. The internal c++ implementation
converts those arguments into the standard argc and argv and uses them
to call the standard SystemC version of that function.
A weak SystemC version of sc_main is provided so that systemc will
compile with or without a simulation provided version of that
function. The weak version just complains and dies.
Change-Id: Iad735536c37c8bc85d06cf24779f607ae4309b8b
Reviewed-on: https://gem5-review.googlesource.com/10824
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Gabe Black <gabeblack@google.com>
This class is mostly implemented as defined by the spec, except that
it doesn't maintain the module name stack (which doesn't yet exist).
Change-Id: I05fdc4aa40fb0497b0165824baee87ebf01a7821
Reviewed-on: https://gem5-review.googlesource.com/10823
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Gabe Black <gabeblack@google.com>
Packet::checkFunctional also wrote data to/from the packet depending
on if it was read/write, respectively, which the 'check' in the name
would suggest otherwise. This renames it to doFunctional, which is
more suggestive. It also renames any function called checkFunctional
which calls Packet::checkFunctional. These are
- Bridge::BridgeMasterPort::checkFunctional
- calls Packet::checkFunctional
- MSHR::checkFunctional
- calls Packet::checkFunctional
- MSHR::TargetList::checkFunctional
- calls Packet::checkFunctional
- Queue<>::checkFunctional
(of src/mem/cache/queue.hh, not src/cpu/minor/buffers.h)
- Instantiated with Queue<WriteQueueEntry> and Queue<MSHR>
- WriteQueueEntry
- calls Packet::checkFunctional
- WriteQueueEntry::TargetList
- calls Packet::checkFunctional
- MemDelay::checkFunctional
- calls QueuedSlavePort/QueuedMasterPort::checkFunctional
- Packet::checkFunctional
- PacketQueue::checkFunctional
- calls Packet::checkFunctional
- QueuedSlavePort::checkFunctional
- calls PacketQueue::doFunctional
- QueuedMasterPort::checkFunctional
- calls PacketQueue::doFunctional
- SerialLink::SerialLinkMasterPort::checkFunctional
- calls Packet::doFunctional
Change-Id: Ieca2579c020c329040da053ba8e25820801b62c5
Reviewed-on: https://gem5-review.googlesource.com/11810
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
To avoid unintentional variable capture, all std calls must be
prefixed. These are the identifiers which are in the std
namespace (according to
https://en.cppreference.com/w/cpp/symbol_index), but that will remain
unprefixed with this change:
int8_t int16_t int32_t int64_t
uint8_t uint16_t uint32_t uint64_t
The (u)int types are included from the packet header file, which
includes <inttypes.h>, where they occur in the global namespace. They
are in the std namespace in <cinttypes>/<cstdint>.
There is an occurrence of "set" in this file, which is "Packet::set"
and not "std::set", so it is not prefixed with the std namespace
Change-Id: I7f6c0b61b09658e224fe31a9f73150b81861d6f8
Reviewed-on: https://gem5-review.googlesource.com/11809
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
There was an off-by-one error in the isRead() case, as `val_end` and
`func_end` pointed to the last byte to write to (not one past the last
byte), and thus `*_end - *_start` was not the length of the data to
memcpy.
This was correct in the case of
val_start >= func_start && val_end <= func_end
where `overlap_size = size`, but if it were (as the other cases
suggest) `overlap_size = val_end - val_start`, then it would also be
off by one.
Also, the isWrite() case catered for this.
I simplified the four ifs into one case which uses min/max (this is
how I spotted the inconsistency).
Change-Id: Ib5c5da084652e752f6baf1eec56b51b4f0f5c95c
Reviewed-on: https://gem5-review.googlesource.com/11750
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
The current traffic generator relies on a configuration file that
describes a small machine to generate stimuli. This configuration file
is usually generated by the gem5 Python configuration. This creates an
unnecessary and fragile step.
This changeset introduces a Python-based trace module. When
instantiated, the module exposes a start method that takes an iterable
object as a parameter (e.g., a generator). The iterable object is
expected to represent a list of generators that will be run one after
the other. For example:
system.tgen = PyTrafficGen()
m5.instantiate()
def trace():
yield system.tgen.createIdle(1000)
yield system.tgen.createExit(0)
system.tgen.start(trace())
Change-Id: I58e60ca517e86c197859f4daaa67750066abdc1c
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/11518
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Make the BaseTrafficGen handle cases where getNextPacket() can't find
a new packet and returns NULL. In that case, assume the generator has
run out of packets and switch to the next generator.
Change-Id: I5ca6ead550005812fb849ed9ce6b5007a65ddfa7
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/11517
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
The traffic generator currently assumes that it is always driven from
a configuration file. Split it into a base class (BaseTrafficGen) that
handles basic packet generation and a derived class that implements
the config handling (TrafficGen).
Change-Id: I9407f04c40ad7e40a263c8d1ef29d37ff8e6f1b4
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/11515
Doxygen was stopping with #include "arch/null/cpu_dummy.hh" so the html
for BaseCPU was only the three functions defined in the dummy CPU. This
forces doxygen to skip this #include correctly.
Note: The file references for base_cpu still aren't quite right, but it's
better than it was.
Change-Id: Ifafe247df2511caee2569d534bd29348a5ce9e8e
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/11649
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
These changes enable a simple binary to be simulated in full system mode.
Additionally, a new fault was implemented.
It is executed once the CPU is initialized.
This fault clears all interrupts and sets the pc to a reset vector.
Change-Id: I50cfac91a61ba39a6ef3d38caca8794073887c88
Reviewed-on: https://gem5-review.googlesource.com/9061
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
There are cases where we need to limit the symbol visibility to avoid
compilation errors. This is a problem for Python code that relies on
PyBind11 since recent versions enforce hidden symbols. As a
consequence, classes that have member variables from PyBind11 need to
be declared with the hidden attribute (or gem5 needs to be compiled
with -fvisibility=hidden).
Change-Id: I30e582fde494ff61ab7a596a595efc26a2952a5f
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/11513
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Add a memory system component that delays traffic. The base
functionality to delay packets is implemented in the abstract MemDelay
class. This class exposes three methods that control packet delays:
* delayReq(pkt)
* delayResp(pkt)
* delaySnoopResp(pkt)
These methods should be specialized to implement delays for specific
packet types.
The class SimpleMemDelay uses the MemDelay base class to implement
constant delays for read/write requests and responses.
The intention is that these classes can be used for rapid prototyping
of components that add a small fixed delay and the same throughput as
the interconnect. I.e., any buffering done in the base class will be
small and proportional to the introduced delay.
Change-Id: I158cb85f20e32bfdbcbfed66a785b4b2dd47b628
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Nicholas Lindsey <nicholas.lindsay@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/11521
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
This patch is providing gem5 a Coroutine class to be used for
instantiating asymmetrical coroutines. Coroutines are built on top of
gem5 fibers, which makes them ucontext based.
Change-Id: I7bb673a954d4a456997afd45b696933534f3e239
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/11195
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
This sets the members of a Request object to the values they
already hold, except the atomicOpFunctor which is set to
nullptr. This call introduces a bug for atomics and is not
useful for non-atomic requests. This changeset is also
adding the wave PC and instruction sequence number to the
Request object.
Change-Id: I62f7b4a597483b0aa848a0cfbc72181e1063f56a
Reviewed-on: https://gem5-review.googlesource.com/11549
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>
Previously we allowed multiplications between proxy Param and
compatible constants (int, long, float). This change extends this
functionality and adds support for multiplying with between proxy
Param and compatible proxy Param.
Change-Id: I23a083881ae4d770e818895b893534767cd2472d
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/11510
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Building gem5 binaries or regression test binaries needs to be done
from within the make_env function which builds an environment for each
flavor of build (opt, fast, debug, etc.). That makes it impossible to
add new types of binaries without modifying the central SConscript.
This change refactors how binaries are set up so that the class that
represents them handles the details of how the binary should be built.
Also, a metaclass and some lists track types of binaries and individual
instances of binaries so that they can be iterated over automatically
in make_env.
Each new executable class can define a declare_all class function which
calls declare() on individual instances. declare_all is a place to do
any processing that only has to happen once (for instance specializing
the environment) for a particular family of executables.
Change-Id: I8a6ee9438280cd67e6c0b92ca28738a53cb16950
Reviewed-on: https://gem5-review.googlesource.com/10915
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
While a cache clean operation is pending, all requests to the
corresponding block get deferred. When the response of a cache clean
operation is received, if the block is present and the response is not
invalidating, we can service all deferred targets that didn't require
writable. This change implements this functionality.
Change-Id: Ief47e74d07749a6a9736ab450eb46eefa53464a2
Reviewed-on: https://gem5-review.googlesource.com/11018
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Until now, all deferred targets of an MSHR would be promoted together
as soon as the targets were serviced. Due to the way we handle cache
clean operations we might need to promote only deferred targets that
don't require writable, leaving some targets as deferred. This change
adds support for this selective promotion.
Change-Id: I502e523dc9adbaf394955cbacea8286ab6a9b6bc
Reviewed-on: https://gem5-review.googlesource.com/11017
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
There are cases where a request which does not need a writable copy
gets an response upgraded reponse and fills in a writable copy. When
this happens, we promote deferred MSHR targets that were deferred
because they needed a writable copy to service them immediately.
Previously, we would uncoditionally promote deferred targets. Since
the deferred targets might contain a cache invalidation operation, we
have to make sure that any targets following the cache invalidation is
not promoted.
Change-Id: I1f7b28f7d35f84329e065c8f63117db21852365a
Reviewed-on: https://gem5-review.googlesource.com/11016
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Until now, all deferred targets of an MSHR would be promoted together
as soon as the targets were serviced. When we promote deferred targets
we also clear the downstreamPending flag.
Due to the way we handle cache clean operations we might need to
promote only deferred targets that don't require writable, leaving
some targets as deferred. To allow for partial target promotion, this
change adds support for clearing the downstreamPending only for a
subset of a TargetsList.
Change-Id: Id06953643ba9a975ebacc76ac10215441e264e74
Reviewed-on: https://gem5-review.googlesource.com/11015
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
One of the most common errors during the installation of gem5 is the one
related to the failure of the check of the Python2.7 headers in the
SConstruct file. In some cases the headers are correctly installed, but a
wrong selection of the C compiler can make this check fail. This commit
wants to add some useful information this error message.
Change-Id: I0d087ad01c6e4cca3559f23070c37b5c13600962
Reviewed-on: https://gem5-review.googlesource.com/11389
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
The old utility function called badMode was only checking if the mode
passed as an argument was a recognized mode. It was not checking if the
corresponding mode/EL was implemented. That function has been renamed to
unknownMode and a new badMode has been introduced. This is used by the
cpsrWriteByInstruction function. In this way any try to change the
execution mode won't succeed if the mode hasn't been implemented.
Change-Id: Ibfe385c5465b904acc0d2eb9647710891d72c9df
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/11196
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
This class encapsulates the idea of a Fiber in such a way that other
implementations can be substituted in in the future. This
implementation uses the ucontext family of functions.
This change also adds a new unit test which exercises the new class. It
creates three new fibers which accept a sequence of other fibers to
switch to, one after the other. The main test function switches to
the these fibers which switch with each other and occasionally back to
the main fiber. Each time a test fiber is activated, it checks against
a list which shows the correct order for the fibers to run in. When the
main fiber gets control, it makes sure that list has been progressed
through by the correct amount.
Change-Id: I1fc2afa414b51baaa91e350a4ebc791d989f0b8a
Reviewed-on: https://gem5-review.googlesource.com/10935
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
