Commit Graph

776 Commits

Author SHA1 Message Date
Gabe Black
7342bccd8d arch,cpu,mem,sim: Reimplement the SE translating proxy using the FS one.
The only functional difference between them was that the SE one might
have optionally fixed up missing translations for demand paging.

This lets us get rid of some code recreating the proxy ports in
setProcessPtr since the SE translating port no longer keeps a copy of
the process object pointer.

Change-Id: Id97df1874f1de138ffd4f2dbb5846dda79d9e4ac
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26550
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Maintainer: Gabe Black <gabeblack@google.com>
2020-03-19 07:21:13 +00:00
Gabe Black
8e0e7da5ab sparc: Make translateFunctional ignore alignment and use the page tables.
translateFunctional might be used with unaligned addresses which should
be allowed in that context. Also, in SE mode, if the translation isn't
in the TLB itself, then it should be looked up in the SE mode fake page
tables and not in a page table resident in memory.

Change-Id: Ibb39685cfdcd4eb6cb8a0486a1de014a4e452518
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26831
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-19 01:38:01 +00:00
Gabe Black
9d1d264fb6 arch: Eliminate vtophys and its switching header file.
This function is no longer used anywhere in gem5.

Small helper functions which had been put alongside vtophys on ARM and
RISCV were also moved into src/arch/arm/remote_gdb.cc and
src/arch/power/pagetable.hh, the only places they were used.

Change-Id: Iba72f6c4b797a35a785a5bb781d602c943541fa7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26234
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-19 01:38:01 +00:00
Gabe Black
309b303240 kern,arch: Refactor SkipFuncEvent to not use skipFunction.
Replace it with a new virtual function.

Change-Id: I9d516d21ab3b1d1d70ea1297f984f868d3e7c3fb
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24111
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-17 06:53:00 +00:00
Giacomo Travaglini
1bf2821ae7 misc: Make exception handling python3 compliant
Change-Id: I37d0e97e9762e21c7a0ad315cf7684a19119b5b4
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26251
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
2020-03-13 14:24:07 +00:00
Gabe Black
ec5a24fba4 sim: Rename GuestABI's Position to State.
This type can hold any generic state related to locating return types
and arguments in addition to simple position information. To make that
clearer, this change renames the Position type to State.

Change-Id: I50ff2ec61c3eba0e9505c66ce32e27b515bd4b27
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24107
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Gabe Black <gabeblack@google.com>
2020-03-12 11:14:09 +00:00
Gabe Black
05dbc1d171 arch,sim: Get rid of the now unused setSyscallReturn method.
Change-Id: I61741ab2eca4c77a2c8884e2b5c328479e2b3c90
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23505
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Gabe Black <gabeblack@google.com>
2020-03-12 07:21:13 +00:00
Gabe Black
f44b7729a3 sim: Get rid of the now unused getSyscallArg method.
Change-Id: I2f78420d8687da7530feb66784fe3e6d2357baf8
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23462
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Gabe Black <gabeblack@google.com>
2020-03-12 07:21:13 +00:00
Gabe Black
37d2204c5a sparc: Use a SPARC specific GuestABI for system calls.
Change-Id: I41996cada5ccde7b265e5315829ac6690da8902f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23447
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-12 01:35:34 +00:00
Gabe Black
fef53599b2 sparc: Introduce a BitUnion for the CCR register.
This avoids opaque masks when accessing fields of this register.

Change-Id: If20d82c7c6401e6b1b35bb6d2c69542a56e2fb45
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23446
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-12 01:35:34 +00:00
Gabe Black
2edca021e0 sparc: Introduce constants for pseudo integer registers.
These are "integer" registers which are renamed, but which aren't
normally considered integer registers by the ISA. They had been indexed
by adding an opaque constant to the number of official integer
registers which obscured what they were, and was also fragile and
invited mistakes.

Change-Id: Idab8cf4d889682b98c7c81a00d9a92d8e3bb3a05
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23445
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-12 01:35:34 +00:00
Gabe Black
0ecb82ffeb sparc: Get rid of some commented out constants.
Change-Id: Ie2a223f5f969402a03b924ef767eddbcc14bf312
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23444
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-12 01:35:34 +00:00
Gabe Black
9d606b80b6 sim: Make SyscallReturn handle extra/"pseudo" return registers.
Avoid special casing them in the system calls themselves.

Change-Id: I735f8e6fdff164c66e3f1386aed3fc9b107ea45f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23440
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-12 01:35:34 +00:00
Gabe Black
19c9ccf6e6 sparc: Convert SPARC specific syscalls to Guest ABI.
Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: I144fc3fb0e408380294ea91fefa881494f44098b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23203
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-12 00:43:28 +00:00
Gabe Black
73fdc2eb57 config,arch,cpu,kern,sim: Extract kernel information from System.
Information about what kernel to load and how to load it was built
into the System object and its subclasses. That overloaded the System
object and made it responsible for too many things, and also was
somewhat awkward when working with SE mode which doesn't have a kernel.

This change extracts the kernel and information related to it from the
System object and puts into into a OsKernel or Workload object.
Currently the idea of a "Workload" to run and a kernel are a bit
muddled, an unfortunate carry-over from the original code. It's also an
implication of trying not to make too sweeping of a change, and to
minimize the number of times configs need to change, ie avoiding
creating a "kernel" parameter which would shortly thereafter be
renamed to "workload".

In future changes, the ideas of a kernel and a workload will be
disentangled, and workloads will be expanded to include emulated
operating systems which shephard and contain Process-es for syscall
emulation.

This change was originally split into pieces to make reviewing it
easier. Those reviews are here:

https: //gem5-review.googlesource.com/c/public/gem5/+/22243
https: //gem5-review.googlesource.com/c/public/gem5/+/24144
https: //gem5-review.googlesource.com/c/public/gem5/+/24145
https: //gem5-review.googlesource.com/c/public/gem5/+/24146
https: //gem5-review.googlesource.com/c/public/gem5/+/24147
https: //gem5-review.googlesource.com/c/public/gem5/+/24286

Change-Id: Ia3d863db276a023b6a2c7ee7a656d8142ff75589
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26466
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-11 15:57:14 +00:00
Giacomo Travaglini
4e7fe439d7 misc: string.join has been removed in python3
In general string methods are deprecated in favour of str ones

Change-Id: Ifba04e0b70be29e5a82a67cf11837f740de57e32
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26244
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-10 09:35:56 +00:00
Gabe Black
4d5e1bf6a1 arch,cpu: Get rid of unused/unimplemented vtophys variants.
The version of vtophys which didn't take a ThreadContext had only been
implemented on Alpha which has since been removed, so this version of
the function was completely unimplemented and never used.

This change also gets rid of the dbg_vtophys which was sometimes
implemented but also never used, and takes the opportunity to fix up
some style problems in some of the vtophys arch files.

Change-Id: Ie10f881f8ce08c7188e71805357cf3264be4c81a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26224
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-09 21:31:50 +00:00
Gabe Black
ac275f96ec sparc: Implement translateFunctional in the TLB class.
This is a slightly munged version of vtophys, but which returns faults
like the normal translate functions if the address is malformed. It
attempts to return an approximately correct fault if the translation
isn't found, but since SPARC doesn't have hardware managed TLBs that
has to be an approximation.

translateFunctional also ignores permissions type checks (unless
they're built into the "lookup" method?) in line with vtophys type
semantics. The idea is that translateFunctional is used in conjunction
with functional accesses, and those are intended to reach beyond
normal barriers/boundaries to give unfettered access to the system for
debugging or setup purposes.

Change-Id: I000d9c31877b82043489792de037e7d664914fa9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26404
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-09 21:31:50 +00:00
Gabe Black
a17d8e5f2d sparc: Delete some commented out code in the TLB.
Change-Id: I80c455403422ec35bafa1f3ed86628f8327d1da0
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26403
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
2020-03-08 15:37:20 +00:00
Gabe Black
ebd62eff3c arch,cpu,mem: Replace the mmmapped IPR mechanism with local accesses.
The new local access mechanism installs a callback in the request which
implements what the mmapped IPR was doing. That avoids having to have
stubs in ISAs that don't have mmapped IPRs, avoids having to encode
what to do to communicate from the TLB and the mmapped IPR functions,
and gets rid of another global ISA interface function and header files.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: I772c2ae2ca3830a4486919ce9804560c0f2d596a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23188
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-04 04:09:19 +00:00
Adrian Herrera
d266a37e5e misc: pass ThreadContext on ISA clear
This patch changes the clear API for the ISAs to pass the ThreadContext
issuing the call. This allows the ISA to carry out maintainance
operations on the TC state.

Change-Id: I40d6cf39c321521a221146aa0fd8f2cf665d39c6
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25465
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-19 17:32:46 +00:00
Gabe Black
859c1c6332 sparc: Delete authors lists from sparc files.
Change-Id: Iac3f9bb546121c73e6e73a0377d2a917c40df5f8
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25452
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-18 03:36:18 +00:00
Gabe Black
2b63ac0d55 arch: Get rid of the generic mmapped IPR mechanism.
Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: I4ab6f80581eee39e90fb91c672eca8e1a8fd9046
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23186
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
2020-02-11 11:58:06 +00:00
Gabe Black
4aa277a865 arch: Add a bunch of missing override specifiers.
Missing override on methods which are overriding virtual methods causes
warnings/errors on certain compilers.

Change-Id: I16f565fa07bfcb399a0209cd87f1f9729cd89b2e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25223
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-10 22:31:12 +00:00
Gabe Black
97a0ad7f63 arch,sim: Replace setuidFunc with ignoreFunc.
The setuidFunc just ignores the call and warns about it, and that's
what ignoreFunc already does.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: I7655863ed6fe200ff3ac087be3218d49c3c43061
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23194
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-08 13:05:45 +00:00
Gabe Black
af07a51f0b arch: Switch SyscallDescABI in for SyscallDesc.
This lets system calls accept arguments by putting them in their
signatures.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: Ieb32b8b5592d894e493466717613ff16e2a03768
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23191
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-08 12:58:03 +00:00
Gabe Black
e0f0351182 arch: Simplify the SyscallDesc tables.
By using braced initializer lists and dropping the default
unimplementedFunc implementation function, the SyscallDesc tables
become a lot less crowded, and it's now very obvious which syscalls
are implemented just by quickly visually scanning the table.

This will also make it a lot easier to change the underlying type
stored in the table without having to adjust all of the instances
within them.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: I7821de74812e1c02ca4550fc9c46cc2188cf1bd0
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23189
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-08 12:32:10 +00:00
Gabe Black
c8079dd745 arch: Introduce a base class for ISA classes.
These don't have anything in them at the moment since making some ISA
methods virtual and not inlined will likely add overhead, specifically
the ones for flattening registers. Some code may need to be rearranged
to minimize that overhead before the ISA objects can be truly put
behind a generic interface.

Change-Id: Ie36a771e977535a7996fdff701ce202bb95c8c58
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25007
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
2020-02-05 22:41:47 +00:00
Gabe Black
4ae8d1c0ed arch,sim: Merge initCPU into the ISA System classes.
Those classes are already ISA specific, so we can just move initCPU's
contents there and take it out of utility.hh, utility.cc, and the base
System's initState.

Change-Id: I28f0d0b50d83efe5116b0b24d20f8182a02823e7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24905
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-01 12:31:56 +00:00
Gabe Black
6a7a5b3005 arch,sim: Merge initCPU and startupCPU.
These two functions were called in exactly one place one right after
the other, and served similar purposes.

This change merges them together, and cleans them up slightly. It also
removes checks for FullSystem, since those functions are only called
in full system to begin with.

Change-Id: I214f7d2d3f88960dccb5895c1241f61cd78716a8
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24904
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-01 12:31:40 +00:00
Gabe Black
11f7344cdc arch: Get rid of the unused (and mostly undefined) zeroRegisters.
Change-Id: Iadf56e4e742506af7ae4b617d2dc5a56439aa407
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24188
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-22 07:05:44 +00:00
Gabe Black
390a74f599 sim,arch: Collapse the ISA specific versions of m5Syscall.
The x86 version doesn't do anything x86 specific, and so can be used
generically in sim/pseudo_inst.(hh|cc)

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: I46c2a7d326bd7a95daa8611888051c180e92e446
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23177
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
2019-12-10 23:58:14 +00:00
Gabe Black
cb3457ccd1 arch,cpu,sim: Push syscall number determination up to processes.
The logic that determines which syscall to call was built into the
implementation of faults/exceptions or even into the instruction
decoder, but that logic can depend on what OS is being used, and
sometimes even what version, for example 32bit vs. 64bit.

This change pushes that logic up into the Process objects since those
already handle a lot of the aspects of emulating the guest OS. Instead,
the ISA or fault implementations just notify the rest of the system
that a nebulous syscall has happened, and that gets propogated upward
until the process does something with it. That's very analogous to how
a system call would work on a real machine.

When a system call happens, the low level component which detects that
should call tc->syscall(&fault), where tc is the relevant thread (or
execution) context, and fault is a Fault which can ultimately be set
by the system call implementation.

The TC implementor (probably a CPU) will then have a chance to do
whatever it needs to to handle a system call. Currently only O3 does
anything special here. That implementor will end up calling the
Process's syscall() method.

Once in Process::syscall, the process object will use it's contextual
knowledge to determine what system call is being requested. It then
calls Process::doSyscall with the right syscall number, where doSyscall
centralizes the common mechanism for actually retrieving and calling
into the system call implementation.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: I937ec1ef0576142c2a182ff33ca508d77ad0e7a1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23176
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
2019-12-10 23:58:14 +00:00
Gabe Black
4670de8100 arch: Get rid of the now unused setSyscallArg.
Setting syscall args isn't really something we need to do in gem5,
since that will be taken care of by the code actually calling the
syscall. We just need to be able to retrieve the value it put there.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: I0bb6d5d0207a7892414a722b3788cb70ee509582
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23174
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
2019-12-10 23:58:14 +00:00
Gabe Black
f135fc9cbe sparc: Fix the getresuidFunc prototype.
When the syscall signature was changed to not take a Process pointer,
the prototype for getresuidFunc was not updated.

Change-Id: I887cc3e3aa8483fc608df9963876a0ac6fa2251d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23320
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2019-12-04 04:29:50 +00:00
Gabe Black
b99243360f sparc: Fix the predecoder's moreBytes method.
Endianness transformation was moved from the CPU into this method,
making the "inst" parameter guest endian instead of host endian. The
emi member of the decoder was set using the betoh method, ensuring that
it was still stored in host order. Unfortunately, the "inst" parameter
was used in some places when setting up the rest of emi.

This change replaces those uses of inst with emi.

Change-Id: I0c7f9a1833db4b64fc1a5015cf10f6ba3f7c26a0
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23163
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2019-12-04 04:29:50 +00:00
Gabe Black
d40f0bc579 arch: Get rid of the (Big|Little)EndianGuest namespaces.
These namespaces were used to set up an environment/context where there
was an implicit guest namespace. This is an issue when there may be
multiple guest endiannesses which might be different. In cases where
we don't know what the guest endianness is, we can't rely on it being
an implicit part of our context since that would be ambiguous. In cases
where we do know, for instance in ISA specific code, we can just use
the endianness specific version that's appropriate for that context.

This also (somewhat) removes the assumption that there is a single
endianness that applies for a particular ISA. Practically speaking this
assumption will probably still stand though, since there would likely
be a non-trivial performance penalty to apply a configurable endianness
instead of a fixed one the compiler can optomize/remove.

Change-Id: I2dff338b58726d724f387388efe32d9233885680
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22374
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2019-11-18 20:02:31 +00:00
Gabe Black
697e559956 arch: Make and use endian specific versions of the mem helpers.
Rather than using TheISA to pick an endian conversion function, we can
have a version defined for big and little endian and call the right one
from the ISA code.

Change-Id: I5014504968952e21abff3c5f6cbe58ca24233f33
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22373
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2019-11-18 20:02:31 +00:00
Gabe Black
5a85737859 sparc: Replace htog and gtoh with htobe and betoh.
We know what endianness to use when we're implicitly working with
SPARC.

Change-Id: I85eaac1da087a8086b9450b762a52323f2498e2e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22368
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2019-11-07 11:02:46 +00:00
Gabe Black
8549ee4a6d arch,cpu: Move endianness conversion of inst bytes into the ISA.
It doesn't matter if the bytes are converted before or after they're
fed into the decoder. The ISA already knows what endianness to use
implicitly, and this frees the CPU which doesn't from having to worry
about it.

Change-Id: Id6574ee81bbf4f032c1d7b2901a664f2bd014fbc
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22343
Maintainer: Gabe Black <gabeblack@google.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2019-11-02 00:01:52 +00:00
Gabe Black
c98fc78926 arch,sim: Make copyStringArray take an explicit endianness.
Change-Id: I5cf4291b19dd2d2bdbbf145ad8e00994fabf5547
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22366
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2019-10-30 22:29:23 +00:00
Gabe Black
607df7e656 arch: Make endianness a property of the OS class syscalls can consume.
That way the syscall implementations won't have to find the right
endianness to use on their own, typically by referring to TheISA.

Change-Id: I186b2f419d5dbee72cc9b5abce7356f3143f0c83
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22363
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2019-10-30 22:29:23 +00:00
Gabe Black
a8f6e6ceec sparc: Create a helper functions to install firmware images.
The first function handles the repetitive process of creating an
ObjectFile for a particular purpose and checking if that was
successful.
The second conditionally offsets the images in case they were, for
instance, loaded from an ELF file which already had them in the right
place. It offsets them so that their entry point (which will be zero
for raw images) lines up with the appropriate entry address (which will
be at the start of raw images).

This is more correct in more cases, and also removes a lot of
redundancy. There's still a lot of redundancy in the code which sets
up the symbol tables, but there are some irregularities which make that
harder to wrap in a helper function.

Change-Id: I2fee8b2175faff284ff9e007307f7769043497a1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21469
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2019-10-30 00:06:50 +00:00
Gabe Black
ae390c629f arch: Make a base class for Interrupts.
That abstracts the ISA further from the CPU, getting us a small step
closer to being able to build in more than one ISA at a time.

Change-Id: Ibf7e26a3df411ffe994ac1e11d2a53b656863223
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20831
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2019-10-19 01:45:48 +00:00
Gabe Black
e35b491c46 arch,base,sim: Move Process loader hooks into the Process class.
This code was originally in the ObjectFile class, but not all object
files will become Processes. All Processes will ultimately come from
ObjectFiles though, so it makes more sense to put that class there.

Change-Id: Ie73e4cdecbb51ce53d24cf68911a6cfc0685d771
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21468
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
2019-10-16 01:36:33 +00:00
Gabe Black
6ee86bf497 arch,base: Separate the idea of a memory image and object file.
A memory image can be described by an object file, but an object file
is more than a memory image. Also, it makes sense to manipulate a
memory image to, for instance, change how it's loaded into memory. That
takes on larger implications (relocations, the entry point, symbols,
etc.) when talking about the whole object file, and also modifies
aspects which may not need to change. For instance if an image needs
to be loaded into memory at addresses different from what's in the
object file, but other things like symbols need to stay unmodified.

Change-Id: Ia360405ffb2c1c48e0cc201ac0a0764357996a54
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21466
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Maintainer: Gabe Black <gabeblack@google.com>
2019-10-12 04:10:59 +00:00
Gabe Black
dd2b3bde4c arch,base: Stop loading the interpreter in ElfObject.
The interpreter is a separate object file, and while it's convenient to
hide loading it in the code which loads the main object file, it breaks
the conceptual abstraction since you only asked it to load the main
object file.

Also, this makes every object file format reimplement the idea of
loading the interpreter. Admittedly only ELF recognizes and sets up
an interpreter, but other formats conceptually could too.

This does move that limitted hypothetical redundancy out of the object
file formats and moves it into the process objects, but I think
conceptually that's where it belongs. It would also probably be pretty
easy to add a method to the base Process class that would handle
loading an image and also the interpreter image.

This change does not (yet) separate reading symbol tables.

Change-Id: I4a165eac599a9bcd30371a162379e833c4cc89b4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21465
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
2019-10-10 22:56:52 +00:00
Gabe Black
a3d2a9ec92 arch, base: Stop assuming object files have three segments.
The ObjectFile class has hardcoded assumptions that there are three
segments, text, bss and data. There are some files which have one
"segment" like raw files, where the entire file's contents are
considered a single segment. There are also ELF files which can have
an arbitrary number of segments, and those segments can hold any
number of sections, including the text, data and/or bss sections.

Removing this assumption frees up some object file formats from having
to twist themselves to fit in that structure, possibly introducing
ambiguities when some segments may fulfill multiple roles.

Change-Id: I976e06a3a90ef852b17a6485e2595b006b2090d5
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21463
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
2019-10-10 01:25:17 +00:00
Gabe Black
3c65c44a1a base: Rename Section to Segment, and some of its members.
ELF is, in my opinion, the most important object file format gem5
currently understands, and in ELF terminolgy the blob of data that
needs to be loaded into memory to a particular location is called a
segment. A section is a software level view of what's in a region
of memory, and a single segment may contain multiple sections which
happen to follow each other in memory.

Change-Id: Ib810c5050723d5a96bd7550515b08ac695fb1b02
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21462
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
2019-10-09 00:06:25 +00:00
Gabe Black
b87670f172 sparc: Fix a warning/error in tlb.cc.
gcc has started to not like memseting an ojbect to zero in some cases.
Cast the TlbEntry pointer to a void * before memsetting it to placate
gcc.

Change-Id: Iccb3c326fdb82f1f111329ff1a80bb6719cace47
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20830
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
2019-09-13 00:55:25 +00:00