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sparc: Delete some commented out code in the TLB.

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Change-Id: I80c455403422ec35bafa1f3ed86628f8327d1da0
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26403
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
This commit is contained in:
Gabe Black
2020-03-06 15:37:34 -08:00
parent 4dd00b0153
commit a17d8e5f2d
1 changed files with 0 additions and 13 deletions
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13
src/arch/sparc/tlb.cc
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@@ -97,17 +97,10 @@ TLB::insert(Addr va, int partition_id, int context_id, bool real,
{
MapIter i;
TlbEntry *new_entry = NULL;
// TlbRange tr;
int x;
cacheValid = false;
va &= ~(PTE.size()-1);
/* tr.va = va;
tr.size = PTE.size() - 1;
tr.contextId = context_id;
tr.partitionId = partition_id;
tr.real = real;
*/
DPRINTF(TLB,
"TLB: Inserting Entry; va=%#x pa=%#x pid=%d cid=%d r=%d entryid=%d\n",
@@ -659,12 +652,6 @@ TLB::translateData(const RequestPtr &req, ThreadContext *tc, bool write)
if (asiIsLittle(asi))
panic("Little Endian ASIs not supported\n");
//XXX It's unclear from looking at the documentation how a no fault
// load differs from a regular one, other than what happens concerning
// nfo and e bits in the TTE
// if (asiIsNoFault(asi))
// panic("No Fault ASIs not supported\n");
if (asiIsPartialStore(asi))
panic("Partial Store ASIs not supported\n");