Commit Graph

15045 Commits

Author SHA1 Message Date
Gabe Black
7342bccd8d arch,cpu,mem,sim: Reimplement the SE translating proxy using the FS one.
The only functional difference between them was that the SE one might
have optionally fixed up missing translations for demand paging.

This lets us get rid of some code recreating the proxy ports in
setProcessPtr since the SE translating port no longer keeps a copy of
the process object pointer.

Change-Id: Id97df1874f1de138ffd4f2dbb5846dda79d9e4ac
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26550
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Maintainer: Gabe Black <gabeblack@google.com>
2020-03-19 07:21:13 +00:00
Gabe Black
8e0e7da5ab sparc: Make translateFunctional ignore alignment and use the page tables.
translateFunctional might be used with unaligned addresses which should
be allowed in that context. Also, in SE mode, if the translation isn't
in the TLB itself, then it should be looked up in the SE mode fake page
tables and not in a page table resident in memory.

Change-Id: Ibb39685cfdcd4eb6cb8a0486a1de014a4e452518
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26831
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-19 01:38:01 +00:00
Gabe Black
9d1d264fb6 arch: Eliminate vtophys and its switching header file.
This function is no longer used anywhere in gem5.

Small helper functions which had been put alongside vtophys on ARM and
RISCV were also moved into src/arch/arm/remote_gdb.cc and
src/arch/power/pagetable.hh, the only places they were used.

Change-Id: Iba72f6c4b797a35a785a5bb781d602c943541fa7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26234
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-19 01:38:01 +00:00
Gabe Black
7e0f15e1c0 mem: Make the FSTranslatingPortProxy stop using vtophys.
That was the only place vtophys was still being used. Instead, use the
data TLB to translate functional, and if that fails try the the
instruction TLB.

Change-Id: Ie5e1e1b5d470f010e25482d785f111dc4292db60
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26233
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-19 01:11:21 +00:00
Gabe Black
951650156c arm: Demote PCEvent subclass pointers to PCEvent pointers.
Nothing is actually accessed through these pointers. This simplifies
their declration, and gives more flexibility when setting up those
events.

Change-Id: If857de5c8df37b6ead7eae53e3c0c6c3103938c0
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24112
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
2020-03-19 00:50:27 +00:00
Gabe Black
c38298d931 riscv: Implement translateFunctional.
Change-Id: Ibe8adea8f66c7de22ee2ab0da54e866cd05fc257
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26547
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-19 00:50:10 +00:00
Gabe Black
e387833613 arch,kern: Rename some function events to have better names.
Rename many of the Event classes to have more succinct or
consistent names, and fix various style issues.

Change-Id: Ib322da31d81e7a245a00d21786c2aa417c9f2cde
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26703
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-18 02:11:33 +00:00
jiegec
dfbef4b1f5 tests: Use relative path for python3 compliance
Change-Id: Ie18c52982e2083d0fc2723147f2493b39bcb3786
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26743
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-18 01:51:10 +00:00
Boris Shingarov
bdfbd9b9bc base: Do not treat addresses < 10 specially
The RSP stub (base/remote_gdb.cc) treats virtual addresses below 0x000A as
meaning "the address used in the previous m-packet".  This leads to nasty
surprises, and is not justified by neither the RSP protocol documentation
nor other existing RSP implementations.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-407

Change-Id: I5fccc10a58d9af856eeee6d45418905c0f47ffab
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26605
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
2020-03-18 00:07:28 +00:00
Bobby R. Bruce
e0937d9443 tests: Increased Kokoro's timeout to 5 hours
Change-Id: Ice9fc5f17dfa06f61bc5583ecca15c54742bc254
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26843
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-18 00:02:31 +00:00
Bobby R. Bruce
9e4209cd3e tests: Removed old scon-based 40.m5threads-test-atomic tests
These have been migrated to be run via testlib.

Change-Id: I186e4048096f718c0de378033924cd23328168d7
Jira: https://gem5.atlassian.net/browse/GEM5-109
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25843
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-17 15:36:04 +00:00
Bobby R. Bruce
cc32247ebc tests: Migrated 40.m5threads-test-atomic scons tests to testlib
At present, the 40.m5threads-test-atomic tests fail as the SPARC binary
(generated from `tests/test-progs/pthread/src/test_atomic.cpp`) is not
present. This has been noted in:
https://gem5.atlassian.net/browse/GEM5-368

Change-Id: I7865826388be46cec06a201712081146a58518f2
Jira: https://gem5.atlassian.net/browse/GEM5-109
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25824
Reviewed-by: Ayaz Akram <yazakram@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-17 15:36:04 +00:00
Bobby R. Bruce
421f963f9d tests,arch-alpha: Removing ALPHA ISA from testlib config
Change-Id: Icded5f4aec7bc212a818a97c4de5d7b8f8757121
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26823
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-17 15:35:47 +00:00
Gabe Black
309b303240 kern,arch: Refactor SkipFuncEvent to not use skipFunction.
Replace it with a new virtual function.

Change-Id: I9d516d21ab3b1d1d70ea1297f984f868d3e7c3fb
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24111
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-17 06:53:00 +00:00
Gabe Black
45829cfe00 x86: Implement translateFunctional.
This function is based off of vtophys in the full system case, and off
of the page table fill mechanism used in SE mode. It ignores what's
already in the TLB, and also ignores protection mechanisms.

This may need to be reworked in the future if, for instance, pages
still resident in the TLB but not in the page tables need to be
considered, but it should work at least for the time being.

Change-Id: If21701ca36a30805f4199312933a8afc91f20501
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26405
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-17 01:08:01 +00:00
Bobby R. Bruce
cf108dd376 tests: Migrated 80.dram scons-based tests to testlib framework
"configs/dram/low_power_sweep.py" has been modified to keep the
generated "lowp_sweep.cfg" file in "configs/dram". This generated file
is now ignored by git.

Change-Id: I700d04944fee58f8a506c71fd474b84024ec4374
Jira: https://gem5.atlassian.net/browse/GEM5-109
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25923
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-16 23:15:44 +00:00
Daniel R. Carvalho
7539c69c4e mem-garnet: Use static allocation in CrossbarSwitch
There is no need to dynamically allocate these variables.

Change-Id: I6efeaffe75f2b4ba706c26d2a12c42c07dc7c7ee
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24983
Reviewed-by: Srikant Bharadwaj <srikant.bharadwaj@amd.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-16 22:23:16 +00:00
Daniel R. Carvalho
f5f523ed26 mem-garnet: Use smart pointers in Router's members
Use smart pointers for the pointers managed by Router, and do
static allocation when possible.

Change-Id: I5fad8b2d17ac7950d478d37000ac80a4d2f68b15
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24248
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Srikant Bharadwaj <srikant.bharadwaj@amd.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-16 22:23:16 +00:00
Daniel R. Carvalho
21e12a0d0e mem-garnet: Use static allocation in Switch
Make pointers non pointers when possible.

Change-Id: I272387c2ac1fd77deef06feb637127e232910e30
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24250
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-16 22:23:16 +00:00
Daniel R. Carvalho
c2ae0ba0c4 mem-garnet: Use static allocation in NetworkLink
Use static allocation to manage NetworkLink's pointers.

Change-Id: I3ab22b1f912f0119448f9013fd0dfff9bf5a6999
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24252
Reviewed-by: Srikant Bharadwaj <srikant.bharadwaj@amd.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-16 22:23:16 +00:00
Daniel R. Carvalho
5fce5056fd mem-garnet: Use static allocation in NetworkInterface
Use static allocation for the pointers managed by NetworkInterface.

Change-Id: Ib97d95165337659f92cb8a078020692baae5b5ca
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24247
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Srikant Bharadwaj <srikant.bharadwaj@amd.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-16 22:23:16 +00:00
Daniel R. Carvalho
0fa704526d mem-garnet: Use static allocation in InputUnit
Use static allocation for the pointers managed by InputUnit.

Change-Id: I3eab42c6c08b1a519b9b55de26e820bad2ef03c4
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24245
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-16 22:23:16 +00:00
Daniel R. Carvalho
f545497057 mem-garnet: Use static allocation in OutputUnit
Use static allocation for the pointers created by OutputUnit.

Change-Id: Ica4fd5d4994078764769702311520c9daf8dba72
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24243
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-16 22:23:16 +00:00
Daniel R. Carvalho
f378fd5a70 mem-garnet: Use static allocation in VirtualChannel
The input buffer does not need to be dynamically allocated.

Change-Id: Ice64f40d2a7e16af325ddb6803e34b3eed2e99db
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24253
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-16 22:23:16 +00:00
Daniel R. Carvalho
27f915e4d9 mem-garnet: Remove delete of param pointers of SimpleNetwork
All over gem5 the params pointers are not deleted within the classes
that they were created for. Although this is a potential memory leak
as of now, it is probably safer to follow general convention so that
it can be fixed at once in the future.

Change-Id: If96f04058d51513fa8763610880e5524785ee9cf
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24249
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-16 22:23:16 +00:00
Daniel R. Carvalho
e23ce9bc73 mem-garnet: Remove delete of param pointers of GarnetNetwork
All over gem5 the params pointers are not deleted within the classes
that they were created for. Although this is a potential memory leak
as of now, it is probably safer to follow general convention so that
it can be fixed at once in the future.

Change-Id: I74b662a8e635cdfb4dc1eae732dd114659fab2e9
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24246
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-16 22:23:16 +00:00
Daniel R. Carvalho
d8e7d6bcb9 base: Add static assert to trie
Trie is based on the condition that they key is an integral. As so,
add a static_assert to guarantee that. Also, added some general info
about tries to the class.

Change-Id: Idc18f6a685db8047cd44b791f427666d3dd2d187
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26784
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-16 22:22:07 +00:00
Gabe Black
6bc9572914 x86: Hook up pread64 in 32/64 bit linux, and pwrite64 in 32 bit.
My new computer has a dynamic linker which seems to use the pread64
system call, and since that gets pulled in when running tests, that
needs to be implemented for tests to pass on that machine, making it
possible to detect problems the failure might ohterwise mask.

This is only really necessary for 64 bit linux, but while I'm here I
hooked it up for 32 bit linux as well. I also added pwrite64 for 32 bit
linux since that was only enabled for 64 bit.

Change-Id: I8d2061d30e98a1581c5e30b522b6ba12aea20ecd
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26604
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-16 22:03:43 +00:00
Gabe Black
0fedeb873d sim: Provide an implementation for the pread64 system call.
This implementation is very similar to the pwrite64 system call, just
with data going the other direction as you'd expect.

Change-Id: I4f8ec9d83bf2339f9c84e31f25309c58e6157304
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26603
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-16 21:57:01 +00:00
Ciro Santilli
5af26353b5 configs: fix forwarding of --bootloader to fs.py
Since I02919207d6f175854017ae7b603d811da63d618e the fs.py --bootloader
option can be used to select a bootloader explicitly.

Ia3d863db276a023b6a2c7ee7a656d8142ff75589 forgot to pass that parameter
likely due to a rebase issue and it gets searched in M5_PATH.

Change-Id: Ic4cf3ccf041e1c34eac7753424fe842bd34a77f9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26724
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-16 12:09:29 +00:00
Giacomo Travaglini
2f350b822a power: Fix regStats for PowerModel and PowerModelState
Every Stats::Group need to call the parent regStats to
make sure that the base Stats::Group::regStats() gets
called

JIRA: https://gem5.atlassian.net/projects/GEM5/issues/GEM5-319

Change-Id: I931941d8ec5f375f7e51e719d43ae31af095f661
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26643
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-16 08:50:24 +00:00
Giacomo Travaglini
6dcafbfa5d arch-x86: Add Python 3 workarounds for long
Python 3 doesn't have a separate long type. Make long an alias for int
where needed to maintain compatibility.

This is aligning with https://gem5-review.googlesource.com/c/15988

Change-Id: I20e52d7f796d143534fa7dabeb6ff0ae8b62fd2b
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26257
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2020-03-13 14:24:07 +00:00
Giacomo Travaglini
663495f3b1 arch-x86: Fix imports for Python 3 compatibility
Change-Id: I7e486a6f3d38af54ac1eff431ca40a5af29e3ca7
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26256
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
2020-03-13 14:24:07 +00:00
Giacomo Travaglini
6eff39b962 tests: Use relative path for python3 compliance
Change-Id: I9a45a7800f1b69037781374df86e29bd5eb0f014
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26255
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
2020-03-13 14:24:07 +00:00
Giacomo Travaglini
47cb25b30e arch: list.sort() sorting by key only in python3
list.sort() no longer accept a comparison function. Use the key argument
instead for key based sorting.

Change-Id: I2af2732628721faee3870af0d53c1267839896da
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26254
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
2020-03-13 14:24:07 +00:00
Giacomo Travaglini
5a48087df9 dev-arm: Fix VExpressFastmodel.py indentation
Convert TAB with four spaces

Change-Id: I7472a01423953c68aed60b37f56fe86eca249fac
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26253
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
2020-03-13 14:24:07 +00:00
Giacomo Travaglini
30303805a8 arch: Convert exec keyword to exec() function
The function syntax was also accepted in 2.x

Change-Id: I3d9bef3ddcd5e98ff589796d21dbfeb9796bff1d
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26252
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
2020-03-13 14:24:07 +00:00
Giacomo Travaglini
39df0e4f32 arch: Bring closure out of p_global_let
The python interpreter might complain when exec() (the function, not the
python2 keyword) is used in a function and the function contains a nested
block.

See: https://www.python.org/dev/peps/pep-0227/

The patch is moving the nested function out of p_global_let.

Change-Id: Idb3a08a8cd42455af1e5ec2c3ec8f8a1438047d3
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26303
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
2020-03-13 14:24:07 +00:00
Giacomo Travaglini
1bf2821ae7 misc: Make exception handling python3 compliant
Change-Id: I37d0e97e9762e21c7a0ad315cf7684a19119b5b4
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26251
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
2020-03-13 14:24:07 +00:00
Giacomo Travaglini
e06ec8c423 misc: Text vs Byte string in python3
Python 3 uses the concepts of two different types:
text and binary strings.
Those cannot be implicilty combined (as it was happening in python2) and
in order to be used together one of them must be converted to the other
type:

* Text can be encoded into Bytes via the encode() method
* Bytes can be decoded to Text using the decode() method

By default encode/decode will assume UTF-8 format

JIRA: https://gem5.atlassian.net/browse/GEM5-345

Change-Id: I1bdf7db17b49cc109239fd5f44791769370853f8
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26250
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2020-03-13 14:24:07 +00:00
Giacomo Travaglini
bb95aa14c6 scons: file removed from python3
Change-Id: I95794fec5cc9c6e72c9ae53f586052be71436c87
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26249
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
2020-03-13 14:24:07 +00:00
Giacomo Travaglini
10b4842407 misc: Views and Iterators instead of Lists in python3
* dict methods dict.keys(), dict.items() and dict.values()
return "views" instead of lists

* The dict.iterkeys(), dict.iteritems() and dict.itervalues()
methods are no longer supported.

* map() and filter() return iterators.

* range() now behaves like xrange() used to behave, except it works with
values of arbitrary size. The latter no longer exists.

* zip() now returns an iterator.

Change-Id: Id480018239db88d7f5d60588c93719056de4a0c0
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26248
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-13 14:24:07 +00:00
Yu-hsin Wang
e9fea79dfc dev-arm: Fix setupBootloader for VExpressFastmodel
Previous fix setupBootloader for VExpress_GEM5_V2 didn't include
VExpressFastmodel. Fix it.

Change-Id: Ia720978848660be63bb788ffaf84b60a5b1b5db5
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26684
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-13 14:04:14 +00:00
Giacomo Travaglini
f3740b3bf9 arch-arm: Fix Arch detection in FS if there is not bootloader
In case a workload is run with no bootloader we still want to be able
to provide the simulation with the correct arch version.
Without this patch every baremetal simulation will default to AArch64, which
is the default value of ArmFsWorkload.

Change-Id: I0f766167d8983cafc1fd30d054862339eb21f73f
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26606
Reviewed-by: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-13 10:26:53 +00:00
Yuan Yao
f5e1e1b854 mem-ruby: Fix fast-forward when using the backing store.
While the up-to-date data may reside in any agent of Ruby's memory
hierarchy, there's an optional backing store in Ruby that provides
a 'correct' view of the physical memory. When it is enabled by the
user, every Ruby memory access will update this global memory view
as well upon finishing.

The issue is that Ruby's atomic access, used in fast-forward, does
not currently access the backing store, leading to data
incorrectness. More specifically, at the very beginning stage of the
simulation, a loader loads the program into the backing store using
functional accesses. Then the program starts execution with
fast-forward enabled, using atomic accesses for faster simulation. But
because atomic access only accesses the real memory hierarchy, the CPU
fetches incorrect instructions.

The fix is simple. Just make Ruby's atomic access update the backing
store as well as the real physical memory.

Change-Id: I2541d923e18ea488d383097ca7abd4124e47e59b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26343
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Onur Kayıran <onur.kayiran@amd.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-13 00:30:11 +00:00
Gabe Black
75430bfe6b arm: Eliminate the MustBeOne ARM specific request flag.
This flag makes constructing a generic Request object for ARM
impossible, since generic consumers won't know to set that flag to one.

As a principle, Request flags should change the behavior of a request
away from whatever the default/typical behavior is in the current
context, so flags set to zero means no special behavior.

Change-Id: Id606dc0bf42210218e1745585327671a98a8dba4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26546
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-12 20:35:04 +00:00
Adrian Herrera
5719da9fff dev-arm: add FVP Base Power Controller model
This is a reduced model of the FVP Base platforms Power Controller.
As of now it allows the following functions from software:
- Checking for core presence
- Reporting the power state of a core / cluster
- Explicitly powering off a core on WFI
- Explicitly powering off cores in a CPU cluster on WFI
- Explicitly powering on a core through writes to PPONR register

Change-Id: Ia1d4d3ae8e4bfb2d23b2c6077396a4d8500e2e30
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26463
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-12 14:28:22 +00:00
Adrian Herrera
8cfa988335 arch-arm: Rewrite getMPIDR
This patch is rewriting getMPIDR to have a more canonical form:

* Using threadId() instead of contextId()

It is also splitting the helper so that a client can get an affinity
number given a specific thread context.

Change-Id: I727e4b96ada345fd548cd3ff9423bf27347812c4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26304
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
2020-03-12 14:28:22 +00:00
Gabe Black
25f139555d kern: Minor style cleanup in the base SkipFuncEvent class.
Change-Id: I0f4efb825b0611d3bab5a429fd36d28a178f86b9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24110
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Gabe Black <gabeblack@google.com>
2020-03-12 11:14:09 +00:00
Gabe Black
f71345128b arm: Implement the AAPCS32 ABI.
Change-Id: I63b2ec586146163642392f5164fb01335d811471
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24108
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Gabe Black <gabeblack@google.com>
2020-03-12 11:14:09 +00:00