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tests: Removed old scon-based 40.m5threads-test-atomic tests

Browse Source 
These have been migrated to be run via testlib.

Change-Id: I186e4048096f718c0de378033924cd23328168d7
Jira: https://gem5.atlassian.net/browse/GEM5-109
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25843
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Bobby R. Bruce
2020-02-25 17:38:15 -08:00
parent cc32247ebc
commit 9e4209cd3e
18 changed files with 0 additions and 10608 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2629
tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/config.ini
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File diff suppressed because it is too large Load Diff

8
tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/simerr
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@@ -1,8 +0,0 @@
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes)
warn: Sockets disabled, not accepting gdb connections
warn: ClockedObject: More than one power state change request encountered within the same simulation tick
warn: ClockedObject: More than one power state change request encountered within the same simulation tick
warn: ClockedObject: More than one power state change request encountered within the same simulation tick
warn: ClockedObject: More than one power state change request encountered within the same simulation tick
info: Entering event queue @ 0. Starting simulation...
warn: ClockedObject: Already in the requested power state, request ignored

84
tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/simout
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@@ -1,84 +0,0 @@
Redirecting stdout to build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/o3-timing-mp/simout
Redirecting stderr to build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/o3-timing-mp/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Mar 29 2017 21:12:17
gem5 started Mar 29 2017 21:12:27
gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 42630
command line: /usr/local/google/home/gabeblack/gem5/gem5-public/build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/o3-timing-mp --stats-file 'text://stats.txt?desc=False' -re /usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../run.py quick/se/40.m5threads-test-atomic/sparc/linux/o3-timing-mp
Global frequency set at 1000000000000 ticks per second
Init done
[Iteration 1, Thread 1] Got lock
[Iteration 1, Thread 1] Critical section done, previously next=0, now next=1
[Iteration 1, Thread 3] Got lock
[Iteration 1, Thread 3] Critical section done, previously next=1, now next=3
[Iteration 1, Thread 2] Got lock
[Iteration 1, Thread 2] Critical section done, previously next=3, now next=2
Iteration 1 completed
[Iteration 2, Thread 3] Got lock
[Iteration 2, Thread 3] Critical section done, previously next=0, now next=3
[Iteration 2, Thread 2] Got lock
[Iteration 2, Thread 2] Critical section done, previously next=3, now next=2
[Iteration 2, Thread 1] Got lock
[Iteration 2, Thread 1] Critical section done, previously next=2, now next=1
Iteration 2 completed
[Iteration 3, Thread 2] Got lock
[Iteration 3, Thread 2] Critical section done, previously next=0, now next=2
[Iteration 3, Thread 3] Got lock
[Iteration 3, Thread 3] Critical section done, previously next=2, now next=3
[Iteration 3, Thread 1] Got lock
[Iteration 3, Thread 1] Critical section done, previously next=3, now next=1
Iteration 3 completed
[Iteration 4, Thread 1] Got lock
[Iteration 4, Thread 1] Critical section done, previously next=0, now next=1
[Iteration 4, Thread 3] Got lock
[Iteration 4, Thread 3] Critical section done, previously next=1, now next=3
[Iteration 4, Thread 2] Got lock
[Iteration 4, Thread 2] Critical section done, previously next=3, now next=2
Iteration 4 completed
[Iteration 5, Thread 1] Got lock
[Iteration 5, Thread 1] Critical section done, previously next=0, now next=1
[Iteration 5, Thread 2] Got lock
[Iteration 5, Thread 2] Critical section done, previously next=1, now next=2
[Iteration 5, Thread 3] Got lock
[Iteration 5, Thread 3] Critical section done, previously next=2, now next=3
Iteration 5 completed
[Iteration 6, Thread 3] Got lock
[Iteration 6, Thread 3] Critical section done, previously next=0, now next=3
[Iteration 6, Thread 2] Got lock
[Iteration 6, Thread 2] Critical section done, previously next=3, now next=2
[Iteration 6, Thread 1] Got lock
[Iteration 6, Thread 1] Critical section done, previously next=2, now next=1
Iteration 6 completed
[Iteration 7, Thread 3] Got lock
[Iteration 7, Thread 3] Critical section done, previously next=0, now next=3
[Iteration 7, Thread 2] Got lock
[Iteration 7, Thread 2] Critical section done, previously next=3, now next=2
[Iteration 7, Thread 1] Got lock
[Iteration 7, Thread 1] Critical section done, previously next=2, now next=1
Iteration 7 completed
[Iteration 8, Thread 3] Got lock
[Iteration 8, Thread 3] Critical section done, previously next=0, now next=3
[Iteration 8, Thread 2] Got lock
[Iteration 8, Thread 2] Critical section done, previously next=3, now next=2
[Iteration 8, Thread 1] Got lock
[Iteration 8, Thread 1] Critical section done, previously next=2, now next=1
Iteration 8 completed
[Iteration 9, Thread 1] Got lock
[Iteration 9, Thread 1] Critical section done, previously next=0, now next=1
[Iteration 9, Thread 2] Got lock
[Iteration 9, Thread 2] Critical section done, previously next=1, now next=2
[Iteration 9, Thread 3] Got lock
[Iteration 9, Thread 3] Critical section done, previously next=2, now next=3
Iteration 9 completed
[Iteration 10, Thread 3] Got lock
[Iteration 10, Thread 3] Critical section done, previously next=0, now next=3
[Iteration 10, Thread 2] Got lock
[Iteration 10, Thread 2] Critical section done, previously next=3, now next=2
[Iteration 10, Thread 1] Got lock
[Iteration 10, Thread 1] Critical section done, previously next=2, now next=1
Iteration 10 completed
PASSED :-)
Exiting @ tick 126524000 because exiting with last active thread context

2951
tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/stats.txt
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File diff suppressed because it is too large Load Diff

869
tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/config.ini
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@@ -1,869 +0,0 @@
[root]
type=Root
children=system
eventq_index=0
full_system=false
sim_quantum=0
time_sync_enable=false
time_sync_period=100000000000
time_sync_spin_threshold=100000000
[system]
type=System
children=clk_domain cpu0 cpu1 cpu2 cpu3 cpu_clk_domain dvfs_handler l2c membus physmem toL2Bus voltage_domain
boot_osflags=a
cache_line_size=64
clk_domain=system.clk_domain
default_p_state=UNDEFINED
eventq_index=0
exit_on_work_items=false
init_param=0
kernel=
kernel_addr_check=true
load_addr_mask=1099511627775
load_offset=0
mem_mode=atomic
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
multi_thread=false
num_work_ids=16
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
readfile=
symbolfile=
thermal_components=
thermal_model=Null
work_begin_ckpt_count=0
work_begin_cpu_id_exit=-1
work_begin_exit_count=0
work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.membus.slave[0]
[system.clk_domain]
type=SrcClockDomain
clock=1000
domain_id=-1
eventq_index=0
init_perf_level=0
voltage_domain=system.voltage_domain
[system.cpu0]
type=AtomicSimpleCPU
children=dcache dtb icache interrupts isa itb tracer workload
branchPred=Null
checker=Null
clk_domain=system.cpu_clk_domain
cpu_id=0
default_p_state=UNDEFINED
do_checkpoint_insts=true
do_quiesce=true
do_statistics_insts=true
dtb=system.cpu0.dtb
eventq_index=0
fastmem=false
function_trace=false
function_trace_start=0
interrupts=system.cpu0.interrupts
isa=system.cpu0.isa
itb=system.cpu0.itb
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
max_loads_any_thread=0
numThreads=1
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
profile=0
progress_interval=0
simpoint_start_insts=
simulate_data_stalls=false
simulate_inst_stalls=false
socket_id=0
switched_out=false
syscallRetryLatency=10000
system=system
tracer=system.cpu0.tracer
width=1
workload=system.cpu0.workload
dcache_port=system.cpu0.dcache.cpu_side
icache_port=system.cpu0.icache.cpu_side
[system.cpu0.dcache]
type=Cache
children=tags
addr_ranges=0:18446744073709551615:0:0:0:0
assoc=4
clk_domain=system.cpu_clk_domain
clusivity=mostly_incl
data_latency=2
default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
is_read_only=false
max_miss_count=0
mshrs=4
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
prefetch_on_access=false
prefetcher=Null
response_latency=2
sequential_access=false
size=32768
system=system
tag_latency=2
tags=system.cpu0.dcache.tags
tgts_per_mshr=20
write_buffers=8
writeback_clean=false
cpu_side=system.cpu0.dcache_port
mem_side=system.toL2Bus.slave[1]
[system.cpu0.dcache.tags]
type=LRU
assoc=4
block_size=64
clk_domain=system.cpu_clk_domain
data_latency=2
default_p_state=UNDEFINED
eventq_index=0
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
sequential_access=false
size=32768
tag_latency=2
[system.cpu0.dtb]
type=SparcTLB
eventq_index=0
size=64
[system.cpu0.icache]
type=Cache
children=tags
addr_ranges=0:18446744073709551615:0:0:0:0
assoc=1
clk_domain=system.cpu_clk_domain
clusivity=mostly_incl
data_latency=2
default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
is_read_only=true
max_miss_count=0
mshrs=4
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
prefetch_on_access=false
prefetcher=Null
response_latency=2
sequential_access=false
size=32768
system=system
tag_latency=2
tags=system.cpu0.icache.tags
tgts_per_mshr=20
write_buffers=8
writeback_clean=true
cpu_side=system.cpu0.icache_port
mem_side=system.toL2Bus.slave[0]
[system.cpu0.icache.tags]
type=LRU
assoc=1
block_size=64
clk_domain=system.cpu_clk_domain
data_latency=2
default_p_state=UNDEFINED
eventq_index=0
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
sequential_access=false
size=32768
tag_latency=2
[system.cpu0.interrupts]
type=SparcInterrupts
eventq_index=0
[system.cpu0.isa]
type=SparcISA
eventq_index=0
[system.cpu0.itb]
type=SparcTLB
eventq_index=0
size=64
[system.cpu0.tracer]
type=ExeTracer
eventq_index=0
[system.cpu0.workload]
type=Process
cmd=test_atomic 4
cwd=
drivers=
egid=100
env=
errout=cerr
euid=100
eventq_index=0
executable=/usr/local/google/home/gabeblack/gem5/dist/m5/regression/test-progs/m5threads/bin/sparc/linux/test_atomic
gid=100
input=cin
kvmInSE=false
maxStackSize=67108864
output=cout
pgid=100
pid=100
ppid=0
simpoint=0
system=system
uid=100
useArchPT=false
[system.cpu1]
type=AtomicSimpleCPU
children=dcache dtb icache interrupts isa itb tracer
branchPred=Null
checker=Null
clk_domain=system.cpu_clk_domain
cpu_id=1
default_p_state=UNDEFINED
do_checkpoint_insts=true
do_quiesce=true
do_statistics_insts=true
dtb=system.cpu1.dtb
eventq_index=0
fastmem=false
function_trace=false
function_trace_start=0
interrupts=system.cpu1.interrupts
isa=system.cpu1.isa
itb=system.cpu1.itb
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
max_loads_any_thread=0
numThreads=1
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
profile=0
progress_interval=0
simpoint_start_insts=
simulate_data_stalls=false
simulate_inst_stalls=false
socket_id=0
switched_out=false
syscallRetryLatency=10000
system=system
tracer=system.cpu1.tracer
width=1
workload=system.cpu0.workload
dcache_port=system.cpu1.dcache.cpu_side
icache_port=system.cpu1.icache.cpu_side
[system.cpu1.dcache]
type=Cache
children=tags
addr_ranges=0:18446744073709551615:0:0:0:0
assoc=4
clk_domain=system.cpu_clk_domain
clusivity=mostly_incl
data_latency=2
default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
is_read_only=false
max_miss_count=0
mshrs=4
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
prefetch_on_access=false
prefetcher=Null
response_latency=2
sequential_access=false
size=32768
system=system
tag_latency=2
tags=system.cpu1.dcache.tags
tgts_per_mshr=20
write_buffers=8
writeback_clean=false
cpu_side=system.cpu1.dcache_port
mem_side=system.toL2Bus.slave[3]
[system.cpu1.dcache.tags]
type=LRU
assoc=4
block_size=64
clk_domain=system.cpu_clk_domain
data_latency=2
default_p_state=UNDEFINED
eventq_index=0
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
sequential_access=false
size=32768
tag_latency=2
[system.cpu1.dtb]
type=SparcTLB
eventq_index=0
size=64
[system.cpu1.icache]
type=Cache
children=tags
addr_ranges=0:18446744073709551615:0:0:0:0
assoc=1
clk_domain=system.cpu_clk_domain
clusivity=mostly_incl
data_latency=2
default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
is_read_only=true
max_miss_count=0
mshrs=4
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
prefetch_on_access=false
prefetcher=Null
response_latency=2
sequential_access=false
size=32768
system=system
tag_latency=2
tags=system.cpu1.icache.tags
tgts_per_mshr=20
write_buffers=8
writeback_clean=true
cpu_side=system.cpu1.icache_port
mem_side=system.toL2Bus.slave[2]
[system.cpu1.icache.tags]
type=LRU
assoc=1
block_size=64
clk_domain=system.cpu_clk_domain
data_latency=2
default_p_state=UNDEFINED
eventq_index=0
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
sequential_access=false
size=32768
tag_latency=2
[system.cpu1.interrupts]
type=SparcInterrupts
eventq_index=0
[system.cpu1.isa]
type=SparcISA
eventq_index=0
[system.cpu1.itb]
type=SparcTLB
eventq_index=0
size=64
[system.cpu1.tracer]
type=ExeTracer
eventq_index=0
[system.cpu2]
type=AtomicSimpleCPU
children=dcache dtb icache interrupts isa itb tracer
branchPred=Null
checker=Null
clk_domain=system.cpu_clk_domain
cpu_id=2
default_p_state=UNDEFINED
do_checkpoint_insts=true
do_quiesce=true
do_statistics_insts=true
dtb=system.cpu2.dtb
eventq_index=0
fastmem=false
function_trace=false
function_trace_start=0
interrupts=system.cpu2.interrupts
isa=system.cpu2.isa
itb=system.cpu2.itb
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
max_loads_any_thread=0
numThreads=1
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
profile=0
progress_interval=0
simpoint_start_insts=
simulate_data_stalls=false
simulate_inst_stalls=false
socket_id=0
switched_out=false
syscallRetryLatency=10000
system=system
tracer=system.cpu2.tracer
width=1
workload=system.cpu0.workload
dcache_port=system.cpu2.dcache.cpu_side
icache_port=system.cpu2.icache.cpu_side
[system.cpu2.dcache]
type=Cache
children=tags
addr_ranges=0:18446744073709551615:0:0:0:0
assoc=4
clk_domain=system.cpu_clk_domain
clusivity=mostly_incl
data_latency=2
default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
is_read_only=false
max_miss_count=0
mshrs=4
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
prefetch_on_access=false
prefetcher=Null
response_latency=2
sequential_access=false
size=32768
system=system
tag_latency=2
tags=system.cpu2.dcache.tags
tgts_per_mshr=20
write_buffers=8
writeback_clean=false
cpu_side=system.cpu2.dcache_port
mem_side=system.toL2Bus.slave[5]
[system.cpu2.dcache.tags]
type=LRU
assoc=4
block_size=64
clk_domain=system.cpu_clk_domain
data_latency=2
default_p_state=UNDEFINED
eventq_index=0
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
sequential_access=false
size=32768
tag_latency=2
[system.cpu2.dtb]
type=SparcTLB
eventq_index=0
size=64
[system.cpu2.icache]
type=Cache
children=tags
addr_ranges=0:18446744073709551615:0:0:0:0
assoc=1
clk_domain=system.cpu_clk_domain
clusivity=mostly_incl
data_latency=2
default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
is_read_only=true
max_miss_count=0
mshrs=4
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
prefetch_on_access=false
prefetcher=Null
response_latency=2
sequential_access=false
size=32768
system=system
tag_latency=2
tags=system.cpu2.icache.tags
tgts_per_mshr=20
write_buffers=8
writeback_clean=true
cpu_side=system.cpu2.icache_port
mem_side=system.toL2Bus.slave[4]
[system.cpu2.icache.tags]
type=LRU
assoc=1
block_size=64
clk_domain=system.cpu_clk_domain
data_latency=2
default_p_state=UNDEFINED
eventq_index=0
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
sequential_access=false
size=32768
tag_latency=2
[system.cpu2.interrupts]
type=SparcInterrupts
eventq_index=0
[system.cpu2.isa]
type=SparcISA
eventq_index=0
[system.cpu2.itb]
type=SparcTLB
eventq_index=0
size=64
[system.cpu2.tracer]
type=ExeTracer
eventq_index=0
[system.cpu3]
type=AtomicSimpleCPU
children=dcache dtb icache interrupts isa itb tracer
branchPred=Null
checker=Null
clk_domain=system.cpu_clk_domain
cpu_id=3
default_p_state=UNDEFINED
do_checkpoint_insts=true
do_quiesce=true
do_statistics_insts=true
dtb=system.cpu3.dtb
eventq_index=0
fastmem=false
function_trace=false
function_trace_start=0
interrupts=system.cpu3.interrupts
isa=system.cpu3.isa
itb=system.cpu3.itb
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
max_loads_any_thread=0
numThreads=1
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
profile=0
progress_interval=0
simpoint_start_insts=
simulate_data_stalls=false
simulate_inst_stalls=false
socket_id=0
switched_out=false
syscallRetryLatency=10000
system=system
tracer=system.cpu3.tracer
width=1
workload=system.cpu0.workload
dcache_port=system.cpu3.dcache.cpu_side
icache_port=system.cpu3.icache.cpu_side
[system.cpu3.dcache]
type=Cache
children=tags
addr_ranges=0:18446744073709551615:0:0:0:0
assoc=4
clk_domain=system.cpu_clk_domain
clusivity=mostly_incl
data_latency=2
default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
is_read_only=false
max_miss_count=0
mshrs=4
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
prefetch_on_access=false
prefetcher=Null
response_latency=2
sequential_access=false
size=32768
system=system
tag_latency=2
tags=system.cpu3.dcache.tags
tgts_per_mshr=20
write_buffers=8
writeback_clean=false
cpu_side=system.cpu3.dcache_port
mem_side=system.toL2Bus.slave[7]
[system.cpu3.dcache.tags]
type=LRU
assoc=4
block_size=64
clk_domain=system.cpu_clk_domain
data_latency=2
default_p_state=UNDEFINED
eventq_index=0
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
sequential_access=false
size=32768
tag_latency=2
[system.cpu3.dtb]
type=SparcTLB
eventq_index=0
size=64
[system.cpu3.icache]
type=Cache
children=tags
addr_ranges=0:18446744073709551615:0:0:0:0
assoc=1
clk_domain=system.cpu_clk_domain
clusivity=mostly_incl
data_latency=2
default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
is_read_only=true
max_miss_count=0
mshrs=4
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
prefetch_on_access=false
prefetcher=Null
response_latency=2
sequential_access=false
size=32768
system=system
tag_latency=2
tags=system.cpu3.icache.tags
tgts_per_mshr=20
write_buffers=8
writeback_clean=true
cpu_side=system.cpu3.icache_port
mem_side=system.toL2Bus.slave[6]
[system.cpu3.icache.tags]
type=LRU
assoc=1
block_size=64
clk_domain=system.cpu_clk_domain
data_latency=2
default_p_state=UNDEFINED
eventq_index=0
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
sequential_access=false
size=32768
tag_latency=2
[system.cpu3.interrupts]
type=SparcInterrupts
eventq_index=0
[system.cpu3.isa]
type=SparcISA
eventq_index=0
[system.cpu3.itb]
type=SparcTLB
eventq_index=0
size=64
[system.cpu3.tracer]
type=ExeTracer
eventq_index=0
[system.cpu_clk_domain]
type=SrcClockDomain
clock=500
domain_id=-1
eventq_index=0
init_perf_level=0
voltage_domain=system.voltage_domain
[system.dvfs_handler]
type=DVFSHandler
domains=
enable=false
eventq_index=0
sys_clk_domain=system.clk_domain
transition_latency=100000000
[system.l2c]
type=Cache
children=tags
addr_ranges=0:18446744073709551615:0:0:0:0
assoc=8
clk_domain=system.cpu_clk_domain
clusivity=mostly_incl
data_latency=20
default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
is_read_only=false
max_miss_count=0
mshrs=20
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
prefetch_on_access=false
prefetcher=Null
response_latency=20
sequential_access=false
size=4194304
system=system
tag_latency=20
tags=system.l2c.tags
tgts_per_mshr=12
write_buffers=8
writeback_clean=false
cpu_side=system.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.l2c.tags]
type=LRU
assoc=8
block_size=64
clk_domain=system.cpu_clk_domain
data_latency=20
default_p_state=UNDEFINED
eventq_index=0
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
sequential_access=false
size=4194304
tag_latency=20
[system.membus]
type=CoherentXBar
children=snoop_filter
clk_domain=system.clk_domain
default_p_state=UNDEFINED
eventq_index=0
forward_latency=4
frontend_latency=3
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
point_of_coherency=true
power_model=Null
response_latency=2
snoop_filter=system.membus.snoop_filter
snoop_response_latency=4
system=system
use_default_range=false
width=16
master=system.physmem.port
slave=system.system_port system.l2c.mem_side
[system.membus.snoop_filter]
type=SnoopFilter
eventq_index=0
lookup_latency=1
max_capacity=8388608
system=system
[system.physmem]
type=SimpleMemory
bandwidth=73.000000
clk_domain=system.clk_domain
conf_table_reported=true
default_p_state=UNDEFINED
eventq_index=0
in_addr_map=true
kvm_map=true
latency=30000
latency_var=0
null=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
range=0:134217727:0:0:0:0
port=system.membus.master[0]
[system.toL2Bus]
type=CoherentXBar
children=snoop_filter
clk_domain=system.cpu_clk_domain
default_p_state=UNDEFINED
eventq_index=0
forward_latency=0
frontend_latency=1
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
point_of_coherency=false
power_model=Null
response_latency=1
snoop_filter=system.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
width=32
master=system.l2c.cpu_side
slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side
[system.toL2Bus.snoop_filter]
type=SnoopFilter
eventq_index=0
lookup_latency=0
max_capacity=8388608
system=system
[system.voltage_domain]
type=VoltageDomain
eventq_index=0
voltage=1.000000

7
tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/simerr
View File

@@ -1,7 +0,0 @@
warn: Sockets disabled, not accepting gdb connections
warn: ClockedObject: More than one power state change request encountered within the same simulation tick
warn: ClockedObject: More than one power state change request encountered within the same simulation tick
warn: ClockedObject: More than one power state change request encountered within the same simulation tick
warn: ClockedObject: More than one power state change request encountered within the same simulation tick
info: Entering event queue @ 0. Starting simulation...
warn: ClockedObject: Already in the requested power state, request ignored

84
tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/simout
View File

@@ -1,84 +0,0 @@
Redirecting stdout to build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-atomic-mp/simout
Redirecting stderr to build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-atomic-mp/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Mar 29 2017 17:08:10
gem5 started Mar 29 2017 17:08:19
gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 126091
command line: /usr/local/google/home/gabeblack/gem5/gem5-public/build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-atomic-mp --stats-file 'text://stats.txt?desc=False' -re /usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../run.py quick/se/40.m5threads-test-atomic/sparc/linux/simple-atomic-mp
Global frequency set at 1000000000000 ticks per second
Init done
[Iteration 1, Thread 1] Got lock
[Iteration 1, Thread 1] Critical section done, previously next=0, now next=1
[Iteration 1, Thread 2] Got lock
[Iteration 1, Thread 2] Critical section done, previously next=1, now next=2
[Iteration 1, Thread 3] Got lock
[Iteration 1, Thread 3] Critical section done, previously next=2, now next=3
Iteration 1 completed
[Iteration 2, Thread 3] Got lock
[Iteration 2, Thread 3] Critical section done, previously next=0, now next=3
[Iteration 2, Thread 2] Got lock
[Iteration 2, Thread 2] Critical section done, previously next=3, now next=2
[Iteration 2, Thread 1] Got lock
[Iteration 2, Thread 1] Critical section done, previously next=2, now next=1
Iteration 2 completed
[Iteration 3, Thread 3] Got lock
[Iteration 3, Thread 3] Critical section done, previously next=0, now next=3
[Iteration 3, Thread 2] Got lock
[Iteration 3, Thread 2] Critical section done, previously next=3, now next=2
[Iteration 3, Thread 1] Got lock
[Iteration 3, Thread 1] Critical section done, previously next=2, now next=1
Iteration 3 completed
[Iteration 4, Thread 2] Got lock
[Iteration 4, Thread 2] Critical section done, previously next=0, now next=2
[Iteration 4, Thread 3] Got lock
[Iteration 4, Thread 3] Critical section done, previously next=2, now next=3
[Iteration 4, Thread 1] Got lock
[Iteration 4, Thread 1] Critical section done, previously next=3, now next=1
Iteration 4 completed
[Iteration 5, Thread 3] Got lock
[Iteration 5, Thread 3] Critical section done, previously next=0, now next=3
[Iteration 5, Thread 1] Got lock
[Iteration 5, Thread 1] Critical section done, previously next=3, now next=1
[Iteration 5, Thread 2] Got lock
[Iteration 5, Thread 2] Critical section done, previously next=1, now next=2
Iteration 5 completed
[Iteration 6, Thread 2] Got lock
[Iteration 6, Thread 2] Critical section done, previously next=0, now next=2
[Iteration 6, Thread 3] Got lock
[Iteration 6, Thread 3] Critical section done, previously next=2, now next=3
[Iteration 6, Thread 1] Got lock
[Iteration 6, Thread 1] Critical section done, previously next=3, now next=1
Iteration 6 completed
[Iteration 7, Thread 2] Got lock
[Iteration 7, Thread 2] Critical section done, previously next=0, now next=2
[Iteration 7, Thread 3] Got lock
[Iteration 7, Thread 3] Critical section done, previously next=2, now next=3
[Iteration 7, Thread 1] Got lock
[Iteration 7, Thread 1] Critical section done, previously next=3, now next=1
Iteration 7 completed
[Iteration 8, Thread 2] Got lock
[Iteration 8, Thread 2] Critical section done, previously next=0, now next=2
[Iteration 8, Thread 1] Got lock
[Iteration 8, Thread 1] Critical section done, previously next=2, now next=1
[Iteration 8, Thread 3] Got lock
[Iteration 8, Thread 3] Critical section done, previously next=1, now next=3
Iteration 8 completed
[Iteration 9, Thread 2] Got lock
[Iteration 9, Thread 2] Critical section done, previously next=0, now next=2
[Iteration 9, Thread 3] Got lock
[Iteration 9, Thread 3] Critical section done, previously next=2, now next=3
[Iteration 9, Thread 1] Got lock
[Iteration 9, Thread 1] Critical section done, previously next=3, now next=1
Iteration 9 completed
[Iteration 10, Thread 3] Got lock
[Iteration 10, Thread 3] Critical section done, previously next=0, now next=3
[Iteration 10, Thread 1] Got lock
[Iteration 10, Thread 1] Critical section done, previously next=3, now next=1
[Iteration 10, Thread 2] Got lock
[Iteration 10, Thread 2] Critical section done, previously next=1, now next=2
Iteration 10 completed
PASSED :-)
Exiting @ tick 87707000 because exiting with last active thread context

1031
tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/stats.txt
View File

File diff suppressed because it is too large Load Diff

206
tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/config.ini
View File

@@ -1,206 +0,0 @@
[root]
type=Root
children=system
dummy=0
[system]
type=System
children=cpu0 cpu1 cpu2 cpu3 membus physmem
mem_mode=timing
physmem=system.physmem
[system.cpu0]
type=TimingSimpleCPU
children=dtb itb tracer workload
checker=Null
clock=500
cpu_id=0
defer_registration=false
do_checkpoint_insts=true
do_statistics_insts=true
dtb=system.cpu0.dtb
function_trace=false
function_trace_start=0
itb=system.cpu0.itb
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
max_loads_any_thread=0
numThreads=1
phase=0
progress_interval=0
system=system
tracer=system.cpu0.tracer
workload=system.cpu0.workload
dcache_port=system.membus.port[1]
icache_port=system.membus.port[0]
[system.cpu0.dtb]
type=SparcTLB
size=64
[system.cpu0.itb]
type=SparcTLB
size=64
[system.cpu0.tracer]
type=ExeTracer
[system.cpu0.workload]
type=LiveProcess
cmd=test_atomic 4
cwd=
egid=100
env=
errout=cerr
euid=100
executable=/dist/m5/regression/test-progs/m5threads/bin/sparc/linux/test_atomic
gid=100
input=cin
max_stack_size=67108864
output=cout
pid=100
ppid=99
simpoint=0
system=system
uid=100
[system.cpu1]
type=TimingSimpleCPU
children=dtb itb tracer
checker=Null
clock=500
cpu_id=1
defer_registration=false
do_checkpoint_insts=true
do_statistics_insts=true
dtb=system.cpu1.dtb
function_trace=false
function_trace_start=0
itb=system.cpu1.itb
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
max_loads_any_thread=0
numThreads=1
phase=0
progress_interval=0
system=system
tracer=system.cpu1.tracer
workload=system.cpu0.workload
dcache_port=system.membus.port[3]
icache_port=system.membus.port[2]
[system.cpu1.dtb]
type=SparcTLB
size=64
[system.cpu1.itb]
type=SparcTLB
size=64
[system.cpu1.tracer]
type=ExeTracer
[system.cpu2]
type=TimingSimpleCPU
children=dtb itb tracer
checker=Null
clock=500
cpu_id=2
defer_registration=false
do_checkpoint_insts=true
do_statistics_insts=true
dtb=system.cpu2.dtb
function_trace=false
function_trace_start=0
itb=system.cpu2.itb
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
max_loads_any_thread=0
numThreads=1
phase=0
progress_interval=0
system=system
tracer=system.cpu2.tracer
workload=system.cpu0.workload
dcache_port=system.membus.port[5]
icache_port=system.membus.port[4]
[system.cpu2.dtb]
type=SparcTLB
size=64
[system.cpu2.itb]
type=SparcTLB
size=64
[system.cpu2.tracer]
type=ExeTracer
[system.cpu3]
type=TimingSimpleCPU
children=dtb itb tracer
checker=Null
clock=500
cpu_id=3
defer_registration=false
do_checkpoint_insts=true
do_statistics_insts=true
dtb=system.cpu3.dtb
function_trace=false
function_trace_start=0
itb=system.cpu3.itb
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
max_loads_any_thread=0
numThreads=1
phase=0
progress_interval=0
system=system
tracer=system.cpu3.tracer
workload=system.cpu0.workload
dcache_port=system.membus.port[7]
icache_port=system.membus.port[6]
[system.cpu3.dtb]
type=SparcTLB
size=64
[system.cpu3.itb]
type=SparcTLB
size=64
[system.cpu3.tracer]
type=ExeTracer
[system.membus]
type=Bus
block_size=64
bus_id=0
clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.cpu0.icache_port system.cpu0.dcache_port system.cpu1.icache_port system.cpu1.dcache_port system.cpu2.icache_port system.cpu2.dcache_port system.cpu3.icache_port system.cpu3.dcache_port system.physmem.port[0]
[system.physmem]
type=RubyMemory
clock=1
config_file=
config_options=
debug=false
debug_file=
file=
latency=30000
latency_var=0
null=false
num_cpus=4
phase=0
range=0:134217727
stats_file=ruby.stats
zero=false
port=system.membus.port[8]

3
tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/simerr
View File

@@ -1,3 +0,0 @@
warn: Sockets disabled, not accepting gdb connections
For more information see: http://www.m5sim.org/warn/d946bea6
hack: be nice to actually delete the event here

94
tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/simout
View File

@@ -1,94 +0,0 @@
M5 Simulator System
Copyright (c) 2001-2008
The Regents of The University of Michigan
All Rights Reserved
M5 compiled May 5 2009 07:34:00
M5 revision 8bea207e2193 6172 default qtip tip ruby_tests_refs.diff
M5 started May 5 2009 07:34:02
M5 executing on piton
command line: /n/piton/z/nate/build/xgem5/build/SPARC_SE/m5.fast -d /n/piton/z/nate/build/xgem5/build/SPARC_SE/tests/fast/quick/40.m5threads-test-atomic/sparc/linux/simple-timing-mp-ruby -re tests/run.py /n/piton/z/nate/build/xgem5/build/SPARC_SE/tests/fast/quick/40.m5threads-test-atomic/sparc/linux/simple-timing-mp-ruby
Global frequency set at 1000000000000 ticks per second
Ruby Timing Mode
Creating event queue...
Creating event queue done
Creating system...
Processors: 4
Creating system done
Ruby initialization complete
info: Entering event queue @ 0. Starting simulation...
Init done
[Iteration 1, Thread 1] Got lock
[Iteration 1, Thread 1] Critical section done, previously next=0, now next=1
[Iteration 1, Thread 3] Got lock
[Iteration 1, Thread 3] Critical section done, previously next=1, now next=3
[Iteration 1, Thread 2] Got lock
[Iteration 1, Thread 2] Critical section done, previously next=3, now next=2
Iteration 1 completed
[Iteration 2, Thread 3] Got lock
[Iteration 2, Thread 3] Critical section done, previously next=0, now next=3
[Iteration 2, Thread 1] Got lock
[Iteration 2, Thread 1] Critical section done, previously next=3, now next=1
[Iteration 2, Thread 2] Got lock
[Iteration 2, Thread 2] Critical section done, previously next=1, now next=2
Iteration 2 completed
[Iteration 3, Thread 2] Got lock
[Iteration 3, Thread 2] Critical section done, previously next=0, now next=2
[Iteration 3, Thread 3] Got lock
[Iteration 3, Thread 3] Critical section done, previously next=2, now next=3
[Iteration 3, Thread 1] Got lock
[Iteration 3, Thread 1] Critical section done, previously next=3, now next=1
Iteration 3 completed
[Iteration 4, Thread 2] Got lock
[Iteration 4, Thread 2] Critical section done, previously next=0, now next=2
[Iteration 4, Thread 1] Got lock
[Iteration 4, Thread 1] Critical section done, previously next=2, now next=1
[Iteration 4, Thread 3] Got lock
[Iteration 4, Thread 3] Critical section done, previously next=1, now next=3
Iteration 4 completed
[Iteration 5, Thread 3] Got lock
[Iteration 5, Thread 3] Critical section done, previously next=0, now next=3
[Iteration 5, Thread 2] Got lock
[Iteration 5, Thread 2] Critical section done, previously next=3, now next=2
[Iteration 5, Thread 1] Got lock
[Iteration 5, Thread 1] Critical section done, previously next=2, now next=1
Iteration 5 completed
[Iteration 6, Thread 1] Got lock
[Iteration 6, Thread 1] Critical section done, previously next=0, now next=1
[Iteration 6, Thread 3] Got lock
[Iteration 6, Thread 3] Critical section done, previously next=1, now next=3
[Iteration 6, Thread 2] Got lock
[Iteration 6, Thread 2] Critical section done, previously next=3, now next=2
Iteration 6 completed
[Iteration 7, Thread 3] Got lock
[Iteration 7, Thread 3] Critical section done, previously next=0, now next=3
[Iteration 7, Thread 2] Got lock
[Iteration 7, Thread 2] Critical section done, previously next=3, now next=2
[Iteration 7, Thread 1] Got lock
[Iteration 7, Thread 1] Critical section done, previously next=2, now next=1
Iteration 7 completed
[Iteration 8, Thread 3] Got lock
[Iteration 8, Thread 3] Critical section done, previously next=0, now next=3
[Iteration 8, Thread 1] Got lock
[Iteration 8, Thread 1] Critical section done, previously next=3, now next=1
[Iteration 8, Thread 2] Got lock
[Iteration 8, Thread 2] Critical section done, previously next=1, now next=2
Iteration 8 completed
[Iteration 9, Thread 1] Got lock
[Iteration 9, Thread 1] Critical section done, previously next=0, now next=1
[Iteration 9, Thread 2] Got lock
[Iteration 9, Thread 2] Critical section done, previously next=1, now next=2
[Iteration 9, Thread 3] Got lock
[Iteration 9, Thread 3] Critical section done, previously next=2, now next=3
Iteration 9 completed
[Iteration 10, Thread 1] Got lock
[Iteration 10, Thread 1] Critical section done, previously next=0, now next=1
[Iteration 10, Thread 3] Got lock
[Iteration 10, Thread 3] Critical section done, previously next=1, now next=3
[Iteration 10, Thread 2] Got lock
[Iteration 10, Thread 2] Critical section done, previously next=3, now next=2
Iteration 10 completed
PASSED :-)
Exiting @ tick 2480212000 because target called exit()

1
tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/skip
View File

@@ -1 +0,0 @@
Skipping for now due to broken atomics in ruby

33
tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/stats.txt
View File

@@ -1,33 +0,0 @@
---------- Begin Simulation Statistics ----------
host_inst_rate 15492 # Simulator instruction rate (inst/s)
host_mem_usage 258096 # Number of bytes of host memory used
host_seconds 39.33 # Real time elapsed on the host
host_tick_rate 63054672 # Simulator tick rate (ticks/s)
sim_freq 1000000000000 # Frequency of simulated ticks
sim_insts 609352 # Number of instructions simulated
sim_seconds 0.002480 # Number of seconds simulated
sim_ticks 2480212000 # Number of ticks simulated
system.cpu0.idle_fraction 0.011975 # Percentage of idle cycles
system.cpu0.not_idle_fraction 0.988025 # Percentage of non-idle cycles
system.cpu0.numCycles 4944742 # number of cpu cycles simulated
system.cpu0.num_insts 156931 # Number of instructions executed
system.cpu0.num_refs 47256 # Number of memory references
system.cpu0.workload.PROG:numSyscalls 89 # Number of system calls
system.cpu1.idle_fraction 0.012259 # Percentage of idle cycles
system.cpu1.not_idle_fraction 0.987741 # Percentage of non-idle cycles
system.cpu1.numCycles 4944666 # number of cpu cycles simulated
system.cpu1.num_insts 152657 # Number of instructions executed
system.cpu1.num_refs 51452 # Number of memory references
system.cpu2.idle_fraction 0 # Percentage of idle cycles
system.cpu2.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu2.numCycles 4960424 # number of cpu cycles simulated
system.cpu2.num_insts 146173 # Number of instructions executed
system.cpu2.num_refs 67815 # Number of memory references
system.cpu3.idle_fraction 0.011794 # Percentage of idle cycles
system.cpu3.not_idle_fraction 0.988206 # Percentage of non-idle cycles
system.cpu3.numCycles 4944758 # number of cpu cycles simulated
system.cpu3.num_insts 153591 # Number of instructions executed
system.cpu3.num_refs 50671 # Number of memory references
---------- End Simulation Statistics ----------

853
tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/config.ini
View File

@@ -1,853 +0,0 @@
[root]
type=Root
children=system
eventq_index=0
full_system=false
sim_quantum=0
time_sync_enable=false
time_sync_period=100000000000
time_sync_spin_threshold=100000000
[system]
type=System
children=clk_domain cpu0 cpu1 cpu2 cpu3 cpu_clk_domain dvfs_handler l2c membus physmem toL2Bus voltage_domain
boot_osflags=a
cache_line_size=64
clk_domain=system.clk_domain
default_p_state=UNDEFINED
eventq_index=0
exit_on_work_items=false
init_param=0
kernel=
kernel_addr_check=true
load_addr_mask=1099511627775
load_offset=0
mem_mode=timing
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
multi_thread=false
num_work_ids=16
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
readfile=
symbolfile=
thermal_components=
thermal_model=Null
work_begin_ckpt_count=0
work_begin_cpu_id_exit=-1
work_begin_exit_count=0
work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.membus.slave[0]
[system.clk_domain]
type=SrcClockDomain
clock=1000
domain_id=-1
eventq_index=0
init_perf_level=0
voltage_domain=system.voltage_domain
[system.cpu0]
type=TimingSimpleCPU
children=dcache dtb icache interrupts isa itb tracer workload
branchPred=Null
checker=Null
clk_domain=system.cpu_clk_domain
cpu_id=0
default_p_state=UNDEFINED
do_checkpoint_insts=true
do_quiesce=true
do_statistics_insts=true
dtb=system.cpu0.dtb
eventq_index=0
function_trace=false
function_trace_start=0
interrupts=system.cpu0.interrupts
isa=system.cpu0.isa
itb=system.cpu0.itb
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
max_loads_any_thread=0
numThreads=1
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
profile=0
progress_interval=0
simpoint_start_insts=
socket_id=0
switched_out=false
syscallRetryLatency=10000
system=system
tracer=system.cpu0.tracer
workload=system.cpu0.workload
dcache_port=system.cpu0.dcache.cpu_side
icache_port=system.cpu0.icache.cpu_side
[system.cpu0.dcache]
type=Cache
children=tags
addr_ranges=0:18446744073709551615:0:0:0:0
assoc=4
clk_domain=system.cpu_clk_domain
clusivity=mostly_incl
data_latency=2
default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
is_read_only=false
max_miss_count=0
mshrs=4
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
prefetch_on_access=false
prefetcher=Null
response_latency=2
sequential_access=false
size=32768
system=system
tag_latency=2
tags=system.cpu0.dcache.tags
tgts_per_mshr=20
write_buffers=8
writeback_clean=false
cpu_side=system.cpu0.dcache_port
mem_side=system.toL2Bus.slave[1]
[system.cpu0.dcache.tags]
type=LRU
assoc=4
block_size=64
clk_domain=system.cpu_clk_domain
data_latency=2
default_p_state=UNDEFINED
eventq_index=0
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
sequential_access=false
size=32768
tag_latency=2
[system.cpu0.dtb]
type=SparcTLB
eventq_index=0
size=64
[system.cpu0.icache]
type=Cache
children=tags
addr_ranges=0:18446744073709551615:0:0:0:0
assoc=1
clk_domain=system.cpu_clk_domain
clusivity=mostly_incl
data_latency=2
default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
is_read_only=true
max_miss_count=0
mshrs=4
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
prefetch_on_access=false
prefetcher=Null
response_latency=2
sequential_access=false
size=32768
system=system
tag_latency=2
tags=system.cpu0.icache.tags
tgts_per_mshr=20
write_buffers=8
writeback_clean=true
cpu_side=system.cpu0.icache_port
mem_side=system.toL2Bus.slave[0]
[system.cpu0.icache.tags]
type=LRU
assoc=1
block_size=64
clk_domain=system.cpu_clk_domain
data_latency=2
default_p_state=UNDEFINED
eventq_index=0
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
sequential_access=false
size=32768
tag_latency=2
[system.cpu0.interrupts]
type=SparcInterrupts
eventq_index=0
[system.cpu0.isa]
type=SparcISA
eventq_index=0
[system.cpu0.itb]
type=SparcTLB
eventq_index=0
size=64
[system.cpu0.tracer]
type=ExeTracer
eventq_index=0
[system.cpu0.workload]
type=Process
cmd=test_atomic 4
cwd=
drivers=
egid=100
env=
errout=cerr
euid=100
eventq_index=0
executable=/usr/local/google/home/gabeblack/gem5/dist/m5/regression/test-progs/m5threads/bin/sparc/linux/test_atomic
gid=100
input=cin
kvmInSE=false
maxStackSize=67108864
output=cout
pgid=100
pid=100
ppid=0
simpoint=0
system=system
uid=100
useArchPT=false
[system.cpu1]
type=TimingSimpleCPU
children=dcache dtb icache interrupts isa itb tracer
branchPred=Null
checker=Null
clk_domain=system.cpu_clk_domain
cpu_id=1
default_p_state=UNDEFINED
do_checkpoint_insts=true
do_quiesce=true
do_statistics_insts=true
dtb=system.cpu1.dtb
eventq_index=0
function_trace=false
function_trace_start=0
interrupts=system.cpu1.interrupts
isa=system.cpu1.isa
itb=system.cpu1.itb
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
max_loads_any_thread=0
numThreads=1
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
profile=0
progress_interval=0
simpoint_start_insts=
socket_id=0
switched_out=false
syscallRetryLatency=10000
system=system
tracer=system.cpu1.tracer
workload=system.cpu0.workload
dcache_port=system.cpu1.dcache.cpu_side
icache_port=system.cpu1.icache.cpu_side
[system.cpu1.dcache]
type=Cache
children=tags
addr_ranges=0:18446744073709551615:0:0:0:0
assoc=4
clk_domain=system.cpu_clk_domain
clusivity=mostly_incl
data_latency=2
default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
is_read_only=false
max_miss_count=0
mshrs=4
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
prefetch_on_access=false
prefetcher=Null
response_latency=2
sequential_access=false
size=32768
system=system
tag_latency=2
tags=system.cpu1.dcache.tags
tgts_per_mshr=20
write_buffers=8
writeback_clean=false
cpu_side=system.cpu1.dcache_port
mem_side=system.toL2Bus.slave[3]
[system.cpu1.dcache.tags]
type=LRU
assoc=4
block_size=64
clk_domain=system.cpu_clk_domain
data_latency=2
default_p_state=UNDEFINED
eventq_index=0
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
sequential_access=false
size=32768
tag_latency=2
[system.cpu1.dtb]
type=SparcTLB
eventq_index=0
size=64
[system.cpu1.icache]
type=Cache
children=tags
addr_ranges=0:18446744073709551615:0:0:0:0
assoc=1
clk_domain=system.cpu_clk_domain
clusivity=mostly_incl
data_latency=2
default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
is_read_only=true
max_miss_count=0
mshrs=4
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
prefetch_on_access=false
prefetcher=Null
response_latency=2
sequential_access=false
size=32768
system=system
tag_latency=2
tags=system.cpu1.icache.tags
tgts_per_mshr=20
write_buffers=8
writeback_clean=true
cpu_side=system.cpu1.icache_port
mem_side=system.toL2Bus.slave[2]
[system.cpu1.icache.tags]
type=LRU
assoc=1
block_size=64
clk_domain=system.cpu_clk_domain
data_latency=2
default_p_state=UNDEFINED
eventq_index=0
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
sequential_access=false
size=32768
tag_latency=2
[system.cpu1.interrupts]
type=SparcInterrupts
eventq_index=0
[system.cpu1.isa]
type=SparcISA
eventq_index=0
[system.cpu1.itb]
type=SparcTLB
eventq_index=0
size=64
[system.cpu1.tracer]
type=ExeTracer
eventq_index=0
[system.cpu2]
type=TimingSimpleCPU
children=dcache dtb icache interrupts isa itb tracer
branchPred=Null
checker=Null
clk_domain=system.cpu_clk_domain
cpu_id=2
default_p_state=UNDEFINED
do_checkpoint_insts=true
do_quiesce=true
do_statistics_insts=true
dtb=system.cpu2.dtb
eventq_index=0
function_trace=false
function_trace_start=0
interrupts=system.cpu2.interrupts
isa=system.cpu2.isa
itb=system.cpu2.itb
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
max_loads_any_thread=0
numThreads=1
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
profile=0
progress_interval=0
simpoint_start_insts=
socket_id=0
switched_out=false
syscallRetryLatency=10000
system=system
tracer=system.cpu2.tracer
workload=system.cpu0.workload
dcache_port=system.cpu2.dcache.cpu_side
icache_port=system.cpu2.icache.cpu_side
[system.cpu2.dcache]
type=Cache
children=tags
addr_ranges=0:18446744073709551615:0:0:0:0
assoc=4
clk_domain=system.cpu_clk_domain
clusivity=mostly_incl
data_latency=2
default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
is_read_only=false
max_miss_count=0
mshrs=4
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
prefetch_on_access=false
prefetcher=Null
response_latency=2
sequential_access=false
size=32768
system=system
tag_latency=2
tags=system.cpu2.dcache.tags
tgts_per_mshr=20
write_buffers=8
writeback_clean=false
cpu_side=system.cpu2.dcache_port
mem_side=system.toL2Bus.slave[5]
[system.cpu2.dcache.tags]
type=LRU
assoc=4
block_size=64
clk_domain=system.cpu_clk_domain
data_latency=2
default_p_state=UNDEFINED
eventq_index=0
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
sequential_access=false
size=32768
tag_latency=2
[system.cpu2.dtb]
type=SparcTLB
eventq_index=0
size=64
[system.cpu2.icache]
type=Cache
children=tags
addr_ranges=0:18446744073709551615:0:0:0:0
assoc=1
clk_domain=system.cpu_clk_domain
clusivity=mostly_incl
data_latency=2
default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
is_read_only=true
max_miss_count=0
mshrs=4
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
prefetch_on_access=false
prefetcher=Null
response_latency=2
sequential_access=false
size=32768
system=system
tag_latency=2
tags=system.cpu2.icache.tags
tgts_per_mshr=20
write_buffers=8
writeback_clean=true
cpu_side=system.cpu2.icache_port
mem_side=system.toL2Bus.slave[4]
[system.cpu2.icache.tags]
type=LRU
assoc=1
block_size=64
clk_domain=system.cpu_clk_domain
data_latency=2
default_p_state=UNDEFINED
eventq_index=0
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
sequential_access=false
size=32768
tag_latency=2
[system.cpu2.interrupts]
type=SparcInterrupts
eventq_index=0
[system.cpu2.isa]
type=SparcISA
eventq_index=0
[system.cpu2.itb]
type=SparcTLB
eventq_index=0
size=64
[system.cpu2.tracer]
type=ExeTracer
eventq_index=0
[system.cpu3]
type=TimingSimpleCPU
children=dcache dtb icache interrupts isa itb tracer
branchPred=Null
checker=Null
clk_domain=system.cpu_clk_domain
cpu_id=3
default_p_state=UNDEFINED
do_checkpoint_insts=true
do_quiesce=true
do_statistics_insts=true
dtb=system.cpu3.dtb
eventq_index=0
function_trace=false
function_trace_start=0
interrupts=system.cpu3.interrupts
isa=system.cpu3.isa
itb=system.cpu3.itb
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
max_loads_any_thread=0
numThreads=1
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
profile=0
progress_interval=0
simpoint_start_insts=
socket_id=0
switched_out=false
syscallRetryLatency=10000
system=system
tracer=system.cpu3.tracer
workload=system.cpu0.workload
dcache_port=system.cpu3.dcache.cpu_side
icache_port=system.cpu3.icache.cpu_side
[system.cpu3.dcache]
type=Cache
children=tags
addr_ranges=0:18446744073709551615:0:0:0:0
assoc=4
clk_domain=system.cpu_clk_domain
clusivity=mostly_incl
data_latency=2
default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
is_read_only=false
max_miss_count=0
mshrs=4
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
prefetch_on_access=false
prefetcher=Null
response_latency=2
sequential_access=false
size=32768
system=system
tag_latency=2
tags=system.cpu3.dcache.tags
tgts_per_mshr=20
write_buffers=8
writeback_clean=false
cpu_side=system.cpu3.dcache_port
mem_side=system.toL2Bus.slave[7]
[system.cpu3.dcache.tags]
type=LRU
assoc=4
block_size=64
clk_domain=system.cpu_clk_domain
data_latency=2
default_p_state=UNDEFINED
eventq_index=0
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
sequential_access=false
size=32768
tag_latency=2
[system.cpu3.dtb]
type=SparcTLB
eventq_index=0
size=64
[system.cpu3.icache]
type=Cache
children=tags
addr_ranges=0:18446744073709551615:0:0:0:0
assoc=1
clk_domain=system.cpu_clk_domain
clusivity=mostly_incl
data_latency=2
default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
is_read_only=true
max_miss_count=0
mshrs=4
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
prefetch_on_access=false
prefetcher=Null
response_latency=2
sequential_access=false
size=32768
system=system
tag_latency=2
tags=system.cpu3.icache.tags
tgts_per_mshr=20
write_buffers=8
writeback_clean=true
cpu_side=system.cpu3.icache_port
mem_side=system.toL2Bus.slave[6]
[system.cpu3.icache.tags]
type=LRU
assoc=1
block_size=64
clk_domain=system.cpu_clk_domain
data_latency=2
default_p_state=UNDEFINED
eventq_index=0
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
sequential_access=false
size=32768
tag_latency=2
[system.cpu3.interrupts]
type=SparcInterrupts
eventq_index=0
[system.cpu3.isa]
type=SparcISA
eventq_index=0
[system.cpu3.itb]
type=SparcTLB
eventq_index=0
size=64
[system.cpu3.tracer]
type=ExeTracer
eventq_index=0
[system.cpu_clk_domain]
type=SrcClockDomain
clock=500
domain_id=-1
eventq_index=0
init_perf_level=0
voltage_domain=system.voltage_domain
[system.dvfs_handler]
type=DVFSHandler
domains=
enable=false
eventq_index=0
sys_clk_domain=system.clk_domain
transition_latency=100000000
[system.l2c]
type=Cache
children=tags
addr_ranges=0:18446744073709551615:0:0:0:0
assoc=8
clk_domain=system.cpu_clk_domain
clusivity=mostly_incl
data_latency=20
default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
is_read_only=false
max_miss_count=0
mshrs=20
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
prefetch_on_access=false
prefetcher=Null
response_latency=20
sequential_access=false
size=4194304
system=system
tag_latency=20
tags=system.l2c.tags
tgts_per_mshr=12
write_buffers=8
writeback_clean=false
cpu_side=system.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.l2c.tags]
type=LRU
assoc=8
block_size=64
clk_domain=system.cpu_clk_domain
data_latency=20
default_p_state=UNDEFINED
eventq_index=0
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
sequential_access=false
size=4194304
tag_latency=20
[system.membus]
type=CoherentXBar
children=snoop_filter
clk_domain=system.clk_domain
default_p_state=UNDEFINED
eventq_index=0
forward_latency=4
frontend_latency=3
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
point_of_coherency=true
power_model=Null
response_latency=2
snoop_filter=system.membus.snoop_filter
snoop_response_latency=4
system=system
use_default_range=false
width=16
master=system.physmem.port
slave=system.system_port system.l2c.mem_side
[system.membus.snoop_filter]
type=SnoopFilter
eventq_index=0
lookup_latency=1
max_capacity=8388608
system=system
[system.physmem]
type=SimpleMemory
bandwidth=73.000000
clk_domain=system.clk_domain
conf_table_reported=true
default_p_state=UNDEFINED
eventq_index=0
in_addr_map=true
kvm_map=true
latency=30000
latency_var=0
null=false
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
range=0:134217727:0:0:0:0
port=system.membus.master[0]
[system.toL2Bus]
type=CoherentXBar
children=snoop_filter
clk_domain=system.cpu_clk_domain
default_p_state=UNDEFINED
eventq_index=0
forward_latency=0
frontend_latency=1
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
point_of_coherency=false
power_model=Null
response_latency=1
snoop_filter=system.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
width=32
master=system.l2c.cpu_side
slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side
[system.toL2Bus.snoop_filter]
type=SnoopFilter
eventq_index=0
lookup_latency=0
max_capacity=8388608
system=system
[system.voltage_domain]
type=VoltageDomain
eventq_index=0
voltage=1.000000

7
tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/simerr
View File

@@ -1,7 +0,0 @@
warn: Sockets disabled, not accepting gdb connections
warn: ClockedObject: More than one power state change request encountered within the same simulation tick
warn: ClockedObject: More than one power state change request encountered within the same simulation tick
warn: ClockedObject: More than one power state change request encountered within the same simulation tick
warn: ClockedObject: More than one power state change request encountered within the same simulation tick
info: Entering event queue @ 0. Starting simulation...
warn: ClockedObject: Already in the requested power state, request ignored

84
tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/simout
View File

@@ -1,84 +0,0 @@
Redirecting stdout to build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-timing-mp/simout
Redirecting stderr to build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-timing-mp/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Mar 29 2017 17:08:10
gem5 started Mar 29 2017 17:08:19
gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 126092
command line: /usr/local/google/home/gabeblack/gem5/gem5-public/build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-timing-mp --stats-file 'text://stats.txt?desc=False' -re /usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../run.py quick/se/40.m5threads-test-atomic/sparc/linux/simple-timing-mp
Global frequency set at 1000000000000 ticks per second
Init done
[Iteration 1, Thread 2] Got lock
[Iteration 1, Thread 2] Critical section done, previously next=0, now next=2
[Iteration 1, Thread 1] Got lock
[Iteration 1, Thread 1] Critical section done, previously next=2, now next=1
[Iteration 1, Thread 3] Got lock
[Iteration 1, Thread 3] Critical section done, previously next=1, now next=3
Iteration 1 completed
[Iteration 2, Thread 3] Got lock
[Iteration 2, Thread 3] Critical section done, previously next=0, now next=3
[Iteration 2, Thread 1] Got lock
[Iteration 2, Thread 1] Critical section done, previously next=3, now next=1
[Iteration 2, Thread 2] Got lock
[Iteration 2, Thread 2] Critical section done, previously next=1, now next=2
Iteration 2 completed
[Iteration 3, Thread 2] Got lock
[Iteration 3, Thread 2] Critical section done, previously next=0, now next=2
[Iteration 3, Thread 3] Got lock
[Iteration 3, Thread 3] Critical section done, previously next=2, now next=3
[Iteration 3, Thread 1] Got lock
[Iteration 3, Thread 1] Critical section done, previously next=3, now next=1
Iteration 3 completed
[Iteration 4, Thread 1] Got lock
[Iteration 4, Thread 1] Critical section done, previously next=0, now next=1
[Iteration 4, Thread 2] Got lock
[Iteration 4, Thread 2] Critical section done, previously next=1, now next=2
[Iteration 4, Thread 3] Got lock
[Iteration 4, Thread 3] Critical section done, previously next=2, now next=3
Iteration 4 completed
[Iteration 5, Thread 3] Got lock
[Iteration 5, Thread 3] Critical section done, previously next=0, now next=3
[Iteration 5, Thread 1] Got lock
[Iteration 5, Thread 1] Critical section done, previously next=3, now next=1
[Iteration 5, Thread 2] Got lock
[Iteration 5, Thread 2] Critical section done, previously next=1, now next=2
Iteration 5 completed
[Iteration 6, Thread 2] Got lock
[Iteration 6, Thread 2] Critical section done, previously next=0, now next=2
[Iteration 6, Thread 3] Got lock
[Iteration 6, Thread 3] Critical section done, previously next=2, now next=3
[Iteration 6, Thread 1] Got lock
[Iteration 6, Thread 1] Critical section done, previously next=3, now next=1
Iteration 6 completed
[Iteration 7, Thread 1] Got lock
[Iteration 7, Thread 1] Critical section done, previously next=0, now next=1
[Iteration 7, Thread 2] Got lock
[Iteration 7, Thread 2] Critical section done, previously next=1, now next=2
[Iteration 7, Thread 3] Got lock
[Iteration 7, Thread 3] Critical section done, previously next=2, now next=3
Iteration 7 completed
[Iteration 8, Thread 3] Got lock
[Iteration 8, Thread 3] Critical section done, previously next=0, now next=3
[Iteration 8, Thread 1] Got lock
[Iteration 8, Thread 1] Critical section done, previously next=3, now next=1
[Iteration 8, Thread 2] Got lock
[Iteration 8, Thread 2] Critical section done, previously next=1, now next=2
Iteration 8 completed
[Iteration 9, Thread 2] Got lock
[Iteration 9, Thread 2] Critical section done, previously next=0, now next=2
[Iteration 9, Thread 3] Got lock
[Iteration 9, Thread 3] Critical section done, previously next=2, now next=3
[Iteration 9, Thread 1] Got lock
[Iteration 9, Thread 1] Critical section done, previously next=3, now next=1
Iteration 9 completed
[Iteration 10, Thread 1] Got lock
[Iteration 10, Thread 1] Critical section done, previously next=0, now next=1
[Iteration 10, Thread 2] Got lock
[Iteration 10, Thread 2] Critical section done, previously next=1, now next=2
[Iteration 10, Thread 3] Got lock
[Iteration 10, Thread 3] Critical section done, previously next=2, now next=3
Iteration 10 completed
PASSED :-)
Exiting @ tick 263409500 because exiting with last active thread context

1659
tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/stats.txt
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File diff suppressed because it is too large Load Diff

5
tests/quick/se/40.m5threads-test-atomic/test.py
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@@ -1,5 +0,0 @@
process = Process(executable = binpath('m5threads', 'test_atomic'),
cmd = ['test_atomic', str(nb_cores)])
for i in range(nb_cores):
root.system.cpu[i].workload = process