Commit Graph

14830 Commits

Author SHA1 Message Date
Gabe Black
5f243a72fc kern: Delete authors lists from files in kern.
Change-Id: Ic82d0172b61b5b84241edf1112148d7383aade97
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25413
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
2020-02-17 10:05:42 +00:00
Gabe Black
9164511ef1 scons: Remove authors from the main SConsctruct/SConscript files.
Change-Id: I48987ea4d829e722caf16126dd82f2c580e7836a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25412
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
2020-02-17 10:05:36 +00:00
Gabe Black
002cb8f78d tests: Delete authors lists from the unittest directory.
Change-Id: Id4c7f5ddb932e427cb42d0698b1a048377d027c2
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25409
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
2020-02-17 10:05:19 +00:00
Gabe Black
75a3fc0cd6 alpha: Delete the alpha arch files.
Change-Id: If8f930c77e5f97156b42f68b3f8a538c8f8bf94c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24652
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-13 23:25:30 +00:00
Gabe Black
4a51a39485 base: Delete alpha loader components.
Change-Id: I228ff95af3fea04f8fb96486d5130abe1ab0228f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24651
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
2020-02-13 23:25:23 +00:00
Gabe Black
cb74a5d7ac dev: Delete alpha devices.
Change-Id: Idc41e83d94d39e8e45044a64b22b39cb395947c7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24650
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
2020-02-13 23:25:16 +00:00
Gabe Black
208dcd315e sim: Remove mention of alpha.
Change-Id: Iec6b9284383d380885955438c3693b0d2efc497e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24649
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
2020-02-13 23:25:09 +00:00
Gabe Black
d1fd4311b4 cpu: Remove alpha specialized code.
Change-Id: I770132af2f11ed232a100ab8bef942f17789ef36
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24648
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-13 23:25:03 +00:00
Gabe Black
67273d65ed configs: Remove mentions of alpha from the configs.
Change-Id: I09117b52c0c87679eaa72dbb79545dd1e77732b1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24647
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
2020-02-13 23:20:30 +00:00
Gabe Black
935cbc6ff9 system: Delete alpha files from system.
Change-Id: I42b8ea34fb64b6dc7bdf3c09310011cfd989a7d9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24646
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
2020-02-13 23:20:21 +00:00
Gabe Black
d1516fc254 scons: Delete the ALPHA default build configuration.
Change-Id: Ifbc0b6dd9b85e5a00ab11f16b2703b4ae946207e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24645
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-13 23:20:13 +00:00
Bobby R. Bruce
7b14697463 misc: Updated git-commit-msg.py to print rejected commit
A rejected commit is now printed to stdout. This adds an additional
level of security if the ".git/COMMIT_EDITMSG" is deleted/overwritten.

Jira: https://gem5.atlassian.net/browse/GEM5-321
Change-Id: I87d463f7c40024d68bf78705f0d02fcea9f0eeeb
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25343
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-13 21:28:20 +00:00
Gabe Black
e01ead41c2 scons,arch: Remove simple scalar compatibility.
This was primarily in Alpha where disassmbly output could be compatible
(default off, probably not usd in a long time), and floating point
could be compatible (default on). A small bit had crept into x86 from
long ago which is also removed.

Change-Id: Ibb68b63787f370259bd1613b393e0b057c007704
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25012
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-13 19:59:41 +00:00
Gabe Black
9d8f3f9ad3 arm: Don't checkpoint the SystemCounter's "_period" value.
This value is just a cached inverse of _freq and can be recalculated
easily once the checkpoint is restored. The actual value of _period
actually depends on the global resolution of time (ie how much time a
Tick represents), and so saving the value of _period is also not
technically correct, even though in practice that will very rarely
cause a problem.

Change-Id: I21e63ba25ac4e189417905e532981f3d80723f19
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24390
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-13 19:40:36 +00:00
Gabe Black
0da40acd80 arm: "Correct" the spelling of flavor.
In US English, flavor is spelled flavor, not flavour. The choice of
US spelling is arbitrary but consistent with gem5's history and the
rest of the code base.

Also fix a couple small style issues.

Change-Id: I307f8458fec5918a6fc34f938a4c12955d4d0565
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25010
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-13 19:39:40 +00:00
Gabe Black
eae03bbc9d arch,cpu: Make the CPU's ISA parameter type BaseISA.
This is mostly only a superficial change since the isa parameter is
then dynamic cast to the ISA specific version inside the various
consumers, currently the SimpleThread, O3CPU and Decoder classes. If
those aren't being used, for instance in the fast model CPUs, then you
can use a different ISA implementation without any type clashes.

Change-Id: I2226ef60f9a471ae51b8bfce8683033f7854197a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25009
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-13 19:36:54 +00:00
Giacomo Travaglini
d1e2f18230 ext: Add failure node to JUnit xml file
"failure" is a child of the testcase node:

https://llg.cubic.org/docs/junit/

It allows xml parsers to understand which testcase failed the run.
Otherwise CI frameworks like jenkins wouldn't be able to classify every
single testcase. Prior to this patch testlib was using
testsuites.failures and testsuite.failures only. These are simply
reporting the number of failures.

Change-Id: I0d498eca029c3232f2a588b153b6b6829b789394
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25083
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
2020-02-13 16:40:49 +00:00
Bobby R. Bruce
1db7ecb4ce misc: Updated CONTRIBUTING.md to discuss releases and hotfixes
A new section in CONTRIBUTING.md has been added to discuss the
proceedure for how releases are carried out, as well as hotfixes.

Jira: https://gem5.atlassian.net/browse/GEM5-297
Change-Id: I49e7d6e41e8a6d5387c839eb26263e86dd52c294
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24843
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-13 02:42:15 +00:00
Bobby R. Bruce
680645e502 misc: Updated CONTRIBUTING.md to discuss WIP changes
Previously CONTRIBUTING.md discused private changes, but contributors
cannot submit private changes to Gerrit under the current configuration.
This has therefore been removed and replaced with an explanation of how
to submit a WIP (Work In Progress) changes to Gerrit. WIP changes are
permitted.

Change-Id: I9e1acbdaf4a9b5c433c0704ba9faf325a6b48c6a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24805
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-13 02:42:15 +00:00
Bobby R. Bruce
5f304f7e75 misc: Updated CONTRIBUTING.md for master-as-stable setup
Jira: https://gem5.atlassian.net/browse/GEM5-284
Change-Id: I28c4d658a2e9c3bf11879a7b73e16d167c97398f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24804
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-13 02:42:15 +00:00
Bobby R. Bruce
88652a5c82 misc: Removed old contribution guidelines regarding branches
This is old, outdated information. It has largely been replaced by:
https://gem5-review.googlesource.com/c/public/gem5/+/24263

Change-Id: I2f232cd1b3133f94434f4f12b1206dabaf339899
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24803
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-13 02:42:15 +00:00
Gabe Black
135595a4d7 mem: Eliminate the now unused GENERIC_IPR request flag.
Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: Id3aaffa4fa88032fd209c5c3b6f67283a6af1c48
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23187
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Muhammad Sarmad Saeed <mssaeed@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2020-02-11 11:58:57 +00:00
Gabe Black
2b63ac0d55 arch: Get rid of the generic mmapped IPR mechanism.
Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: I4ab6f80581eee39e90fb91c672eca8e1a8fd9046
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23186
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
2020-02-11 11:58:06 +00:00
Gabe Black
1bd9687799 arm: Call pseudoInst directly from the mmapped IPR handlers.
The amount of plumbing necessary for the generic IPR mechanism out
weighs its value, considering it's only used for the m5ops.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: I0efcf43904d5f779bef5ad127dd8d39fff41ac39
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23185
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-11 11:56:29 +00:00
Giacomo Travaglini
75548f053d tests,misc: update TESTING.md documentation
* Documentation was assuming only tests in tests/test-progs were run.
This is not true anymore since we are running linux-boot for arm
which doesn't have a directory inside test-progs and because it
is now possible to explicitly specify the bin directory
(--bin-path)

Change-Id: I4cbb02fa1c88839be45302ea64e07792e1fc81f5
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24526
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-11 09:34:44 +00:00
Gabe Black
38e460343f scons: Fix an error about an unrecognized compiler.
join was being passed a series of strings to join as separate
arguments like os.path.join, but it expects to get them as members of a
single sequence.

Change-Id: Id88ce4e9c5400f256a1af6351b4a964af0036b72
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25203
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-10 22:47:13 +00:00
Daniel R. Carvalho
f5e84a5fb9 base: Fix squares of stats
If a sample V, which has a square(V) = V * V, was seen N times, then
its sum of squares is given by N * square(V).

Change-Id: Ie3fe0e4afe6e79ba4c8a5a56532f9346f79b4029
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25184
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-10 22:35:24 +00:00
Gabe Black
cc2732d5c3 base: Use a const auto & in a range based for loop.
clang 11 complains otherwise which breaks the build, and this way
is less verbose and more efficient since it doesn't require copying
a vector of strings for each element of the loop.

Change-Id: I005fa5fdf19ddba2114e98413e3609b0a91c1ec5
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25226
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-10 22:32:06 +00:00
Gabe Black
b82860cc98 riscv: Cast to float explicitly when comparing a float to an int.
clang 11 complains that the int value is not represented exactly
otherwise which breaks the build. With this case the comparison is
still the same, but since it's explicit the compiler doesn't warn about
it.

Change-Id: I1d9ffc77e778517d9c6a985ae7aa6c4f1d5b57a2
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25225
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Alec Roelke <alec.roelke@gmail.com>
Maintainer: Alec Roelke <alec.roelke@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-10 22:31:57 +00:00
Gabe Black
ed4482bda7 arm: Fix how a bitfield is extracted in some SVE instructions.
These instructions were extracting a bitfield by masking it, but then
didn't shift the bit into the correct position. They were then
comparing it with 1, which clang 11 correctly complained would always
be false. That warning became an error which broke the build.

This fixes that problem by switching that line and the few surrounding
lines to use the bits() function which removes the need to manually
mask or shift values. That makes it less likely for there to be a
mistake, and also makes it more obvious which bits are being accessed.

Change-Id: I692214f898e90dc7d5de460d1da2ef6aefda4fb8
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25224
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-10 22:31:21 +00:00
Gabe Black
4aa277a865 arch: Add a bunch of missing override specifiers.
Missing override on methods which are overriding virtual methods causes
warnings/errors on certain compilers.

Change-Id: I16f565fa07bfcb399a0209cd87f1f9729cd89b2e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25223
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-10 22:31:12 +00:00
Daniel R. Carvalho
7515106ebe mem-cache,mem-ruby: Move WeightedLRU RP
Move the WeightedLRUReplacementPolicy to the replacement policies folder.

Change-Id: I9902faefb6de33343bb65f994be70bd9e1dd4e14
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22445
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: John Alsop <johnathan.alsop@amd.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
2020-02-10 12:40:18 +00:00
Giacomo Travaglini
25cf751b10 tests: hello_se using host tag
This patch is rewriting hello_se to distinguish between statically and
dynamically linked hello worlds.

Change-Id: I03c1add1d1ca568d150f4bacd89b2838a6d27035
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24528
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
2020-02-10 09:57:56 +00:00
Giacomo Travaglini
5ab5d07d71 tests: Add --host tag
A host tag has been added to take into consideration the host ISA which
is running gem5 (default is X86).
There might be regressions which are supposed to be run on a particular
host machine only. This could be the case of dynamically linked
regressions which require dynamic linker/loader + shared libraries of
the same ISA as the target.

Change-Id: I4c4044a4f1b8899f443856340df302df7c1aaf8e
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24527
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-10 09:57:56 +00:00
Giacomo Travaglini
441138b837 configs: Using VExpress_GEM5_V1 as a default for Options.py
This is replacing deprecated VExpress_EMM for scripts using Options.py,
like fs.py.

Change-Id: I2ba01b248bb9baf49e1f2217d623f3b9bc8a35f9
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25183
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-10 09:52:44 +00:00
Giacomo Travaglini
20ed09d1a1 arch-arm: LDTRSW was not marked as unpriviledged
Change-Id: If0f2b835e40ef011eba884b1dcd81f14531fd1ce
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24043
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
2020-02-10 09:41:11 +00:00
Earl Ou
6a4d111855 systemc: gem5_to_tlm: treat non-rw as ignorable command
Treat all kinds of non read/write requests in gem5_to_tlm bridge as ignorable
commands.

Change-Id: I5236e1b31f9a57470dc666d01cbe96249f48ed5d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25163
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-10 02:44:41 +00:00
Gabe Black
97a0ad7f63 arch,sim: Replace setuidFunc with ignoreFunc.
The setuidFunc just ignores the call and warns about it, and that's
what ignoreFunc already does.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: I7655863ed6fe200ff3ac087be3218d49c3c43061
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23194
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-08 13:05:45 +00:00
Gabe Black
97c02b000e sim: Convert most of the common syscalls to use the guest ABI.
A couple tricky instances were left alone for now, specifically one
place where the size of the argument is specified explicitly (the
default ABI always leaves off the size), and two places where the
arguments are variadic which is not yet supported.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: I2ec19bea77d329de3575e17e9f7209f4fd871aa6
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23193
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-08 12:59:10 +00:00
Gabe Black
c7cb8bb5d8 sim: Use the Guest ABI mechanism in writeFunc.
This change only modifies the writeFunc since it's easy to test using
the hello world test programs.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: Ia4a7bacdb9938d9fbe4093fc6958904d6c423360
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23192
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-08 12:58:35 +00:00
Gabe Black
af07a51f0b arch: Switch SyscallDescABI in for SyscallDesc.
This lets system calls accept arguments by putting them in their
signatures.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: Ieb32b8b5592d894e493466717613ff16e2a03768
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23191
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-08 12:58:03 +00:00
Gabe Black
a255a2ee64 sim: Add a transitional syscall ABI which defers to Process.
This change adds a transitional ABI which just falls back to the
existing Process syscall arg getters. It should be phased out once each
ISA implements its own actual ABI.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: Ic40bd924989f91de70bbce59fda888b79bbbfca4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23190
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-08 12:57:22 +00:00
Gabe Black
e0f0351182 arch: Simplify the SyscallDesc tables.
By using braced initializer lists and dropping the default
unimplementedFunc implementation function, the SyscallDesc tables
become a lot less crowded, and it's now very obvious which syscalls
are implemented just by quickly visually scanning the table.

This will also make it a lot easier to change the underlying type
stored in the table without having to adjust all of the instances
within them.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: I7821de74812e1c02ca4550fc9c46cc2188cf1bd0
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23189
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-08 12:32:10 +00:00
Gabe Black
b3eb2db7e4 x86: Handle m5 op accesses directly in the mmapped IPR handlers.
The common handlers only handle the m5ops, and it takes more plumbing
to get to them than to just handle the m5ops directly from x86.

Also, centralizing the call to PseudoInst::pseudoInst prevents
specializing the ABI per-ISA.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: Ife9cf0d61ac87605ddc9cf9c84feebb8b23cc33a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23184
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-07 10:57:54 +00:00
Gabe Black
549e0b25e3 sim: Add a function for decoding the field(s) of an m5op address.
These have at one time included both a func and subfunc, although the
subfunc was unused and is now excluded.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: Ic35ced7a012aa72af5454768f3cbd11b431b061a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23183
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Marjan Fariborz <mfariborz@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2020-02-07 07:41:07 +00:00
Gabe Black
e758cd09d8 x86: Use the m5 op range in the system.
Don't hard code a range into the TLB.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: I0ead4353672ccf6e3e51ddbb4676be3a09f1136a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23182
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Pouya Fotouhi <pfotouhi@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2020-02-07 07:39:47 +00:00
Gabe Black
95c6a839a5 arch,sim: Use _m5opRange in System::allocPhysPages.
This removes the hardcoded assumption that the m5 ops live at the
address they use in x86.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: Ia551d7cf5b08f926c7756541c92a2af9bb73b88a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23181
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-07 07:37:38 +00:00
Gabe Black
206aa5b280 sim: Add a typetraits style mechanism to test for VarArgs.
This family of types can be cumbersome to check for when building
ABI rules. This struct template makes that a little easier.

Change-Id: Ic3a1b8424f8ca04564f8228365371b357f33276c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23750
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2020-02-07 07:36:39 +00:00
Jordi Vaquero
4d039064b0 arch-arm: Implement ARMv8.3-JSConv
This commit implements Armv8 javascript float point convertion instructions
VJVCT and FJCVTZS.

Change-Id: I1b24839daef775bbb1eb9da5f32c4bb3843e0b28
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25023
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-06 22:23:06 +00:00
Jordi Vaquero
3cea7d9ce4 arch-arm: This commit adds Pointer Authentication feature.
+ ArmISA.py: Enabling the feature adding  QARMA algorithm as default.
+ faults.cc/faults.hh: Add PACTrapFault
+ includes/insts.isa: Adding new isa files.
+ aarch64.isa: Add decode part for PAC instructions
+ pauth.isa: Isa for PAC instructions
+ misc64.isa: PAC instructions templates
+ miscregs.cc/hh/types: New Registers for PAC Key low/high.
+ types.hh: Modification of system registers that were incomplete
            for ARMv8
+ utility.hh: Add isSecureEL2 enabled. The function is there but will
              always return false for now.
+ pauth_helpers.hh/cc: Implementation of auxiliar functions and derivates.
+ qarma.hh/cc: This functions follow ARMv8 reference pseudo code
              implementing QARMA block cipher algorithms.

Change-Id: I3095a1279204206d9a816a4fb7fc176c18f9680b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25024
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-06 22:22:54 +00:00