derek/gem5
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

arch-arm: LDTRSW was not marked as unpriviledged

Browse Source 
Change-Id: If0f2b835e40ef011eba884b1dcd81f14531fd1ce
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24043
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
This commit is contained in:
Giacomo Travaglini
2019-12-04 14:16:47 +00:00
parent 6a4d111855
commit 20ed09d1a1
1 changed files with 2 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
src/arch/arm/isa/insts/ldr64.isa
View File

@@ -1,6 +1,6 @@
// -*- mode:c++ -*-
// Copyright (c) 2011-2014, 2017 ARM Limited
// Copyright (c) 2011-2014, 2017, 2019 ARM Limited
// All rights reserved
//
// The license below extends only to copyright in the software and shall
@@ -436,7 +436,7 @@ let {{
LoadImm64("ldtrh", "LDTRH64_IMM", 2, False, True).emit()
LoadImm64("ldtrsh", "LDTRSHW64_IMM", 2, True, True).emit()
LoadImm64("ldtrsh", "LDTRSHX64_IMM", 2, True, True, flavor="widen").emit()
LoadImm64("ldtrsw", "LDTRSW64_IMM", 4, True, flavor="widen").emit()
LoadImm64("ldtrsw", "LDTRSW64_IMM", 4, True, True, flavor="widen").emit()
LoadImm64("ldtr", "LDTRW64_IMM", 4, False, True).emit()
LoadImm64("ldtr", "LDTRX64_IMM", 8, False, True).emit()