Commit Graph

17862 Commits

Author SHA1 Message Date
Bobby R. Bruce
520b775b32 tests: Updates test_hdf5.py to use simple_binary_run.py
In addition, python black has been run on test_hdf5.py

Change-Id: Ib39ed8cf71354fe07519a68d39468b8b3a5caf1b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49556
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-08 22:44:31 +00:00
Bobby R. Bruce
5c949b0c01 tests: Update the insttest to use simple_binary_run.py
In addition, test.py has been formatted with Python black.

Change-Id: If813c80e15a019502c60ab09fb62484fc2cdf0c6
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49555
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2021-09-08 22:44:31 +00:00
Bobby R. Bruce
86d16db5dd tests: Update hello_se to use simple_binary_run.py
Additionally: test_hello_se.py has been formatted with Python black.

Change-Id: I14235c74dae2d98be78aadfe4bf825ea881c5300
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49554
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2021-09-08 22:44:31 +00:00
Bobby R. Bruce
949c12e0d5 configs,python: Update simple_binary_run.py for testing
This allows us to test the running of bare-metal binaries on gem5. The
current design assumes the binaries to run are part of gem5 Resources.

Change-Id: I4f0f40a4628fd5f5951d89079824369a219d6e91
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49553
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2021-09-08 22:44:31 +00:00
Bobby R. Bruce
590daeb901 learning-gem5,tests: Move Learning gem5 Part 3 to run nightly
The Learning gem5 part 3 tests require the building of the X86_MSI
binary. These are the only tests that require this protocol. Building
this is not worth it to just run these tests. They've therefore been
moved to be run nightly rather than as a pre-submit/kokoro test.

Change-Id: If0cdd9c30a160a01cef5fcda8a5433ab2d6ac882
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50027
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-08 04:19:05 +00:00
Bobby R. Bruce
f1a56c1f5a tests: Add PARSEC tests
Change-Id: I74adbe25c34a21963ff3252cff13cec8203b191c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49552
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-08 04:16:59 +00:00
Bobby R. Bruce
df3601b265 configs: Fix SimpleCore for connect_interrupt() case
Something needs done if interrupt_requestor or interrupt_responce is not
set. This patch does not set the interrupts on the cores.

Change-Id: I96aefeec83ff72cb93640c11b2ee60e76f5f32fe
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49611
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2021-09-08 04:16:59 +00:00
Bobby R. Bruce
7d9cf53e78 configs: Fix AbstractGeneratorCore connect_interrupt sig
`interrupt_requestor` and `interrupt_responce` are not manditory, they
should be defaulted to None. Without this errors occur when attempting
to call `connect_interrupt`.

Change-Id: I9401132df681b9a19eede8808a9a68d435cc5bbe
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49610
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2021-09-08 04:16:59 +00:00
Bobby R. Bruce
51094b206b configs: Update the parsec_disk_run.py for testing
This update exposes arguments, allowing users to specify which parsec
benchmark application to run, which size, and which CPU/memory model to
use. This makes it suitable for use in testing.

Change-Id: I7ce4be260081203f62e2119275e4c80d3e4d726e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49551
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2021-09-08 04:16:59 +00:00
Bobby R. Bruce
2d82333afe tests: Update the x86-boot-tests to use boot_exit_disk_run.py
This change makes three improvements:

1. It uses the gem5 components library
`config/example/components-library/boot_exit_disk_run.py` example. This
test therefore doubles-up as a test for this example and the gem5
components library, as well as full-system x86 booting of Linux.

2. It includes 'very-long' tests to be run weekly. These are a full
cross-product of x86 boot tests and will help identify gem5 failures
more quickly.

3. Quick tests are added to boot the linux OS to a certain tick.

Change-Id: Ie52c267f3382e37912b8ae41dc92b1ee8d06f9f9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49325
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-08 04:16:59 +00:00
Bobby R. Bruce
b12381bbe4 configs,python: Update components library to support KVM
Issue-on: https://gem5.atlassian.net/browse/GEM5-1024
Change-Id: Ic3340e77ab0f9a72752924b9dee89bb5e220615f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49613
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2021-09-08 04:16:59 +00:00
Bobby R. Bruce
091ba116ee ext,tests: Add 'very-long' tag for test length
This new tag will be used to specify tests to run Weekly (with the
'long' tests for Nightly, and the 'quick' tests for Kokoro/presubmit).

Change-Id: I088c2ef36cb14746e581eac5b1771f82250f2b98
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49326
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2021-09-08 04:16:59 +00:00
Bobby R. Bruce
af839c4f4e python: Add requires to gem5 components lib
This `requires` function allows a simple way to specify ISA, KVM, and
cache coherence protocol requirments within the library and scripts.
An exception will be thrown if the gem5 binary does not meet these
requirements.

The `requires` function may be expanded with other requirements as
needed. At present we only check ISA, KVM, and cache coherence
protocols.

Change-Id: I5c8ff3766ebb9f3292aa553b02781b43d6752775
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49324
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2021-09-08 04:16:59 +00:00
Bobby R. Bruce
ef441d3f41 python: Run Black on configs/example/components-library
Change-Id: Id0c2151a624737f3e035fd3ae14602c144219675
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49307
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2021-09-08 04:16:59 +00:00
Bobby R. Bruce
f272a112fd python: Update boot_exit_disk_run.py for testing
This updates `configs/example/components-library/boot_exit_disk_run.py`
to be used for the gem5 boot tests by exposing arguments thus making the
run configurable.

Change-Id: I4e1c77e522ffca4bac2f328a1bc2306a4cd1402f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49306
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2021-09-08 04:16:59 +00:00
Bobby R. Bruce
f2b3a5a7b0 python: Add optional 'kernel_args' to x86's set_workload
This optional argument allows a user to pass additional arguments to the
kernel.

Change-Id: Icbc36ab265e5acf6323fd340c0036c2acd35b3a6
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49323
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2021-09-08 04:16:59 +00:00
Bobby R. Bruce
cb5f676ea0 python: Add a PrivateL1CacheHierarchy to the gem5 components
This adds a private L1 classic cache hierarchy to the gem5 components.

Change-Id: I78b038e2a4031d6df78ac9908f7baf9cb5920f47
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49305
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2021-09-08 04:16:59 +00:00
Bobby R. Bruce
2ef2f11955 python,configs: Add Resource class to gem5 components
The `Resource` class can be used to obtain a gem5 resource. The
`Resource` class, via the `downloader` package, parses the gem5
resources `resources.json` file:
https://gem5.googlesource.com/public/gem5-resources/+/refs/heads/develop/resources.json
From this it can determine the available resources and where to download
them. This allows for automatic retrieval of resources.

The `CustomResource` can be used to specify a local resource not part of
gem5 resources.

The board's `set_workload` function has been updated to use the
resources.

The components library example scripts have been updated to demonstrate
the `Resource`/`CustomResource` class usage.

Issue-on: https://gem5.atlassian.net/browse/GEM5-1022
Change-Id: I59cfe81d5ec9c64576c0dab55af52aede96976fb
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49304
Reviewed-by: Austin Harris <austin.dane.harris@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-08 04:16:59 +00:00
Bobby R. Bruce
ec91492feb python: Add MI_Example cache hierarchy to the components lib
Change-Id: If8c2e08779f4be59112fe130ab651dfce7065111
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49303
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-08 04:16:59 +00:00
Nicolas Boichat
729eea73a4 base: Remove SOCK_CLOEXEC from socketCloexec.
63c53e21fe ("base: Add SOCK_CLOEXEC when creating/accepting sockets")
accidentally left SOCK_CLOEXEC as socketCloexec parameter, remove
it as socketCloexec will add that parameter, and it'll not compile
on platforms that do not provide the flag.

Change-Id: I30e6fa1824b0258a325b53422585a9a362de4dff
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49947
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-06 23:58:56 +00:00
Gabe Black
77a0372fe9 scons,debug: Implement the "All" flag in C++ and not scons.
Create an AllFlagsFlag class which inherits from the CompoundFlag class.
This class is a singleton, and the SimpleFlags install themselves in it
instead of having SCons collect them.

The allFlagsVersion global variable was supposed to be for debugging
according to a comment, but was actually an important part of the "All"
flags inner workings. It was not exposed in the header, but was
redefined/pulled through in src/python/pybind11/debug.cc. The
AllFlagsFlag class now tracks that value, and it can be accessed without
reaching behind the curtain.

This also somewhat decentralizes the debug flag building process in
SCons. The debug/flags.cc still includes all flags at once which
centralizes them, but at least now the "All" flag won't also.

Change-Id: I8430e0fe9022846aade028fb46c80777169a2007
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48370
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Nathanael Premillieu <nathanael.premillieu@huawei.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2021-09-05 17:13:53 +00:00
Gabe Black
269258831e scons: Eliminate the "Arch" enum.
This is not the one from the object file loader, it's another one which
was only used by the System class. That use has been eliminated, so this
enum can be as well.

Change-Id: I476d7c1ef1bc1e34cbf904fc33c6735038e999c9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48712
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
2021-09-05 17:12:48 +00:00
Gabe Black
99e01f900d sim: Eliminate the now unused System::getArch().
Change-Id: Ia36c9c3779719faba30105cd15f4495c8b6141c8
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48711
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
2021-09-05 05:29:47 +00:00
Gabe Black
00187b7bc3 x86,mem: Replace the x86 StoreCheck flag with READ_MODIFY_WRITE.
X86 had a private/arch specific request flag called StoreCheck which it
used to signal to the TLB that it should fault on a load if it would
have faulted had it been a store. That way, you can detect whether a
read-modify-write type of operation is going to fail due to a
translation problem during the read, and don't have to worry about not
doing anything architecturally visible until the store had succeeded,
while also making sure not to do the store part if the modify part
could fail.

It seems that Ruby had hijacked that flag and had an architecture
specific check which was looking for a load which was going to be
followed by a store. The x86 flag was never intended to communicate that
beyond the TLB, and this nominally architecture agnostic component
shouldn't be reaching into the ISA specific flags to try to get that
information.

Instead, this change introduces a new Request flag called
READ_MODIFY_WRITE which is used for the same purpose in x86, but in
general means that a load will be followed by a write in the near
future.

With this new globally applicable flag, the ruby Sequencer class no
longer needs to check what the arch is, nor does it need to access ISA
private data in the request flags. Always doing this check should be no
less efficient than before, because checking the arch involved calling
into the system object, while checking the flag only requires masking a
bit on the flags which the compiler probably already has floating around
for other logic in this function.

Change-Id: Ied5b744d31e7aa8bf25e399b6b321f9d2020a92f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48710
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-09-05 05:29:27 +00:00
Gabe Black
1253c15ebe scons,python,sim: Eliminate a redundant member of EmbeddedPython.
The filename member was just a less specific version of the abspath
member, and can be replaced by it to simplify things a little.

Change-Id: I61b312f2c356045e03462159e3232ac717954669
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48365
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2021-09-05 04:22:26 +00:00
Gabe Black
95f9017c2e configs,python: Clean some cruft out of m5.objects.
SimObject is already available as m5.SimObject, and it doesn't make a
lot of sense to expose m5.internal.params, part of the internals of
gem5's python interface, as a peer to all the SimObject types.

Change-Id: I3030c1eb261877fd9648c9d3d73b7dbbd4c24345
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48364
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-05 04:21:56 +00:00
Gabe Black
9db4c91510 scons: Update the special module importer API.
In the SConscript, there is a special importer which enables importing
embedded code using various m5.* paths. This was implemented using an
API which has been deprecated and replaced in more recent versions of
python.

Change-Id: I5900f269af48befbcedcb9d25353f04f6297ce9d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48363
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
2021-09-05 04:21:28 +00:00
Bobby R. Bruce
1853d57dc3 misc: Revert "arch,cpu,mem,sim: Fold arch/locked_mem.hh..."
This reverts commit a3f85217ab,
https://gem5-review.googlesource.com/c/public/gem5/+/48384

The reason for reverting this commit is it causes the Nightly build to
timeout: https://www.mail-archive.com/gem5-dev@gem5.org/msg40344.html

The exact cause of this failure was a stalling with the O3 processor on
ARM. The simulation reaches the following error and repeats until
timeout:

```
build/ARM/arch/arm/isa.cc:2634: warn: context 0: 2136500000 consecutive store conditional failures
```

The "realview-o3-ARM-x86_64-opt" test can replicate this:

```
./main.py run -j8 --uid
SuiteUID:tests/gem5/fs/linux/arm/test.py:realview-o3-ARM-x86_64-opt
```

Change-Id: I9e9a20753c2a25c143e6a73f58716feb41861cde
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49927
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-04 04:37:49 +00:00
Melissa Jost
737cdd7397 arch-riscv: Fixed a bug in pmp.cc
This commit fixes an issue that allowed illegal accesses to the
pmpTable to take place.

Change-Id: If517d0d9579260a8dd8a8d2e0c673564a649a728
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49870
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Ayaz Akram <yazakram@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-03 16:54:56 +00:00
Gabe Black
526f5271d8 cpu: Switch std::variant out for std::any in IntResult.
This avoids having to explicitly list the types that the result can
hold, avoiding having to specify what the vector types are. Also, the
variant type always has enough space for the result no matter what type
it is. For the "any" type, implementations are encouraged to not
dynamically allocate storage for small values (and RegVal == uint64_t
probably qualifies). This means that for the common case, RegVal, the
amount of storage will be smaller, and only when we actually need space
to store a VecRegContainer, etc, will that actually be allocated.

Change-Id: I43bf8d1866b1538db7d91cd9f1e635df642dd2c9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49130
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-02 21:31:02 +00:00
Yu-hsin Wang
a670993522 arch-arm: add size check for AdvSIMD copy
imm5_pos and size are the output of findLsbSet. When imm5 is zero,
imm5_pos and size are 64 which will cause assert fail in the following
bits calls. We detect this case and return an Unknown instruction.

Change-Id: I4ed2513267fff5b5bdb81723617ff74fb9f82482
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49827
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-02 00:51:11 +00:00
Gabe Black
c4852b35dd arch-arm: Remove pointless makeSPs and makeZeros around fixed idxs.
In a few places, the makeSP helper function was being called on a fixed
register index, INTREG_SPX. That method would always return INTREG_SPX,
so this call was pointless.

Similarly, there were calls to makeZero on the fixed index INTREG_X31
which would return INTREG_ZERO.

It's not clear what the intention of this code was, so this change
simply removes the pointless calls, and makes it clearer what value is
actually being used by the instructions.

Change-Id: I604f013430f180566e1cc44939b145bc5f45f637
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49763
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
2021-09-01 06:04:38 +00:00
Yu-hsin Wang
41093df363 fastmodel: export CortexR52 reset and halt signals
Change-Id: I44a26bad1a91009dbef586ab5d8eeee60352d51e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49651
Reviewed-by: Earl Ou <shunhsingou@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-01 04:47:54 +00:00
Yu-hsin Wang
f771ed96d7 fastmodel: export CortexR52 ext_slave port
Change-Id: I38788d934424cf264152fc689a3e48b84733f068
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49650
Reviewed-by: Earl Ou <shunhsingou@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-01 04:47:54 +00:00
Yu-hsin Wang
552b93168a fastmodel: add helper class for exporting amba_pv signal
To bridge amba_pv::signal_master_port<bool> with IntPins, we made a
helper class for the purpose. The SignalSender class can be exported as
a gem5 Port, receive the signal, and transfer to fastmodel.

Here's an example showing how it works

*.lisa
```
component
{
  slave port<Signal> reset;
}
```

evs.hh
```
class
{
  SignalSender reset;
}
```

evs.cc
```
constructor(Params &p) : reset(p.name + ".reset", 0)
{
  reset.signal_out.bind(Base::reset);
}

getPort
{
  return reset;
}
```

Change-Id: I0936f9ebb2cd60e975661ae78e590285da697771
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48943
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-01 04:47:47 +00:00
Gabe Black
ab6a7a0bab scons: Get rid of some unused or unnecessary PySource members.
These were either not used at all, or were unnecessary since they, for
instance, were used to name a variable in an anonymous namespace where
the actual name is hidden and largely irrelevant.

Change-Id: I738960cf0d84017ccc133428aef56701c1d40b03
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48139
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-08-31 23:46:00 +00:00
Gabe Black
c3d4951ef2 util: Expand the valgrind suppressions file to the entire libpython.
Suppress any valgrind error from *anywhere* in the libpython library.
There are ***many*** false positives in the python library, making the
output of valgrind almost useless without lots of suppressions. Rather
than suppress each error piecemeal, we can suppress any error which
originates in libpython to cover them all.

There will now be corner cases where a bug in gem5 causes some sort of
illegal access, etc, within the python library itself, but these sorts
of interactions/errors should be very rare. Suppressing the fountain of
false positives coming from libpython makes valgrind useable in general,
which IMO is a very worthwhile tradeoff.

Change-Id: I4869eeeb4aef5884ad52025b52c9616e0541f3e6
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49530
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-08-31 23:45:38 +00:00
Gabe Black
dd59da928d arch-arm: For semihosting, mask reg value and not index.
In ArmSemihosting::call64, the *index* of X0 was masked to be 32 bits (a
noop), and then read using the TC, where I'm pretty sure what was
intended was to read the value and then mask what was returned.

Change-Id: I66cb845d4e97b1895072bd98de709256625c8e3f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49762
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-08-31 23:45:00 +00:00
Gabe Black
cd27e47558 arch-arm: Eliminate the INTREG_DUMMY integer register.
This register index was for an integer register which was just something
to return when the result should be thrown away. That's basically what
the zero register is/could already be used for. Replace INTREG_DUMMY
with INTREG_ZERO.

Also, change the type used for an index in SVE memory instructions from
IntRegIndex to RegIndex, since it's not actually storing an integer
register index, and g++ gets upset when you try to compare one against a
value which is out of range for that enum.

Change-Id: Ibdc488a2b55162a5f9e3d355126f6c48a99272a9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49223
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-08-31 14:42:50 +00:00
Gabe Black
a3f85217ab arch,cpu,mem,sim: Fold arch/locked_mem.hh into the BaseISA class.
Turn the functions within it into virtual methods on the ISA classes.
Eliminate the implementation in MIPS, which was just copy pasted from
Alpha long ago. Fix some minor style issues in ARM. Remove templating.
Switch from using an "XC" type parameter to using the ThreadContext *
installed in all ISA classes.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-1053

Change-Id: I19ee3a8fbe50a4d7907029c2dd2796d0e98e965f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48384
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-08-31 11:17:32 +00:00
Nathanael Premillieu
d5b72485f5 misc: advertise auto-compress debug output
By appending .gz to the --debug-file debug output filename, it get automatically
compressed while being written.
Advertise this feature in the --debug-file option help

Change-Id: I7a4696bc288a1f5ad9f47c6f8a2359b06b134d6f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49670
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-08-31 07:45:30 +00:00
Nicolas Boichat
63c53e21fe base: Add SOCK_CLOEXEC when creating/accepting sockets
Prevents any forked process (e.g. diod) from holding on the sockets
if gem5 crashes.

This flag is only supported on Linux, so we stub it out on other
platforms.

Test: ls -l /proc/$DIOD_PID/fd shows a lot less fds.
Change-Id: I6bc195ed3bd638ab28ff7690f43afce030fa28c7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48623
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-08-31 00:15:33 +00:00
Gabe Black
8b3565d507 scons: Stop caching the first version of object files.
Don't cache the first version requested of object files to use for
subsequent requests. This was originally put in place to avoid an error
when object files could be built with trivially different command lines,
ie command lines which are technically different but not in a
necessarily meaningful way, or less seriously a warning when the command
lines were the same.

The warning was disabled in an earlier change, and the error was avoided
by using a different object file suffix when building unit tests.

This helps avoid bugs if the object files actually *would* turn out to
be different in a meaningful way based on the flags used, and simplifies
the build.

Change-Id: I6b90e6e36b13adb73e587bb8fc533984f764d95a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48138
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-08-28 12:25:41 +00:00
Gabe Black
8317146103 scons: Get rid of special handling of the _m5 package.
This package is handled specially by the DictImporter used during the
build, and an assert shows that that code is never actually used. That
makes sense, since _m5 won't be added to gem5 using the PySource
mechanism.

Change-Id: I36a39f1ebb94a7620c8ba296e0fe856bd33285f9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48362
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-08-28 04:20:43 +00:00
Gabe Black
9fa9840691 scons: Turn the Blob method into a builder.
Build the blob .cc and .hh files in the same directory as the file
they're based off of. Move the GDB XML files into the arch directories
they go with.

Change-Id: I12fe48873312c3aba5910989d6e3049ebd5e5bbf
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48136
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-08-28 04:19:40 +00:00
Gabe Black
18fb295bcd sim: Explicitly specify the namespace of serialization helpers.
That makes them work when not calling from the gem5 namespace.

Change-Id: If238d837f91d2c1b8ca58c9c3e08aed8cb0af28a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49619
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-08-28 04:18:12 +00:00
Gabe Black
6f493b9173 systemc: Stop including mem/port.hh from the systemc headers.
The systemc headers are supposed to be hermetic, so that they can be
included from generic systemc code without any dependency on the gem5
code base, at least when the systemc components are compiled, outside
of those header files themselves. It should be possible to copy the
"ext" directory out of the tree and make it available to systemc code,
and that code should be compileable.

Change-Id: Iec16a534ac04c7895cd8a30940b0acf64c257dde
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49618
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
2021-08-28 04:18:12 +00:00
Gabe Black
28314ace87 fastmodel: Fix for the new gem5 namespace.
Change-Id: Iacb6291e6ee93aecf5208d283eab9c1b5938bb2b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49617
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-08-28 04:18:12 +00:00
Gabe Black
548987217f mem,base: Fix signed/unsigned comparison warnings/errors.
Change-Id: Icf477f4b0c162f0174216e511960d0e76db313ae
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49616
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-08-28 04:18:12 +00:00
Gabe Black
4a20df608e scons: Use a different suffix for test object files.
These files are built with a different command line, and so should be
distinct build artifacts in the build directory.

Change-Id: Iec9403ad73fbdbcb1cd268d68716c3aa85a80b24
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48137
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2021-08-25 14:35:47 +00:00