gernhard2
f11adf51dc
Relocated the python scripts. They now live in the analyzer directory and are deployed to the output folder when building the analyzer.
...
Major change to simulation logic in dramSys: Commands in a transaction are now scheduled one at a time, instead of
scheduling a whole transaction at once. Since single commands (e.g. Pre or Act) are not that long, refreshes are allowed to be delayed
to allow a command to finsh. Consequently, the whole loop in the ControllerCore about trying to scheduleding a transaction and aborting it when
it collides with a refresh could be ommitted. Lastly, Fifo_Strict has been added, which is a Fifo Scheduler that forces the read and write transactions, even
between different banks to be executed in order. Fifo and FR_FCFS have been modified to fit into the new scheduling logic.
2015-02-16 08:21:27 +01:00
Matthias Jung
1c7643b9b6
Changed analysis scripts
2014-09-04 15:35:01 +02:00
Matthias Jung
ea64dd8cea
Mapping will automatically generated
2014-08-07 15:16:40 +02:00
Matthias Jung
fbf79645aa
Added some new metric scripts and Trace analysys tools
2014-08-07 13:36:27 +02:00
Matthias Jung
dc96ffd052
metrics: memory utilization
2014-08-04 13:02:52 +02:00
Matthias Jung
d402933502
New metric "memory utilization" defined
2014-07-29 16:21:07 +02:00
robert
5ec15f0ccf
merged
2014-06-16 17:43:22 +02:00
robert
4760ec4a5b
adressmappings
2014-06-16 17:41:47 +02:00
Matthias Jung
8ed200dfa3
New metric script that plots a histogram, prerequisites install script added
2014-05-28 14:35:45 +02:00
robert
c74b544f3e
...
2014-05-10 13:02:55 +02:00
Matthias Jung
00f95b1587
timeout pdn (state: not runnning yet)
2014-05-05 23:24:36 +02:00
robert
cb16bd3a8a
changed simulation recorder to record filenames of memspec and memconfig
2014-05-05 10:37:59 +02:00
robert
b75366edda
addressmapping for ddr4
2014-04-20 22:16:32 +02:00
robert
354c871047
changed metrics
2014-04-20 17:28:05 +02:00
robert
c501985573
fixed bug in testscript
2014-04-19 14:26:50 +02:00
robert
b074e3777d
simulation config can now be passed as a argument to the console program
2014-04-16 10:52:00 +02:00
robert
afc218b2b0
all test are running for real now. And its only 3 am
2014-04-14 03:10:54 +02:00
robert
522eededc2
all tests are running
2014-04-14 03:01:11 +02:00
robert
0a7829d0ad
Changed constraints in all checkers to be generic for wideIO and ddr4
2014-04-14 02:41:04 +02:00
robert
856db2fde8
merged
2014-04-13 11:54:01 +02:00
robert
e354fb5652
added recording of memconfig, memspec. Tests use the memconfig in a trace for the timing
2014-04-13 11:01:21 +02:00
robert
8bc3293dcb
relocated getBankgroup function
2014-04-11 12:42:49 +02:00
robert
27e00659fa
changed simulation manager
2014-04-10 01:06:04 +02:00
robert
76ebfb2dd8
added par_bs
2014-04-10 00:04:38 +02:00
robert
abb3694391
recording data strobe information now
2014-04-09 16:53:11 +02:00
robert
15944fe743
checkers, added RDA/WRA support, changed default time unit to PS
2014-04-08 23:12:11 +02:00
robert
c1841e4102
corrected checkers for non-interleaving reads/writes. Added burst length to db. Added burst functionally to players
2014-04-07 20:07:44 +02:00
robert
4d3de95225
new metrics
2014-04-02 23:13:02 +02:00
robert
e930002e5c
corrected two act window
2014-03-31 12:05:05 +02:00
robert
75a5dca81e
all constraints implemented
2014-03-30 12:52:12 +02:00
Janik Schlemminger
32b11654ce
traces
2014-03-27 16:46:34 +01:00
Janik Schlemminger
62590e97e2
resources folder
2014-03-27 16:32:13 +01:00
