e9643e7938
Fix issue with stack id
2025-03-03 16:58:51 +01:00
76e8dba113
Do not align address to minimum burst length
2025-02-26 17:10:11 +01:00
5b76e52cd4
Do not create empty database file when it does not exist
2025-02-26 09:28:36 +01:00
6861576550
Implement tCCDR for HBM2 and fix bug with SID
2025-02-21 14:18:30 +01:00
b9fc47d1fe
When project is top-level, force C++17
2025-02-13 11:14:55 +01:00
Lukas Steiner
f223e6c500
Merge branch 'feat/hbm3_sid' into 'develop'
...
Feat/hbm3 sid
See merge request ems/astdm/modeling.dram/dram.sys.5!96
2025-01-28 09:04:16 +00:00
e57ce9cc86
Use controller clock as interface clock in initiators
2025-01-24 15:55:40 +01:00
581794b970
Allow responses to be sent back-to-back
2025-01-24 14:58:06 +01:00
ba94d9fd84
Have a one cycle END_RESP delay in the standard initiator
2025-01-24 14:43:06 +01:00
0a478dbdc5
Issue a warning if ThinkDelayFw is 0
2025-01-24 14:18:40 +01:00
007c55e878
Use think delay as miminum END_REQ delay
...
When the controller accepts requests in the same clock cycle as it
handles them, undeterministic simulations can occur as the outcome
depends on if the new request is accepted before the controllerMethod
is called or not.
Therefore, a minimum delay of one clock cylce should be used to always
handle request only in the next clock cycle, removing the disambiguity.
2025-01-24 14:18:39 +01:00
Lukas Steiner
1b50709591
Merge branch 'feat/new_checkers' into 'develop'
...
Use new timing checkers
See merge request ems/astdm/modeling.dram/dram.sys.5!95
2025-01-17 14:23:24 +00:00
d71e649447
Fix the verification of generator parameters
...
Also, clamp the read write ratio instead of generating an error
2025-01-14 14:55:11 +01:00
7a8633d36e
Implement stack ID for HBM3
2025-01-13 15:36:05 +01:00
ed709b82d4
Integrate new Timing Checker
2025-01-13 10:24:08 +01:00
marcomoerz
5b52015c75
changed namespace
...
DRAMSys::DRAMPower to DRAMPower::DRAMPower
2025-01-10 14:08:50 +01:00
83cc41e318
Minor refactorings of CMakeList files
2025-01-09 08:12:49 +00:00
6d6c8c595f
Clean up private/public linking
2024-12-20 17:40:16 +01:00
ffc94a73cb
Update dependency versions
2024-12-20 17:40:15 +01:00
e2342350d0
Minor improvements on package handling
2024-12-20 17:40:15 +01:00
c3eb5e6a62
Hide the use of FetchContent behind a flag
...
FetchContent is now disabled by default, when the project is included as
an subproject by another top-level project.
Also, every usage of FetchContent is behind a separate flag to enable and
disable the usage with granular control.
2024-12-20 17:40:15 +01:00
ca9ef16d0d
Remove unnecessary project() calls
...
project() should only be called if the subdirectory, in fact, can be
built standalone.
2024-12-20 17:40:15 +01:00
e1b8bbf12d
Clean up and refactor CMakeLists
2024-12-20 17:40:15 +01:00
91a09ad771
Use FindQwt.cmake script
2024-12-20 17:40:15 +01:00
ac69d25003
Fix CMake deprecation warning
2024-12-20 17:40:15 +01:00
a37171c6fd
Remove file globs from CMakeLists
...
Fix build
2024-12-20 17:40:15 +01:00
703ee81d7e
Introduce SimulationTime config
...
Use SimulationTime to forcefully stop simulation at a specified point in
time.
2024-12-10 10:04:59 +01:00
Lukas Steiner
be1807e9b0
Merge branch 'fix/buffer_entries' into 'develop'
...
Fix/buffer entries
Closes #64
See merge request ems/astdm/modeling.dram/dram.sys.5!86
2024-11-29 10:34:09 +00:00
Lukas Steiner
01caf7875e
Merge branch 'fix/bandwidth' into 'develop'
...
Fix for bandwidth calculations with pseudo-channels
See merge request ems/astdm/modeling.dram/dram.sys.5!87
2024-11-29 08:48:37 +00:00
f960f499c6
Improve TA performance by increasing window of loaded transactions
2024-11-18 13:48:06 +01:00
e409bab47a
Implement pseudo-channel and rank specific BW information
2024-11-18 13:18:33 +01:00
e74a617273
Crude fix for bandwidth calculations with pseudo-channels
2024-11-15 15:57:37 +01:00
18c00fc363
Pass a number of required buffer entries to hasBufferSpace()
2024-11-15 14:17:03 +01:00
ad1ea86d2e
Fix the data burst location when a think delay is set
2024-11-05 11:04:24 +01:00
7a32613cb3
Switch to <filesystem> remove operation
2024-09-25 11:00:09 +02:00
2465f06d14
Minor fixes in the Trace Analyzer
2024-07-18 10:16:36 +02:00
82027bfa83
Move Trace Analyzer to open source tree
...
Move the code for the Trace Analyzer to the open source tree and only
keep the extensions behind a compiler flag.
2024-07-18 10:13:25 +02:00
Lukas Steiner
3d9d12ea65
Merge branch 'buffer_warning' into 'develop'
...
Add a warning when RequestBufferSize is configured together with ReadWrite SchedulerBuffer
See merge request ems/astdm/modeling.dram/dram.sys.5!67
2024-07-18 07:49:40 +00:00
5dd7c22a74
Refactor CMakeLists and GitLab CI/CD pipeline
...
- Remove nested minimum required to supress warnings.
- Declare SystemC as system library to supress warnings in headers.
- Add a BUILD_SHARED_LIBS option
- Remove hardcoded STATIC in various add_library calls to honor the
BUILD_SHARED_LIBS option
- Remove _deps/ directory from the build directory in GitLab pipeline
- Remove *.tdb files after test stage in pipeline
- Set Ninja as the default generator for the dev preset and re-enable
colored diagnostics
2024-06-28 11:07:56 +02:00
7274770a0f
Add a warning when RequestBufferSize is configured together with ReadWrite SchedulerBuffer
2024-05-08 10:09:20 +02:00
Lukas Steiner
5b4ed9559d
Merge branch 'config_refactor' into 'develop'
...
Configuration Refactoring
See merge request ems/astdm/modeling.dram/dram.sys.5!63
2024-02-23 14:29:06 +00:00
0ec6ea79ad
Migrate from clkMhz to tCK entry in memspecs
2024-02-23 12:04:22 +01:00
1a2e5497ee
Fix AddressDecoderTest
2024-02-23 11:59:50 +01:00
3925c5be55
Remove unused ReorderBuffer
2024-02-23 11:54:51 +01:00
59cf73fe9c
Clean up public API (DRAMSys.h)
...
Remove DRAMSysRecordable.h/cpp as the functionality has been incorporated into
DRAMSys.h/cpp. The databaseRecording config is now completely handled by
DRAMSys itself without needing the user of the library to instanciate DRAMSys
or DRAMSysRecordable depending on this config.
2024-02-23 11:54:51 +01:00
5391b4351d
Fix configuration tests
2024-02-23 11:54:51 +01:00
454cb00ddb
Refactor: remove monolithic configuration class
2024-02-23 11:54:51 +01:00
d92ea325c3
Remove ControllerIF.h
...
It provided no advantage and made things unecessary complicated
2024-02-23 11:49:08 +01:00
Lukas Steiner
5eabecc9f9
Merge branch 'odr_fix' into 'develop'
...
Fix ODR violation of Dram and DramRecordable
See merge request ems/astdm/modeling.dram/dram.sys.5!64
2024-02-23 09:05:50 +00:00
Lukas Steiner
c7a4e31f2f
Merge branch 'work/addressdecoder' into 'develop'
...
Add support for arbitrary XOR address manipulation
See merge request ems/astdm/modeling.dram/dram.sys.5!60
2024-02-23 08:33:59 +00:00
