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6bbc348b8a4c1a98a1fbf63b6b3f62adab030d8a
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Author SHA1 Message Date
Derek Christ
6bbc348b8a Make the lines of the TraceAnalyzer more dynamic 
This commit is a preparation for the upcoming feature that will make
dynamically rearranging the lines of the TracePlot possible. Most
importantly the y-values of the lines in the TraceDrawingProperties
class aren't statically defined any more and can already be rearranged
as wanted in the code.
 2021-06-29 10:37:01 +02:00
Lukas Steiner
0141bde845 Merge branch 'size_fix' into 'develop' 
Code refactoring.

See merge request ems/astdm/dram.sys!292
 2021-06-16 14:26:13 +00:00
Lukas Steiner
a18d3b75f6 Code refactoring. 2021-06-16 10:25:22 +02:00
Lukas Steiner
123f7388b2 Do not use const references for nlohmann json objects. 2021-06-16 09:28:18 +02:00
Lukas Steiner
9b135948e6 Code formatting. 2021-06-15 18:48:57 +02:00
Lukas Steiner
1cf97f7187 Code refactoring. 2021-06-15 18:11:45 +02:00
Lukas Steiner
66f72c88b6 Code refactoring. 2021-06-15 17:21:08 +02:00
Lukas Steiner
842b34107b Allow positive floats as frequency for traffic initiators. 2021-06-15 14:26:26 +02:00
Lukas Steiner
b0a4356874 Merge branch 'size_fix' into 'develop' 
Fix size calculation in memory specification.

See merge request ems/astdm/dram.sys!291
 2021-06-14 14:06:55 +00:00
Lukas Steiner
bfd16317d2 Move memory config report to constructor, fix size calculation. 2021-06-14 15:01:24 +02:00
Lukas Steiner
ca874e0320 Merge branch 'work/traceanalyzer_rankfolding' into 'develop' 
Add a scroll bar for TraceAnalyzer & make ranks collapsible

See merge request ems/astdm/dram.sys!290
 2021-06-14 12:04:38 +00:00
Derek Christ
6574e6855c Update authors in TraceAnalyzer 2021-06-14 13:28:57 +02:00
Lukas Steiner
fc91a41781 Merge branch 'work/tracegenerator' into 'develop' 
Update readme to reflect new traffic generator changes.

See merge request ems/astdm/dram.sys!289
 2021-06-14 09:17:19 +00:00
Derek Christ
f626badc54 Make ranks collapsible in TraceAnalyzer 
All individual ranks in the TraceAnalyzer are now collapsible, making it
easier to display simulation results with many ranks.
 2021-06-14 10:14:16 +02:00
Derek Christ
b2345be678 Add a scroll bar for TraceAnalyzer 
A scroll bar was added to the TraceAnalyzer to prepare for the upcoming
changes of collapsing/folding ranks to increase readability when many
ranks are displayed. The scroll bar is hidden up to a number of 25 rows
in the TracePlot.
 2021-06-14 09:42:20 +02:00
Lukas Steiner
6b145feb8b Bugfix: Initialize vectors in DDR5 checker properly. 2021-06-09 10:12:05 +02:00
Derek Christ
9c927f4dd7 Update readme to reflect new traffic generator changes. 
The readme was updated to reflect the new json configuration parameters
for the traffic generator.
 2021-06-02 10:54:46 +02:00
Lukas Steiner
8275fb26f3 Merge branch 'database_fixes_2' into 'develop' 
Database fixes and improvements

See merge request ems/astdm/dram.sys!288
 2021-06-01 13:08:39 +00:00
Lukas Steiner
486b37a3ec Add assert statement for END phases. 2021-06-01 14:05:43 +02:00
Lukas Steiner
eefbbb5235 Simplify trace recording. 2021-06-01 11:58:53 +02:00
Lukas Steiner
9949c36f83 Use separate thread for database creation. 2021-06-01 11:11:40 +02:00
Lukas Steiner
d6b8e73827 Change type of command from enum to class. 2021-05-31 15:19:48 +02:00
Lukas Steiner
57c62ccc87 Terminate and record last transaction of simulation. 2021-05-31 14:15:07 +02:00
Lukas Steiner
834e10efde Code refactoring. 2021-05-28 16:01:22 +02:00
Lukas Steiner
d023ebf128 Merge branch 'DDR5_PD_prep' into 'develop' 
Prepare for DDR5 power down (2).

See merge request ems/astdm/dram.sys!287
 2021-05-27 12:10:50 +00:00
Lukas Steiner
3617c66ad1 Merge branch 'work/tracegenerator' into 'develop' 
Implement a more advanced TraceGenerator (2).

See merge request ems/astdm/dram.sys!284
 2021-05-27 08:28:07 +00:00
Lukas Steiner
dd5707ec3e Small bugfix in TrafficInitiator, code refactoring. 2021-05-27 10:20:37 +02:00
Lukas Steiner
38fbf9f63a Let power down manager check state of bank machines. 2021-05-20 18:24:04 +02:00
Lukas Steiner
c015a73e91 Code refactoring. 2021-05-20 17:42:12 +02:00
Lukas Steiner
2256d03c58 Code refactoring. 2021-05-20 16:19:31 +02:00
Lukas Steiner
1b58c916b0 Code refactoring. 2021-05-20 15:56:41 +02:00
Lukas Steiner
dda39ac4ef Revert changes from previous commit. 2021-05-19 15:34:14 +02:00
Derek Christ
73d767c6f0 Set dataLength in TrafficGenerator to bytesPerBurst MemSpec 2021-05-19 15:23:55 +02:00
Lukas Steiner
ff265a8a95 Trigger power down interruption outside of refresh manager. 2021-05-19 14:03:13 +02:00
Derek Christ
6d6c1f7699 Merge remote-tracking branch 'origin/develop' into work/tracegenerator 2021-05-19 11:53:11 +02:00
Derek Christ
1d5bd72c60 Apply minor changes to TrafficInitiator and TrafficGenerator 2021-05-19 11:37:05 +02:00
Lukas Steiner
49838ea7d8 Merge branch 'STT-MRAM' into 'develop' 
Add STT-MRAM standard.

See merge request ems/astdm/dram.sys!283
 2021-05-19 08:44:46 +00:00
Lukas Steiner
dbe76bd906 Remove comments from memspec file. 2021-05-19 09:41:45 +02:00
Lukas Steiner
d4609ff669 Rename copyright notice. 2021-05-19 09:34:30 +02:00
Lukas Steiner
4d8d5caf72 Add STT-MRAM copyright notice. 2021-05-19 09:32:32 +02:00
Lukas Steiner
cb4455710d Add config files for STT-MRAM. 2021-05-17 15:51:55 +02:00
Lukas Steiner
77b79aac13 Initial version of STT-MRAM. 2021-05-17 14:03:34 +02:00
Lukas Steiner
08f0331a06 Merge branch 'develop' into 'STT-MRAM' 
Merge latest updates.

See merge request ems/astdm/dram.sys!282
 2021-05-17 11:48:00 +00:00
Lukas Steiner
99694d37cd Merge branch 'BL32_OTF' into 'develop' 
Add OTF burst length selection for DDR5.

See merge request ems/astdm/dram.sys!281
 2021-05-17 11:45:02 +00:00
Derek Christ
fdacb97c9b Update authors in TrafficInitiator sources 2021-05-17 10:42:03 +02:00
Derek Christ
119c4b8929 Restructure class hierarchy for TrafficInitiators 
The hierarchy for all TrafficInitiators was reorganized into a
more general structure. All TracePlayers and TrafficGenerators
inherit from the TrafficInitiator class.
The classes TrafficGeneratorSequential and TrafficGeneratorRandom
both inherit from the TrafficGenerator class and the StlPlayer
inherits from the TracePlayer class.
 2021-05-17 10:41:56 +02:00
Derek Christ
1a7450386d Remove redundant TracePlayer member variables 2021-05-17 10:24:31 +02:00
Derek Christ
71551db4e3 Implement a more advanced TraceGenerator 
Implementation of a more advanced TraceGenerator that can be
configured using the Json config file.
The new TraceGenerator is capable of specifing the number of
requests to make, the ratio of read and write accesses, the
distribution of the addresses, the address increment value in
case of a sequential address distribution, a seed in case of
a random address distribution and the maximum number of
pending read or write requests.
The maximum number of pending requests was also implemented
for the StlPlayer.
 2021-05-17 10:21:19 +02:00
Lukas Steiner
d84a065087 Small improvements in DDR5 checker. 2021-05-12 16:10:04 +02:00
Lukas Steiner
7e05226f8c Add blocked interval for dummy CAS commands to DDR5 checker. 2021-05-11 17:33:46 +02:00