Lukas Steiner
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2e4be049ac
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Add hazard warning, const members.
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2022-04-06 14:46:40 +02:00 |
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Lukas Steiner
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b4c70b3e92
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Merge branch 'bug/missing_config' into 'develop'
Add missing config parameters, fix BM issue.
See merge request ems/astdm/modeling.dram/dram.sys!352
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2022-04-06 12:09:45 +00:00 |
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Lukas Steiner
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bd60e8c8dd
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Remove config singleton.
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2022-04-06 13:55:43 +02:00 |
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Lukas Steiner
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917d8dacc4
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Pointer to reference.
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2022-04-06 11:31:42 +02:00 |
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Lukas Steiner
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576691cd65
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Adapt BM to avoid ACT without RD/WR.
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2022-04-04 16:46:01 +02:00 |
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Lukas Steiner
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9c9b31416d
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Add missing config parameters.
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2022-04-04 15:37:50 +02:00 |
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Iron Prando da Silva
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319b774509
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Added LPDDR5. Not tested.
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2022-04-04 11:31:42 +02:00 |
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Lukas Steiner
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c14e00dd47
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Merge branch 'work/traceanalyzer_pseudochannel' into 'develop'
Seperated Data Bus for PseudoChannelMode
See merge request ems/astdm/modeling.dram/dram.sys!351
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2022-04-04 09:28:18 +00:00 |
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Lukas Steiner
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1bda9f7dd4
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Fix metrics for HBM PC mode.
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2022-04-04 10:54:08 +02:00 |
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fac18ed81b
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Adapt GeneralInfo to new pseudoChannelsPerChannel parameter
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2022-04-01 18:06:15 +02:00 |
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2d310789f1
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Seperated Data Bus for PseudoChannelMode
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2022-04-01 17:54:39 +02:00 |
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Lukas Steiner
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4b59b5a4a7
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Merge branch 'work/traceanalyzer_rowmodel' into 'develop'
Introduce a model/view based approach for the TraceSelector
See merge request ems/astdm/modeling.dram/dram.sys!324
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2022-04-01 12:12:37 +00:00 |
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Lukas Steiner
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4346fc72cb
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Adapt metric for separate command buses.
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2022-03-31 17:02:02 +02:00 |
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Iron Prando da Silva
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193726c04a
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Rebasing on develop.
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2022-03-24 11:25:39 +01:00 |
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Iron Prando da Silva
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6d3daac1f9
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Corrected pools time tracking.
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2022-03-24 10:46:29 +01:00 |
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Iron Prando da Silva
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5e147dcd24
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Removed incorrect if check for pool dependency. TODO correct pool time dependency direction.
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2022-03-24 10:46:29 +01:00 |
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Iron Prando da Silva
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ea736e5861
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Added 'bank in group' granularity for ddr5.
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2022-03-24 10:46:29 +01:00 |
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Iron Prando da Silva
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c00b54329a
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Renamed some objects from suffix IF to suffix Base. Added a small readme to the 'dramTimeDependencies' folder.
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2022-03-24 10:46:29 +01:00 |
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Iron Prando da Silva
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6850cd1422
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Added copyright notice.
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2022-03-24 10:46:29 +01:00 |
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Iron Prando da Silva
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866ccd7764
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Modified DDR5 to comply with time checker.
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2022-03-24 10:46:29 +01:00 |
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Iron Prando da Silva
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addb7aae31
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Added DDR5 dependencies. Must be double checked.
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2022-03-24 10:46:29 +01:00 |
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Iron Prando da Silva
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9eda19eb00
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Added LPDDR4 dependencies.
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2022-03-24 10:46:29 +01:00 |
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Iron Prando da Silva
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20f783ad38
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Added HBM2 dependencies.
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2022-03-24 10:46:29 +01:00 |
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Iron Prando da Silva
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3a0f56f2b2
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Removed throw from ConfigurationFactory::possiblePhases.
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2022-03-24 10:46:29 +01:00 |
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Iron Prando da Silva
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6393eafb8f
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Added re-prepare of queries to eliminate 'parameter mismatch' exception.
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2022-03-24 10:46:29 +01:00 |
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Iron Prando da Silva
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c2508a6681
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Adding time keeping for dependencies tracker.
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2022-03-24 10:46:29 +01:00 |
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Iron Prando da Silva
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8ed42d62f2
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Corrected time dependency filtering with StringMapper. Added DDR4 dependency tracking.
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2022-03-24 10:46:28 +01:00 |
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Iron Prando da Silva
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d0ecbb7835
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Added DDR3 generated dependencies.
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2022-03-24 10:46:28 +01:00 |
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Iron Prando da Silva
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b2581bbce3
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Refactored string comparisons out of the main loop.
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2022-03-24 10:46:28 +01:00 |
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Iron Prando da Silva
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bf1641e80a
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Corrected dependency drawing of PREAB and REFA.
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2022-03-24 10:46:18 +01:00 |
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Iron Prando da Silva
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7e7b2097f9
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Refactoring and command bus pooling.
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2022-03-24 10:46:18 +01:00 |
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Iron Prando da Silva
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8c3f4349ba
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Refactored PoolControllerMap.
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2022-03-24 10:46:18 +01:00 |
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Iron Prando da Silva
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8ad9cb05f7
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Added more DependencyType enumerators.
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2022-03-24 10:46:05 +01:00 |
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Iron Prando da Silva
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a9e3f54bd3
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Finished refactoring.
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2022-03-24 10:46:05 +01:00 |
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Iron Prando da Silva
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b0a22ba133
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Organizing files.
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2022-03-24 10:46:05 +01:00 |
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Iron Prando da Silva
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e3f6093358
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Started refactoring for dependency calculation skipping.
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2022-03-24 10:45:44 +01:00 |
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Iron Prando da Silva
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9ec3e323f6
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Added using namespace std to dependency source file.
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2022-03-24 10:45:44 +01:00 |
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Iron Prando da Silva
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06d083752e
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Removed unused variables.
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2022-03-24 10:45:44 +01:00 |
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Iron Prando da Silva
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ee3bea7f92
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Added auxiliar class for multiple activate window pool capturing.
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2022-03-24 10:45:44 +01:00 |
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Iron Prando da Silva
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922b77820e
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Renamed variable clk to tCk.
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2022-03-24 10:45:23 +01:00 |
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Iron Prando da Silva
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2bf1d9a305
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Corrected rainbow transaction color selection indicator.
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2022-03-24 10:45:23 +01:00 |
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Iron Prando da Silva
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11bc43739d
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Added InterRank variable for skip checking when phases are within the same rank.
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2022-03-24 10:45:23 +01:00 |
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Iron Prando da Silva
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bd1f7b5586
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Corrected 'unable to fetch row' exception after removing dependencies database, reopening file and calculating new dependencies.
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2022-03-24 10:45:23 +01:00 |
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Iron Prando da Silva
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6d7a172605
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Added copyright message to files.
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2022-03-24 10:45:23 +01:00 |
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Iron Prando da Silva
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9d6ceca4fc
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Changed command bus dependencies to Inter-Rank.
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2022-03-24 10:45:23 +01:00 |
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Iron Prando da Silva
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f5f4d38b70
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Added interface for dependency calculation.
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2022-03-24 10:45:23 +01:00 |
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Iron Prando da Silva
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6e569ebe11
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Added main calculation loop and other modifications and corrections. Still missing table data storing and test.
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2022-03-24 10:43:31 +01:00 |
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Iron Prando da Silva
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06e6cbf7d8
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Started adding manual code for DDR3 time dependencies.
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2022-03-24 10:41:30 +01:00 |
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Iron Prando da Silva
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96cd0e1f58
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Added stl map QString comparator.
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2022-03-24 10:40:28 +01:00 |
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Iron Prando da Silva
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5d2e48b403
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Finished interface class for auto-generated time dependencies code.
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2022-03-24 10:40:28 +01:00 |
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