Commit Graph

226 Commits

Author SHA1 Message Date
Éder Ferreira Zulian
1cb13725e2 Text enhanced. 2015-04-21 15:58:28 +02:00
Éder Ferreira Zulian
ffb8f38a9a Added more information about configuration files. 2015-04-21 15:51:07 +02:00
Éder Ferreira Zulian
ed4b406954 Readme file improved but not yet finished.
Added *.swp (vim swap files extension) to gititnore.
2015-04-21 14:41:14 +02:00
Éder Zulian
381a26fed7 fixed hardcoded configuration in main.cpp 2015-04-21 11:24:19 +02:00
Matthias Jung
5cd24dc0fd Merge branch 'ehses-master' 2015-04-09 10:33:54 +02:00
Matthias Jung
e1a7f1a0a5 removed namespace core 2015-04-09 10:33:25 +02:00
Matthias Jung
7f67a82287 added error model to the configs 2015-04-09 10:33:02 +02:00
Matthias Jung
0f8ad59a1e Merge branch 'master' of https://git.rhrk.uni-kl.de/ehses/dram.vp.system into ehses-master
Conflicts:
	dram/dramSys/dramSys.pro
2015-04-09 10:32:06 +02:00
Matthias Jung
268e839472 small changes in the metrics 2015-04-09 10:07:30 +02:00
Peter Ehses
2a587436d9 Fixed small bug 2015-04-09 10:01:27 +02:00
Peter Ehses
ce86b532c3 small changes and comments 2015-03-25 14:21:37 +01:00
Matthias Jung
836bacc76f fixed overflow bug in StlPlayer 2015-03-23 13:40:24 +01:00
Robert Gernhardt
5fcd57a4e2 Fixed error in refresh manager and in backpressure release codepath 2015-03-23 08:45:25 +01:00
root
fe8ff6242d bugfix of robert deadlock? 2015-02-23 17:12:17 +01:00
root
a5492a84d8 Merge branch 'master' of https://git.rhrk.uni-kl.de/EIT-Wehn/dram.vp.system 2015-02-17 22:48:10 +01:00
root
cffd844aaf removed space 2015-02-17 22:46:31 +01:00
Matthias Jung
51f9a7f53f test for in order check 2015-02-17 22:45:20 +01:00
Matthias Jung
aa615dae63 Merge branch 'master' of git.rhrk.uni-kl.de:EIT-Wehn/dram.vp.system 2015-02-17 21:52:39 +01:00
Matthias Jung
c9a01d9a33 added better metric for utilisation 2015-02-17 21:50:15 +01:00
gernhard2
beddeccb64 Fixed bug in Fifostrict that caused deadlock 2015-02-17 09:22:58 +01:00
gernhard2
f11adf51dc Relocated the python scripts. They now live in the analyzer directory and are deployed to the output folder when building the analyzer.
Major change to simulation logic in dramSys: Commands in a transaction are now scheduled one at a time, instead of
scheduling a whole transaction at once. Since single commands (e.g. Pre or Act) are not that long, refreshes are allowed to be delayed
to allow a command to finsh. Consequently, the whole loop in the ControllerCore about trying to scheduleding a transaction and aborting it when
it collides with a refresh could be ommitted. Lastly, Fifo_Strict has been added, which is a Fifo Scheduler that forces the read and write transactions, even
between different banks to be executed in order. Fifo and FR_FCFS have been modified to fit into the new scheduling logic.
2015-02-16 08:21:27 +01:00
Peter Ehses
571e717224 removed some errors 2014-12-02 16:05:13 +01:00
Peter Ehses
e84a3cc99b Merge branch 'master' of https://git.rhrk.uni-kl.de/ehses/dram.vp.system
Conflicts:
	dram/dramSys/dramSys.pro
	dram/resources/configs/amconfigs/am_wideio.xml
	dram/resources/configs/memconfigs/fr_fcfs.xml
	dram/src/common/xmlAddressdecoder.cpp
	dram/src/controller/core/configuration/ConfigurationLoader.cpp
	dram/src/simulation/Simulation.cpp
	dram/src/simulation/Simulation.h
	dram/src/simulation/TracePlayer.h
2014-12-02 15:25:48 +01:00
ehses
8ec02d3f2c Merge pull request #1 from EIT-Wehn/master
Error Model
2014-12-02 14:50:13 +01:00
Peter Ehses
905e75ca32 included errormodel which is presented in DATE paper 2014-12-02 14:44:46 +01:00
Janik Schlemminger
badcc37118 debug bums raus 2014-10-08 21:12:01 +02:00
Janik Schlemminger
f35cc43186 gute frage^^ 2014-10-08 21:04:44 +02:00
Peter Ehses
a366ed8f91 easy error model from patrick implemented 2014-09-16 10:27:14 +02:00
Janik Schlemminger
e105d54045 added fix for bankgroups and ranks in addressdecoder 2014-09-10 16:10:07 +02:00
Janik Schlemminger
5a7efb4d88 merged 2014-09-08 15:03:10 +02:00
Janik Schlemminger
6ce8935097 fix on fifo hack 2014-09-08 14:59:28 +02:00
Matthias Jung
9fb90e9015 Experimantal change for a big FIFO 2014-09-08 13:09:52 +02:00
Janik Schlemminger
33a13d6bfd status quo .. jetzt wirds tricky 2014-09-07 00:04:19 +02:00
Janik Schlemminger
938dbb3fdb print mapping 2014-09-06 20:21:43 +02:00
Janik Schlemminger
30b1fbbd0c added no powerdown option 2014-09-06 16:59:46 +02:00
Matthias Jung
e110d45e0e Added Zoom by keys - and +
Merge branch 'master' of git.rhrk.uni-kl.de:EIT-Wehn/dram.vp.system

Conflicts:
	dram/src/simulation/SimulationManager.cpp
2014-09-06 01:16:13 +02:00
Janik Schlemminger
2aa07bbbe6 Quick and Dirty XML - Refactoring necessary 2014-09-04 23:35:54 +02:00
Matthias Jung
8d864afb44 Merge branch 'master' of git.rhrk.uni-kl.de:EIT-Wehn/dram.vp.system 2014-09-04 15:35:30 +02:00
Matthias Jung
1c7643b9b6 Changed analysis scripts 2014-09-04 15:35:01 +02:00
Janik Schlemminger
610dc6e6a5 changed fifo scheduler to strictly keep the order 2014-09-04 11:19:40 +02:00
Janik Schlemminger
320331164b xml extended, sim config introduced 2014-09-03 18:52:32 +02:00
Matthias Jung
1807ef00f4 Added nbrOfColumns member variable 2014-09-03 15:11:46 +02:00
Matthias Jung
9cddd32a01 Changed #ifndef of trace generators' header file 2014-09-03 11:53:09 +02:00
Matthias Jung
7abf3c9958 Refactored TlmPacketGenerator in TraceGenerator 2014-09-03 11:39:41 +02:00
Janik Schlemminger
c5971ba2f5 merged conflicts 2014-09-03 10:37:39 +02:00
Janik Schlemminger
8722808a90 made traceplayer generic, so that different kind of traceplayers are supported 2014-09-03 10:27:04 +02:00
Janik Schlemminger
85a574fd5b Configuration refactoring 2014-08-30 19:22:48 +02:00
Janik Schlemminger
fdc723a1bc Merge branch 'master' of https://git.rhrk.uni-kl.de/EIT-Wehn/dram.vp.system 2014-08-29 13:10:01 +02:00
Janik Schlemminger
fcd029c6d8 Traceplayer now tolerates new lines in the Tracefiles 2014-08-29 12:23:13 +02:00
Janik Schlemminger
df6637b114 splitting config and memspec 2014-08-29 10:25:32 +02:00