Merge branch 'master' of https://git.rhrk.uni-kl.de/ehses/dram.vp.system

Conflicts:
	dram/dramSys/dramSys.pro
	dram/resources/configs/amconfigs/am_wideio.xml
	dram/resources/configs/memconfigs/fr_fcfs.xml
	dram/src/common/xmlAddressdecoder.cpp
	dram/src/controller/core/configuration/ConfigurationLoader.cpp
	dram/src/simulation/Simulation.cpp
	dram/src/simulation/Simulation.h
	dram/src/simulation/TracePlayer.h

analyzer/analyzer/presentation/traceplot.cpp

@@ -409,6 +409,14 @@ void TracePlot::keyPressEvent(QKeyEvent *keyPressedEvent)
         navigator->selectNextTransaction();
     else if(Qt::Key_Left == key)
         navigator->selectPreviousTransaction();
+    else if(Qt::Key_Minus == key)
+    {
+        zoomOut(GetCurrentTimespan().Middle());
+    }
+    else if(Qt::Key_Plus == key)
+    {
+        zoomIn(GetCurrentTimespan().Middle());
+    }
 }
 
 void TracePlot::keyReleaseEvent(QKeyEvent *keyReleasedEvent)

dram/dramSys/dramSys.pro

@@ -22,7 +22,10 @@ INCLUDEPATH += ../src/common/third_party/DRAMPower/src/libdrampower
 DEFINES += TIXML_USE_STL
 DEFINES += SC_INCLUDE_DYNAMIC_PROCESSES
 DEFINES += USE_XERCES=1
-DEFINES += NDEBUG
+release {
+  DEFINES += NDEBUG
+}
+
 
 QMAKE_CXXFLAGS += -std=c++11
 QMAKE_CXXFLAGS += -isystem /opt/systemc/include
@@ -36,7 +39,6 @@ SOURCES += \
     ../src/common/TlmRecorder.cpp \
     ../src/common/dramExtension.cpp \
     ../src/common/DebugManager.cpp \
-    ../src/controller/core/configuration/MemSpecLoader.cpp \
     ../src/controller/core/configuration/Configuration.cpp \
     ../src/controller/core/powerdown/PowerDownManagerTimeout.cpp \
     ../src/controller/core/powerdown/PowerDownManagerBankwise.cpp \
@@ -69,6 +71,8 @@ SOURCES += \
     ../src/controller/core/RowBufferStates.cpp \
     ../src/controller/scheduler/Scheduler.cpp \
     ../src/controller/scheduler/readwritegrouper.cpp \
+    ../src/controller/core/configuration/ConfigurationLoader.cpp \
+    ../src/controller/core/powerdown/NoPowerDown.cpp
     ../src/error/nest_map.cpp \
     ../src/error/flip_memory.cpp
 
@@ -81,7 +85,6 @@ HEADERS += \
     ../src/common/protocol.h \
     ../src/common/dramExtension.h \
     ../src/common/DebugManager.h \
-    ../src/controller/core/configuration/MemSpecLoader.h \
     ../src/controller/core/configuration/Configuration.h \
     ../src/controller/core/powerdown/PowerDownManagerTimeout.h \
     ../src/controller/core/powerdown/PowerDownManagerBankwise.h \
@@ -118,7 +121,6 @@ HEADERS += \
     ../src/simulation/SimulationManager.h \
     ../src/simulation/Simulation.h \
     ../src/simulation/MemoryManager.h \
-    ../src/simulation/ISimulation.h \
     ../src/simulation/Dram.h \
     ../src/simulation/Arbiter.h \
     ../src/common/libDRAMPower.h \
@@ -126,6 +128,11 @@ HEADERS += \
     ../src/controller/scheduler/readwritegrouper.h \
     ../src/simulation/ReorderBuffer.h \
     ../src/controller/core/configuration/MemSpec.h \
+    ../src/simulation/StlPlayer.h \
+    ../src/simulation/TracePlayerListener.h \
+    ../src/simulation/TraceGenerator.h \
+    ../src/controller/core/powerdown/NoPowerDown.h
+    ../src/controller/core/configuration/ConfigurationLoader.h
     ../src/error/nest_map.h \
     ../src/error/flip_memory.h
 

dram/resources/configs/amconfigs/am_wideio.xml

@@ -1,32 +1,18 @@
-<?xml version="1.0" encoding="UTF-8" standalone="yes" ?>
-
-<!-- <dramconfig>
-	<addressmap length="29">
-		<channel from="27" to="28" />
-		<row   from="14" to="26" />		
-		<bank  from="11" to="13" />
-		<colum from="4" to="10" />
-		<bytes from="0" to="3" /> 
-	</addressmap>
-</dramconfig>
- -->
-<!--
-<dramconfig>
-	<addressmap>
+	<addressmapping>
 		<channel from="27" to="28" />
 		<row   from="14" to="26" />		
 		<column from="7" to="13" />
 		<bank  from="4" to="6" />
 		<bytes from="0" to="3" /> 
-	</addressmap>
-</dramconfig>
--->
-<dramconfig>
-	<addressmap>
-		<channel from="27" to="28" />
-		<bank  from="24" to="26" />
-		<row   from="11" to="23" />		
-		<column from="4" to="10" />
-		<bytes from="0" to="3" /> 
-	</addressmap>
-</dramconfig>
+	</addressmapping>
+	<!-- Magali values: -->
+	<!--
+	<addressmapping>
+                <channel from="27" to="28" />
+                <bank  from="24" to="26" />
+                <row   from="11" to="23" />
+                <column from="4" to="10" />
+                <bytes from="0" to="3" />
+	</addressmapping>
+	-->
+

dram/resources/configs/memconfigs/_old/grouper.xml

@@ -1,15 +1,14 @@
 <memspec>
   <memconfig>
-    <parameter id="bankwiseLogic" type="bool" value="1" />
+    <parameter id="bankwiseLogic" type="bool" value="0" />
     <parameter id="openPagePolicy" type="bool" value="1" />
     <parameter id="adaptiveOpenPagePolicy" type="bool" value="0" />
-    <parameter id="refreshAwareScheduling" type="bool" value="0" />
-    <parameter id="maxNrOfTransactionsInDram" type="uint" value="2000" />
-    <parameter id="scheduler" type="string" value="FR_FCFS" />
+    <parameter id="refreshAwareScheduling" type="bool" value="1" />
+    <parameter id="maxNrOfTransactionsInDram" type="uint" value="50" />
+    <parameter id="scheduler" type="string" value="Grouper" />
     <parameter id="capsize" type="uint" value="5" />
     <parameter id="powerDownMode" type="string" value="Staggered" />
-    <parameter id="powerDownTimeout" type="uint" value="3" />
-    
+    <parameter id="powerDownTimeout" type="uint" value="100" />
     <parameter id="databaseRecordingEnabled" type="bool" value="1" />
   </memconfig>
 </memspec>

dram/resources/configs/memconfigs/fifo.xml

@@ -1,15 +1,11 @@
-<memspec>
-  <memconfig>
-    <parameter id="bankwiseLogic" type="bool" value="0" />
-    <parameter id="openPagePolicy" type="bool" value="1" />
-    <parameter id="adaptiveOpenPagePolicy" type="bool" value="0" />
-    <parameter id="refreshAwareScheduling" type="bool" value="0" />
-    <parameter id="maxNrOfTransactionsInDram" type="uint" value="50" />
-    <parameter id="scheduler" type="string" value="FIFO" />
-    <parameter id="capsize" type="uint" value="5" />
-    <parameter id="powerDownMode" type="string" value="Staggered" />
-    <parameter id="powerDownTimeout" type="uint" value="100" />
-
-    <parameter id="databaseRecordingEnabled" type="bool" value="1" />
-  </memconfig>
-</memspec>
+<memconfig>
+  <BankwiseLogic value="0"/>
+  <OpenPagePolicy value="1" />
+  <AdaptiveOpenPagePolicy value="0" />
+  <RefreshAwareScheduling value="1" />
+  <MaxNrOfTransactions value="50" />
+  <Scheduler value="FIFO" />
+  <Capsize value="5" />
+  <PowerDownMode value="Staggered" />
+  <PowerDownTimeout value="100" />
+</memconfig>

dram/resources/configs/memconfigs/fr_fcfs.xml

@@ -1,17 +1,22 @@
-<memspec>
-  <memconfig>
-    <parameter id="bankwiseLogic" type="bool" value="0" />
-    <parameter id="openPagePolicy" type="bool" value="1" />
-    <parameter id="adaptiveOpenPagePolicy" type="bool" value="0" />
-    <parameter id="refreshAwareScheduling" type="bool" value="1" />
-    <parameter id="maxNrOfTransactionsInDram" type="uint" value="50" />
-    <parameter id="scheduler" type="string" value="FR_FCFS" />
-    <parameter id="capsize" type="uint" value="5" />
-    <parameter id="powerDownMode" type="string" value="TimeoutPDN" />
-    <parameter id="powerDownTimeout" type="uint" value="9999999999999" />
-    <parameter id="databaseRecordingEnabled" type="bool" value="0" />
-    <parameter id="Chipseed" type="uint" value="42" />
-    <parameter id="csvfile" type="string" value="/home/ehses/projects/dram.vp.system/dram/src/error/error_new.csv" />
-    <parameter id="StorMo" type="uint" value="0"/><!--3 Modes: 0 no storage, 1 store data without errormodel, 2 store data with errormodel-->
-  </memconfig>
-</memspec>
+<memconfig>
+  <BankwiseLogic value="0"/>
+  <OpenPagePolicy value="1" />
+  <AdaptiveOpenPagePolicy value="0" />
+  <RefreshAwareScheduling value="1" />
+  <MaxNrOfTransactions value="50" />
+  <Scheduler value="FR_FCFS" />
+  <Capsize value="5" />
+  <PowerDownMode value="NoPowerDown" />
+  <PowerDownTimeout value="100" />
+  <Chipseed value="42" />
+  <csvfile value="/home/ehses/projects/dram.vp.system/dram/src/error/error_new.csv" />
+  <StorMo value="2" /><!--3 Modes: 0 no storage, 1 store data without errormodel, 2 store data with errormodel-->
+  <!-- 
+  <Buswidth value="128" />
+  <ReadWriteGrouping value="false" />
+  <ModelStorage value="false" />
+  <ModelErrorInjection value="false" />
+  <ReorderBuffer value="false" />
+  <DatabaseRecording value="true" />
+  -->
+</memconfig>

dram/resources/configs/simconfigs/simple.xml

@@ -0,0 +1,5 @@
+<simconfig>
+  <DatabaseRecording value="1" />
+  <PowerAnalysys value="0" />
+  <Debug value="0" />
+</simconfig>

dram/resources/scripts/address_scrambler.pl

@@ -0,0 +1,64 @@
+#!/usr/bin/perl
+use warnings;
+use strict;
+
+my $filename = shift || die;
+
+open(FH, "$filename");
+
+while(<FH>)
+{
+	# Get all the data adress:
+	$_ =~ /(\d+):\s+(\w+)\s+0x([\w\d]+)/;
+	my $time = $1;
+	my $command = $2;
+	my $address = $3;
+	my $new_address; 
+
+	# Convert to binary:
+	$address = sprintf( "%032b", hex( $address ) );
+	
+	# example:
+	# 31                             0
+	# 00000000000000000000000000000001
+	# 00000000000000000000010000000000
+
+	# Swap adresses:
+	$new_address = 	substr($address,31 - 31,1). # R  31
+			substr($address,31 - 30,1). # R  30
+			substr($address,31 - 29,1). # R  29
+			substr($address,31 - 28,1). # R  28
+			substr($address,31 - 27,1). # R  27
+			substr($address,31 - 26,1). # R  26
+			substr($address,31 - 25,1). # R  25
+			substr($address,31 - 24,1). # R  24
+			substr($address,31 - 23,1). # R  23
+			substr($address,31 - 22,1). # R  22
+			substr($address,31 - 21,1). # R  21
+			substr($address,31 - 20,1). # R  20
+			substr($address,31 - 19,1). # R  19
+			substr($address,31 - 18,1). # R  18
+			substr($address,31 - 17,1). # R  17
+			substr($address,31 - 16,1). # R  16
+			substr($address,31 -  8,1). # R  15
+			substr($address,31 -  7,1). # R  14
+			substr($address,31 -  6,1). # R  13
+			substr($address,31 - 11,1). # B  12
+			substr($address,31 -  9,1). # B  11
+			substr($address,31 -  0,1). # B  10
+			substr($address,31 - 15,1). # C   9
+			substr($address,31 - 14,1). # C   8 
+			substr($address,31 - 13,1). # C   7
+			substr($address,31 - 12,1). # C   6
+			substr($address,31 - 10,1). # C   5
+			substr($address,31 -  5,1). # C   4 
+			substr($address,31 -  4,1). # C   3
+			substr($address,31 -  3,1). # C   2
+			substr($address,31 -  2,1). # C   1
+			substr($address,31 -  1,1); # C   0
+			
+	$new_address = sprintf("%X", oct( "0b$new_address" ) );
+
+	print $time.":\t".$command."\t0x".$new_address."\n";
+}
+

dram/resources/scripts/analyse_trace.pl

@@ -0,0 +1,113 @@
+#!/usr/bin/perl
+use List::Util 'max';
+use warnings;
+use strict;
+
+my $filename = shift || die("Please provide a input STL file");
+
+my $numberOfRows    = 16384;
+my $numberOfBanks   = 8;
+my $numberOfColumns = 1024;
+
+my $numberOfRowBits    = log($numberOfRows)/log(2);
+my $numberOfBankBits   = log($numberOfBanks)/log(2);
+my $numberOfColumnBits = log($numberOfColumns)/log(2);
+
+open(FH, "$filename");
+
+my @activityCounter;
+my @mapping;
+
+for(my $i = 0; $i < 32; $i++)
+{
+	$activityCounter[$i] = 0;
+	$mapping[$i] = "X";
+}
+
+my $old_address = "00000000000000000000000000000000";
+
+while(<FH>)
+{
+	# Get the adress:
+	$_ =~ /\d+:\s+\w+\s+0x([\w\d]+)\s*[\d\w]*/;
+	my $address = $1;
+	$address = sprintf( "%032b", hex( $address ) );
+
+	# $i = 0 :: most significant bit
+	for(my $i = 0; $i < 32; $i++)
+	{
+		my $new = substr($address, $i, 1);
+		my $old = substr($old_address, $i, 1);
+
+		if($new ne $old)
+		{
+			$activityCounter[31-$i]++;
+		}
+	}
+
+	$old_address = $address;
+}
+
+# Print bit numbers:
+print "Bits\t";
+for(my $i = 31; $i >= 0; $i--)
+{
+	print $i."\t";
+}
+
+#Print Activity
+print "\nActivity\t";
+for(my $i = 31; $i >= 0; $i--)
+{
+	print $activityCounter[$i]."\t";
+}
+
+#Print relative Activity
+print "\nPercent\t";
+my $sum = 0;
+for(my $i = 31; $i >= 0; $i--)
+{
+	$sum = $sum + $activityCounter[$i];
+}
+for(my $i = 31; $i >= 0; $i--)
+{
+	my $string = $activityCounter[$i]/$sum."\t";
+	$string =~ s/\./,/g;
+	print $string;
+}
+
+#Search Bank Locations
+for(my $i = 0; $i < $numberOfBankBits; $i++)
+{
+	my $maximum = max(@activityCounter);
+	my ($index) = grep $activityCounter[$_] == $maximum , 0.. $#activityCounter;
+	$mapping[$index] = "B$i";
+	$activityCounter[$index] = -1;
+}
+
+#Search Column Locations
+for(my $i = 0; $i < $numberOfColumnBits; $i++)
+{
+	my $maximum = max(@activityCounter);
+	my ($index) = grep $activityCounter[$_] == $maximum , 0.. $#activityCounter;
+	$mapping[$index] = "C$i";
+	$activityCounter[$index] = -1;
+}
+
+#Search Row Locations
+for(my $i = 0; $i < $numberOfRowBits; $i++)
+{
+	my $maximum = max(@activityCounter);
+	my ($index) = grep $activityCounter[$_] == $maximum , 0.. $#activityCounter;
+	$mapping[$index] = "R$i";
+	$activityCounter[$index] = -1;
+}
+
+#Print final mapping
+print "\nMapping\t";
+my $maximum = max(@activityCounter);
+for(my $i = 31; $i >= 0; $i--)
+{
+	print $mapping[$i]."\t";
+}
+print "\n";

dram/resources/scripts/metrics.py

@@ -50,15 +50,38 @@ def getClock(connection):
 #    plt.savefig('hist.png')
 #    return "Saved as hist.png"
 
+#@metric
+#def average_response_latency_in_ns(connection):
+#   cursor = connection.cursor()
+#   cursor.execute("""SELECT avg(PhaseBegin-timeOfGeneration)/1000 FROM transactions INNER JOIN Phases 
+#                     ON phases.transact = transactions.ID WHERE PhaseName='RESP' """)
+#
+#   result = cursor.fetchone()
+#   return round(result[0],1)
+
+@metric
+def trace_length_in_ns(connection):
+    cursor = connection.cursor()
+    cursor.execute(""" SELECT max(PhaseEnd)/1000 FROM PHASES; """)
+    result = cursor.fetchone()
+    return result[0]
+
 @metric
 def average_response_latency_in_ns(connection):
    cursor = connection.cursor()
-   cursor.execute("""SELECT avg(PhaseBegin-timeOfGeneration)/1000 FROM transactions INNER JOIN Phases 
-                     ON phases.transact = transactions.ID WHERE PhaseName='RESP' """)
+   cursor.execute("""SELECT AVG(RESP.PHASEBEGIN -  REQ.PHASEBEGIN)/1000 FROM PHASES REQ, PHASES RESP WHERE REQ.PHASENAME = 'REQ' AND RESP.PHASENAME='RESP' AND REQ.TRANSACT = RESP.TRANSACT  """)
 
    result = cursor.fetchone()
    return round(result[0],1)
 
+@metric
+def trans_with_max_response_latency(connection):
+   cursor = connection.cursor()
+   cursor.execute(""" SELECT REQ.TRANSACT, max(RESP.PHASEBEGIN -  REQ.PHASEBEGIN)/1000 FROM PHASES REQ, PHASES RESP WHERE REQ.PHASENAME = 'REQ' AND RESP.PHASENAME='RESP' AND REQ.TRANSACT = RESP.TRANSACT  """)
+
+   result = cursor.fetchone()
+   return result[0]
+
 @metric
 def memory_utilisation_percent(connection):
    cursor = connection.cursor()

dram/resources/scripts/stride_detection.pl

@@ -0,0 +1,34 @@
+#!/usr/bin/perl
+use List::Util 'max';
+use warnings;
+use strict;
+
+my $filename = shift || die("Please provide a input STL file");
+my $command = shift || die ("Pleas provide read/write");
+
+open(FH, "$filename");
+
+my $old_address = 0;
+my %histogram;
+my $command_occurance = 0;
+
+while(<FH>)
+{
+	# Get the adress:
+	$_ =~ /\d+:\s+(\w+)\s+0x([\w\d]+)\s*[\d\w]*/;
+	if($command eq $1)
+	{
+		my $address = hex($2);
+		my $distance = $address - $old_address;
+		$histogram{$distance} ++;
+		$old_address = $address;
+		$command_occurance++;
+	}
+}
+
+foreach my $key ( keys %histogram)
+{
+	my $percent = $histogram{$key}/$command_occurance;
+	my $hexkey = sprintf( "%032b", abs($key) );
+	print "0x".$hexkey." ".abs($key)." = ".$histogram{$key}." (".$percent.")\n";
+}

dram/resources/simulations/sim-batch.xml

@@ -1,20 +1,25 @@
-<simulation id = "simbatch3"> 
-<memspec>WideIO.xml</memspec>
+<simulation>
+        <simconfig>
+                  <Debug value="1" />
+        </simconfig>
+        <memspecs>
+                <memspec src="/home/jonny/newconfigs/mems.xml"></memspec>
+        </memspecs>
+        <addressmappings>
+                <addressmapping src="/home/jonny/newconfigs/amc.xml"></addressmapping>
+        </addressmappings>
+        <memconfigs>
+           <memconfig src="/home/jonny/newconfigs/memc.xml">
+           </memconfig>
+        </memconfigs>
 
- <addressmapping>am_wideio.xml</addressmapping> 
+        <tracesetups>
 
- <memconfigs>
-  <!--   <memconfig>fr_fcfs.xml</memconfig>
-   -->  <memconfig>fr_fcfs.xml</memconfig>
-  </memconfigs>
- <trace-setups>
+<tracesetup id="medium">
+     <!--<device clkMhz="200">test.stl</device>-->
+     <device clkMhz="200">small.stl</device>
+</tracesetup>
 
-
-<trace-setup id="media">
-     <device clkMhz="800">mediabench-fractal_32.stl</device>
-</trace-setup>
-    
-  </trace-setups>
+  </tracesetups>
 </simulation>
 
-

dram/src/common/Utils.cpp

@@ -96,7 +96,7 @@ double queryDoubleParameter(XMLElement* node, string name)
 bool queryBoolParameter(XMLElement* node, string name)
 {
     bool result;
-    XMLElement* element;
+    XMLElement* element;// = node->FirstChildElement("parameter");
     for (element = node->FirstChildElement("parameter"); element != NULL;
             element = element->NextSiblingElement("parameter"))
     {
@@ -129,14 +129,40 @@ string queryStringParameter(XMLElement* node, string name)
     return 0;
 }
 
+string errorToString(XMLError error)
+{
+    switch(error){
+    case XML_NO_ERROR: return "no error";    case XML_NO_ATTRIBUTE: return "NO_ATTRIBUTE";
+    case XML_WRONG_ATTRIBUTE_TYPE: return "WRONG_ATTRIBUTE_TYPE";
+    case XML_ERROR_FILE_NOT_FOUND: return "FILE_NOT_FOUND";
+    case XML_ERROR_FILE_COULD_NOT_BE_OPENED: return "FILE_COULD_NOT_BE_OPENED";
+    case XML_ERROR_FILE_READ_ERROR: return "FILE_READ_ERROR";
+    case XML_ERROR_ELEMENT_MISMATCH: return "ERROR_ELEMENT_MISMATCH";
+    case XML_ERROR_PARSING_ELEMENT: return "ERROR_PARSING_ELEMENT";
+    case XML_ERROR_PARSING_ATTRIBUTE: return "ERROR_PARSING_ATTRIBUTE";
+    case XML_ERROR_IDENTIFYING_TAG: return "ERROR_IDENTIFYING_TAG";
+    case XML_ERROR_PARSING_TEXT: return "ERROR_PARSING_TEXT";
+    case XML_ERROR_PARSING_CDATA: return "ERROR_PARSING_CDATA";
+    case XML_ERROR_PARSING_COMMENT: return "ERROR_PARSING_COMMENT";
+    case XML_ERROR_PARSING_DECLARATION: return "ERROR_PARSING_DECLARATION";
+    case XML_ERROR_PARSING_UNKNOWN: return "ERROR_PARSING_UNKNOWN";
+    case XML_ERROR_EMPTY_DOCUMENT: return "ERROR_EMPTY_DOCUMENT";
+    case XML_ERROR_MISMATCHED_ELEMENT: return "ERROR_MISMATCHED_ELEMENT";
+    case XML_ERROR_PARSING: return "ERROR_PARSING";
+    case XML_CAN_NOT_CONVERT_TEXT: return "CAN_NOT_CONVERT_TEXT";
+    case XML_NO_TEXT_NODE: return "NO_TEXT_NODE";
+    default: "";
+    }
+}
+
 void loadXML(string uri, XMLDocument& doc)
 {
     XMLError error = doc.LoadFile(uri.c_str());
 
     if (error)
     {
-        //TODO specify error
-        reportFatal("Configuration", "Error loading xml from: " + uri);
+        reportFatal("Configuration", "Error loading xml from: " + uri + " "
+                    + errorToString(error));
     }
 }
 

dram/src/common/xmlAddressdecoder.cpp

@@ -1,19 +1,36 @@
 #include "xmlAddressdecoder.h"
 #include <systemc.h>
 #include "Utils.h"
+#include "bitset"
+#include "../controller/core/configuration/Configuration.h"
 
 using namespace std;
 using namespace tinyxml2;
 
-string xmlAddressDecoder::addressConfigURI = "";
+tinyxml2::XMLElement* xmlAddressDecoder::addressmapping = NULL;
 
 xmlAddressDecoder::xmlAddressDecoder(string addressConfigURI)
 {
-
     tinyxml2::XMLDocument doc;
 
     loadXML(addressConfigURI, doc);
-    tinyxml2::XMLElement* addressmap = doc.FirstChildElement("dramconfig")->FirstChildElement("addressmap");
+    xmlAddressDecoder(doc.FirstChildElement("dramconfig")->FirstChildElement("addressmap"));
+
+}
+
+xmlAddressDecoder::xmlAddressDecoder(XMLElement* addressmap)
+{
+    tinyxml2::XMLDocument doc;
+    string xmlNodeName(addressmap->Name());
+    if( xmlNodeName != "addressmapping")
+        reportFatal("AddressDecorder", "addressmap node expected");
+
+    if(addressmap->Attribute("src"))
+    {
+        string src(addressmap->Attribute("src"));
+        loadXML(src, doc);
+        addressmap = (doc.FirstChildElement("addressmapping"));
+    }
 
     for(XMLElement* child = addressmap->FirstChildElement(); child != NULL; child = child->NextSiblingElement())
     {
@@ -32,10 +49,12 @@ DecodedAddress xmlAddressDecoder::decodeAddress(sc_dt::uint64 addr)
 {
     DecodedAddress result;
     result.channel = (addr & masks["channel"]) >> shifts["channel"];
-    result.rank = (addr & masks["rank"]) >> shifts["rank"];
-    result.bankgroup = (addr & masks["bankgroup"]) >> shifts["bankgroup"];
-    result.row = (addr & masks["row"]) >> shifts["row"];
+    //result.rank = (addr & masks["rank"]) >> shifts["rank"];
+    //result.bankgroup = (addr & masks["bankgroup"]) >> shifts["bankgroup"];
     result.bank = (addr & masks["bank"]) >> shifts["bank"];
+    result.bankgroup = result.bank % core::Configuration::getInstance().memSpec.NumberOfBankGroups;
+    result.rank = result.bank % core::Configuration::getInstance().memSpec.NumberOfRanks;
+    result.row = (addr & masks["row"]) >> shifts["row"];
     result.column = (addr & masks["column"]) >> shifts["column"];
     result.bytes = (addr & masks["bytes"]) >> shifts["bytes"];
     return result;
@@ -51,3 +70,14 @@ sc_dt::uint64 xmlAddressDecoder::encodeAddress(DecodedAddress n)
             n.column << shifts["column"] |
             n.bytes << shifts["bytes"];
 }
+
+void xmlAddressDecoder::print()
+{
+    cout << "Used addressmapping:"  << endl;
+    cout<<"===================="<<endl;
+    for(auto& pair : masks)
+    {
+        cout<<pair.first<<"\t:\t" << bitset<32>(pair.second)<<endl;
+    }
+    cout<<"\n"<<endl;
+}

dram/src/common/xmlAddressdecoder.h

@@ -38,20 +38,29 @@ class xmlAddressDecoder
 {
 
 public:
-    static std::string addressConfigURI;
 
+static tinyxml2::XMLElement* addressmapping;
     static inline xmlAddressDecoder& getInstance()
     {
-        static xmlAddressDecoder decoder(xmlAddressDecoder::addressConfigURI);
+        static xmlAddressDecoder decoder(xmlAddressDecoder::addressmapping);
         return decoder;
     }
 
+    static inline void Initialize(tinyxml2::XMLElement* mapping)
+    {
+        addressmapping = mapping;
+        xmlAddressDecoder::getInstance();
+        addressmapping = NULL;
+    }
+
     DecodedAddress decodeAddress(sc_dt::uint64 addr);
     sc_dt::uint64 encodeAddress(DecodedAddress n);
 
 
+    void print();
 private:
     xmlAddressDecoder(std::string URI);
+    xmlAddressDecoder(tinyxml2::XMLElement* addressMap);
 
     std::map<std::string, sc_dt::uint64> masks;
     std::map<std::string, unsigned int> shifts;

dram/src/controller/Controller.h

@@ -11,6 +11,7 @@
 #include <map>
 #include <string>
 #include <vector>
+#include<iostream>
 
 #include "/opt/systemc-2.3.0/include/systemc"
 #include "/opt/systemc-2.3.0/include/tlm"
@@ -68,6 +69,7 @@ public:
     virtual void send(const ScheduledCommand& command, tlm_generic_payload& payload) override;
     virtual void send(Trigger trigger, sc_time time, tlm_generic_payload& payload) override;
 
+
     tlm_utils::simple_initiator_socket<Controller, BUSWIDTH, tlm::tlm_base_protocol_types> iSocket;
     tlm_utils::simple_target_socket<Controller, BUSWIDTH, tlm::tlm_base_protocol_types> tSocket;
 
@@ -76,7 +78,10 @@ private:
     void payloadEntersSystem(tlm_generic_payload& payload);
     void payloadLeavesSystem(tlm_generic_payload& payload);
     unsigned int getTotalNumberOfPayloadsInSystem();
-    void scheduleNextPayload();
+    void scheduleNextFromScheduler();
+    //FIFO HACK
+    void scheduleDirectly(gp* payload);
+
 
     // --- FRONTEND ------
     tlm_sync_enum nb_transport_fw(tlm_generic_payload& payload, tlm_phase& phase, sc_time& fwDelay);
@@ -98,6 +103,7 @@ private:
     ControllerCore* controllerCore;
     Scheduler* scheduler;
     std::map<Bank, int> numberOfPayloadsInSystem;
+    std::vector<gp* > refreshCollisionRequets;
     tlm::tlm_generic_payload* backpressure = NULL;
 
     tlm_utils::peq_with_cb_and_phase<Controller> frontendPEQ;
@@ -282,7 +288,7 @@ void Controller<BUSWIDTH>::controllerCorePEQCallback(tlm_generic_payload &payloa
         sendToDram(payload, phase, SC_ZERO_TIME);
 
         if (phase == BEGIN_RD || phase == BEGIN_WR)
-            scheduleNextPayload();
+            scheduleNextFromScheduler();
         else if (phase == BEGIN_REFB)
             printDebugMessage("Entering REFB on bank " + to_string(bank.ID()));
         else if (phase == BEGIN_REFA)
@@ -336,9 +342,19 @@ void Controller<BUSWIDTH>::frontendPEQCallback(tlm_generic_payload &payload, con
         }
         payload.set_response_status(tlm::TLM_OK_RESPONSE);
         sendToFrontend(payload, END_REQ, SC_ZERO_TIME);
-        scheduler->schedule(&payload);
-        scheduleNextPayload();
-    }
+
+        //FIFO HACK
+        if(Configuration::getInstance().Scheduler == "FIFO")
+        {
+            scheduleDirectly(&payload);
+        }
+        //Original
+        else
+        {
+            scheduler->schedule(&payload);
+            scheduleNextFromScheduler();
+        }
+     }
     else if (phase == END_RESP)
     {
         if (backpressure != NULL)
@@ -346,8 +362,17 @@ void Controller<BUSWIDTH>::frontendPEQCallback(tlm_generic_payload &payload, con
             printDebugMessage("##Backpressure released");
             backpressure->set_response_status(tlm::TLM_OK_RESPONSE);
             sendToFrontend(*backpressure, END_REQ, SC_ZERO_TIME);
-            scheduler->schedule(backpressure);
-            scheduleNextPayload();
+
+            //FIFO HACK
+            if(Configuration::getInstance().Scheduler == "FIFO")
+            {
+                scheduleDirectly(backpressure);
+            }
+            else
+            {
+                scheduler->schedule(backpressure);
+                scheduleNextFromScheduler();
+            }
             backpressure = NULL;
         }
 
@@ -392,8 +417,19 @@ unsigned int Controller<BUSWIDTH>::getTotalNumberOfPayloadsInSystem()
     return sum;
 }
 
+
+//FIFO HACK!
 template<unsigned int BUSWIDTH>
-void Controller<BUSWIDTH>::scheduleNextPayload()
+void Controller<BUSWIDTH>::scheduleDirectly(gp* payload)
+{
+    if(!controllerCore->scheduleRequest(*payload))
+    {
+        refreshCollisionRequets.push_back(payload);
+    }
+}
+
+template<unsigned int BUSWIDTH>
+void Controller<BUSWIDTH>::scheduleNextFromScheduler()
 {
     if(scheduler->hasPayloads())
     {
@@ -435,7 +471,7 @@ void Controller<BUSWIDTH>::dramPEQCallback(tlm_generic_payload &payload, const t
 
     if (phase == BEGIN_RD || phase == BEGIN_WR)
     {
-        scheduleNextPayload();
+        scheduleNextFromScheduler();
         sendToDram(payload, phase, SC_ZERO_TIME);
     }
     else if (phase == END_RD || phase == END_WR)
@@ -445,14 +481,28 @@ void Controller<BUSWIDTH>::dramPEQCallback(tlm_generic_payload &payload, const t
     else if (phase == END_RDA || phase == END_WRA)
     {
         sendToFrontend(payload, BEGIN_RESP, SC_ZERO_TIME);
-        scheduleNextPayload();
+        scheduleNextFromScheduler();
     }
-    else if (phase == END_REFA || phase == END_REFB)//TODO send all to sleep for REFA cause we only send for bank 0 now???
+    else if (phase == END_REFA || phase == END_REFB)
     {
         printDebugMessage("Finished auto refresh on bank " + to_string(bank.ID()));
+
         if(numberOfPayloadsInSystem[bank] == 0)
             controllerCore->powerDownManager->sleep(bank,sc_time_stamp());
-        scheduleNextPayload();
+        //FIFO HACK
+        if(Configuration::getInstance().Scheduler == "FIFO")
+        {
+            std::vector<gp*> collidedReq = this->refreshCollisionRequets;
+            refreshCollisionRequets.clear();
+            for(gp* payload : collidedReq)
+            {
+                scheduleDirectly(payload);
+            }
+        }
+        else
+        {
+            scheduleNextFromScheduler();
+        }
     }
     else if (containsPhase(phase, { END_PRE, END_PRE_ALL, END_ACT }))
     {

dram/src/controller/core/ControllerCore.cpp

@@ -23,8 +23,10 @@
 #include "powerdown/PowerDownManager.h"
 #include "powerdown/PowerDownManagerTimeout.h"
 #include "powerdown/PowerDownManagerBankwise.h"
+#include "powerdown/NoPowerDown.h"
 #include "../../common/DebugManager.h"
 
+
 namespace core {
 
 std::string ControllerCore::senderName = "Controller Core";
@@ -58,14 +60,23 @@ ControllerCore::ControllerCore(IWrapperConnector& wrapperConnector, std::map<Ban
     else
     {
         refreshManager = new RefreshManager(*this);
-        if(config.powerDownMode == PowerDownMode::Staggered)
+
+        if(config.PowerDownMode == EPowerDownMode::Staggered)
         {
             powerDownManager = new PowerDownManager(*this);
         }
-        else // TimeoutPDN or TimeoutSREF
+        else if(config.PowerDownMode == EPowerDownMode::TimeoutPDN || config.PowerDownMode == EPowerDownMode::TimeoutSREF)
         {
             powerDownManager = new PowerDownManagerTimeout(*this);
         }
+        else if(config.PowerDownMode == EPowerDownMode::NoPowerDown)
+        {
+            powerDownManager = new NoPowerDown();
+        }
+        else
+        {
+            SC_REPORT_FATAL(0, "Unsupported powerdown mode in constructor of controller core");
+        }
     }
 }
 

dram/src/controller/core/configuration/Configuration.cpp

@@ -6,7 +6,8 @@
  */
 
 #include "Configuration.h"
-#include "MemSpecLoader.h"
+#include "ConfigurationLoader.h"
+#include "boost/lexical_cast.hpp"
 
 using namespace std;
 
@@ -17,10 +18,108 @@ string Configuration::memconfigUri = "";
 
 Configuration::Configuration()
 {
-	MemSpecLoader loader;
-	loader.loadConfiguration(*this, Configuration::memspecUri, Configuration::memconfigUri);
+}
+
+int string2bool(string s)
+{
+    try {
+        bool x = boost::lexical_cast<bool>( s );
+        return x;
+    } catch( boost::bad_lexical_cast const& ) {
+        SC_REPORT_FATAL("Configuration", ("Could not convert to bool: " + s).c_str());
+        throw;
+    }
+}
+
+int string2int(string s)
+{
+    try {
+        int x = boost::lexical_cast<int>( s );
+        return x;
+    } catch( boost::bad_lexical_cast const& ) {
+        SC_REPORT_FATAL("Configuration", ("Could not convert to int: " + s).c_str());
+        throw;
+    }
+}
+
+EPowerDownMode string2PDNMode(string s)
+{
+    if(s == "NoPowerDown")
+        return EPowerDownMode::NoPowerDown;
+    else if(s == "Staggered")
+        return EPowerDownMode::Staggered;
+    else if (s == "TimeoutPDN")
+        return EPowerDownMode::TimeoutPDN;
+    else if (s == "TimeoutSREF")
+        return EPowerDownMode::TimeoutSREF;
+    else
+    {
+        SC_REPORT_FATAL("Configuration", ("Unknown PowerDownMode: " + s).c_str());
+        throw;
+    }
 }
 
 
+void Configuration::setParameter(std::string name, std::string value)
+{
+    if(name == "BankwiseLogic")
+        BankwiseLogic = string2bool(value);
+    else if(name == "OpenPagePolicy")
+        OpenPagePolicy = string2bool(value);
+    else if(name == "AdaptiveOpenPagePolicy")
+        AdaptiveOpenPagePolicy = string2bool(value);
+    else if(name == "RefreshAwareScheduling")
+        RefreshAwareScheduling = string2bool(value);
+    else if(name == "MaxNrOfTransactions")
+        MaxNrOfTransactions = string2int(value);
+    else if(name == "Scheduler")
+        Scheduler = value;
+    else if(name == "Capsize")
+        Capsize = string2int(value);
+    else if(name == "PowerDownTimeout")
+        powerDownTimeoutInClk = string2int(value);
+    else if(name == "PowerDownMode")
+        PowerDownMode = string2PDNMode(value);
+    else if(name == "Buswidth")
+        Buswidth = string2int(value);
+    else if(name == "ReadWriteGrouping")
+        ReadWriteGrouping = string2bool(value);
+    //removed because of Peters error model TODO clean up!
+    //else if(name == "ModelStorage")
+    //    ModelStorage = string2bool(value);
+    //else if(name == "ModelErrorInjection")
+    //    ModelErrorInjection = string2bool(value);
+    else if(name == "ReorderBuffer")
+        ReorderBuffer = string2bool(value);
+
+    //SimConfig------------------------------------------------
+    else if(name == "DatabaseRecording")
+        DatabaseRecording = string2bool(value);
+    else if(name == "PowerAnalysys")
+        PowerAnalysys = string2bool(value);
+    else if(name == "Debug")
+        Debug = string2bool(value);
+    //Specification for Chipseed, csvfile path and StorageMode
+    else if(name == "Chipseed")
+        Chipseed = string2int(value);
+    else if(name == "csvfile")
+        csvfile = value;
+    else if(name == "StorMo")
+        StorMode = string2int(value);
+    else
+    {
+        SC_REPORT_FATAL("Configuration", ("Parameter " + name + " not defined in Configuration").c_str());
+        throw;
+    }
+}
+
+void Configuration::setParameters(std::map<std::string, std::string> parameterMap)
+{
+    for(auto item : parameterMap)
+    {
+        setParameter(item.first, item.second);
+    }
+}
+
 } /* namespace core */
 

dram/src/controller/core/configuration/Configuration.h

@@ -12,10 +12,9 @@
 #include <string>
 #include "MemSpec.h"
 
-
 namespace core{
 
-enum class PowerDownMode{Staggered, TimeoutPDN, TimeoutSREF};
+enum class EPowerDownMode{NoPowerDown, Staggered, TimeoutPDN, TimeoutSREF};
 
 
 struct Configuration
@@ -29,7 +28,7 @@ struct Configuration
         return configuration;
     }
 
-    //MemConfiguration
+    //MemConfig
     bool BankwiseLogic = false;
     bool OpenPagePolicy = true;
     bool AdaptiveOpenPagePolicy = false;
@@ -37,14 +36,24 @@ struct Configuration
     unsigned int MaxNrOfTransactions = 50;
     std::string Scheduler;
     unsigned int Capsize = 5;
-    sc_time powerDownTimeout = 3*memSpec.clk;
-    PowerDownMode powerDownMode;
+    sc_time getPowerDownTimeout(){return powerDownTimeoutInClk*memSpec.clk;}
+    EPowerDownMode PowerDownMode = EPowerDownMode::Staggered;
+    unsigned int Buswidth = 128;
+    bool ReadWriteGrouping = false;
+    bool ModelStorage = false;
+    bool ModelErrorInjection = false;
+    bool ReorderBuffer = false;
 
-    //Memory Specification (from DRAM Power XML)
+    //SimConfig
+    bool DatabaseRecording = true;
+    bool PowerAnalysys = false;
+    bool Debug = false;
+
+    //MemSpec(from DRAM-Power XML)
     MemSpec memSpec;
 
-    //Simulation Configuration
-    bool databaseRecordingEnabled = true;
+    void setParameter(std::string name, std::string value);
+    void setParameters(std::map<std::string, std::string> parameterMap);
 
     //Configs for Seed, csv file and StorageMode
     unsigned int Chipseed;
@@ -53,6 +62,7 @@ struct Configuration
 
 private:
     Configuration();
+    unsigned int powerDownTimeoutInClk = 3;
 };
 
 } /* namespace core */

dram/src/controller/core/configuration/ConfigurationLoader.cpp

@@ -5,7 +5,7 @@
  *      Author: jonny
  */
 
-#include "MemSpecLoader.h"
+#include "ConfigurationLoader.h"
 #include "MemSpec.h"
 #include "../TimingCalculation.h"
 
@@ -14,58 +14,77 @@ using namespace std;
 
 namespace core {
 
-void MemSpecLoader::loadConfiguration(Configuration& config, string memspecUri, string memconfigUri)
+void ConfigurationLoader::loadSimConfig(Configuration& config, string simconfigUri)
 {
     tinyxml2::XMLDocument doc;
 
+    loadXML(simconfigUri, doc);
+    XMLElement* simconfig = doc.FirstChildElement("simconfig");
+    loadConfig(config, simconfig);
+}
+
+
+void ConfigurationLoader::loadMemConfig(Configuration& config, string memconfigUri)
+{
+    tinyxml2::XMLDocument doc;
+
+    loadXML(memconfigUri, doc);
+    XMLElement* memconfig = doc.FirstChildElement("memconfig");
+    loadConfig(config, memconfig);
+}
+
+void ConfigurationLoader::loadMemConfig(Configuration& config, XMLElement* memconfig)
+{
+    if(memconfig->Attribute("src"))
+    {
+        XMLDocument doc;
+        string src(memconfig->Attribute("src"));
+        loadXML(src, doc);
+        loadMemConfig(config, doc.FirstChildElement("memconfig"));
+    }
+    loadConfig(config, memconfig);
+}
+
+void ConfigurationLoader::loadSimConfig(Configuration& config, XMLElement* simconfig)
+{
+    if(simconfig->Attribute("src"))
+    {
+        XMLDocument doc;
+        string src(simconfig->Attribute("src"));
+        loadXML(src, doc);
+        loadSimConfig(config, doc.FirstChildElement("simconfig"));
+    }
+    loadConfig(config, simconfig);
+}
+
+void ConfigurationLoader::loadConfig(Configuration& config, XMLElement* configNode)
+{
+    XMLElement* element;
+    for (element = configNode->FirstChildElement(); element != NULL;
+            element = element->NextSiblingElement())
+    {
+        config.setParameter(element->Name(), element->Attribute("value"));
+
+    }
+}
+
+void ConfigurationLoader::loadMemSpec(Configuration& config, string memspecUri)
+{
+    tinyxml2::XMLDocument doc;
     loadXML(memspecUri, doc);
     XMLElement* memspec = doc.FirstChildElement("memspec");
     loadMemSpec(config, memspec);
-
-    loadXML(memconfigUri, doc);
-    XMLElement* memconfig = doc.FirstChildElement("memspec");
-    loadMemConfig(config, memconfig);
 }
 
-void MemSpecLoader::loadMemConfig(Configuration& config, XMLElement* memconfig)
+void ConfigurationLoader::loadMemSpec(Configuration& config, XMLElement* memspec)
 {
-    //MemConfiguration
-    XMLElement* configuration = memconfig->FirstChildElement("memconfig");
+    XMLDocument doc;
 
-    config.BankwiseLogic = queryBoolParameter(configuration, "bankwiseLogic");
-    config.OpenPagePolicy = queryBoolParameter(configuration, "openPagePolicy");
-    config.AdaptiveOpenPagePolicy = queryBoolParameter(configuration, "adaptiveOpenPagePolicy");
-    config.RefreshAwareScheduling = queryBoolParameter(configuration, "refreshAwareScheduling");
-    config.MaxNrOfTransactions = queryUIntParameter(configuration, "maxNrOfTransactionsInDram");
-    config.Scheduler = queryStringParameter(configuration, "scheduler");
-    config.Capsize = queryUIntParameter(configuration, "capsize");
+    string src(memspec->Attribute("src"));
+    config.memspecUri = src;
+    loadXML(src, doc);
+    memspec = doc.FirstChildElement("memspec");
 
-    string mode = queryStringParameter(configuration, "powerDownMode");
-    if (mode.compare("Staggered") == 0)
-    {
-        config.powerDownMode = PowerDownMode::Staggered;
-    }
-    else if (mode.compare("TimeoutPDN") == 0)
-    {
-        config.powerDownMode = PowerDownMode::TimeoutPDN;
-    }
-    else if (mode.compare("TimeoutSREF") == 0)
-    {
-        config.powerDownMode = PowerDownMode::TimeoutSREF;
-    }
-    config.powerDownTimeout = queryUIntParameter(configuration, "powerDownTimeout") * config.memSpec.clk;
-
-    config.databaseRecordingEnabled = queryBoolParameter(configuration, "databaseRecordingEnabled");
-
-    //Specification for Chipseed, csvfile path and StorageMode
-    config.Chipseed = queryUIntParameter(configuration, "Chipseed");
-    config.csvfile = queryStringParameter(configuration, "csvfile");
-    config.StorMode = queryUIntParameter(configuration, "StorMo");
-
-}
-
-void MemSpecLoader::loadMemSpec(Configuration& config, XMLElement* memspec)
-{
     config.memSpec.MemoryId = queryStringParameter(memspec, "memoryId");
     config.memSpec.MemoryType = queryStringParameter(memspec, "memoryType");
 
@@ -83,13 +102,14 @@ void MemSpecLoader::loadMemSpec(Configuration& config, XMLElement* memspec)
     }
 }
 
-void MemSpecLoader::loadDDR4(Configuration& config, XMLElement* memspec)
+void ConfigurationLoader::loadDDR4(Configuration& config, XMLElement* memspec)
 {
-    //MemSpecification
+    //MemArchitecture
     XMLElement* architecture = memspec->FirstChildElement("memarchitecturespec");
 
     config.memSpec.NumberOfBanks = queryUIntParameter(architecture, "nbrOfBanks");
     config.memSpec.NumberOfBankGroups = queryUIntParameter(architecture, "nbrOfBankGroups");
+    config.memSpec.NumberOfRanks = queryUIntParameter(architecture, "nbrOfRanks");
     config.memSpec.BurstLength = queryUIntParameter(architecture, "burstLength");
     config.memSpec.nActivate = 4;
     config.memSpec.DataRate = queryUIntParameter(architecture, "dataRate");
@@ -133,13 +153,14 @@ void MemSpecLoader::loadDDR4(Configuration& config, XMLElement* memspec)
     }
 }
 
-void MemSpecLoader::loadWideIO(Configuration& config, XMLElement* memspec)
+void ConfigurationLoader::loadWideIO(Configuration& config, XMLElement* memspec)
 {
     //MemSpecification
     XMLElement* architecture = memspec->FirstChildElement("memarchitecturespec");
 
     config.memSpec.NumberOfBanks = queryUIntParameter(architecture, "nbrOfBanks");
     config.memSpec.NumberOfBankGroups = 1;
+    config.memSpec.NumberOfRanks = 1;
     config.memSpec.BurstLength = queryUIntParameter(architecture, "burstLength");
     config.memSpec.nActivate = 2;
     config.memSpec.DataRate = queryUIntParameter(architecture, "dataRate");

dram/src/controller/core/configuration/ConfigurationLoader.h

@@ -0,0 +1,40 @@
+/*
+ * ConfigurationLoader.h
+ *
+ *  Created on: Apr 7, 2014
+ *      Author: jonny
+ */
+
+#ifndef CONFIGURATIONLOADER_H_
+#define CONFIGURATIONLOADER_H_
+
+#include <string>
+#include "../../../common/third_party/tinyxml2.h"
+#include "../../../common/Utils.h"
+#include "Configuration.h"
+
+namespace core {
+
+class ConfigurationLoader
+{
+public:
+    static void loadMemConfig(Configuration& config, std::string memconfigUri);
+    static void loadSimConfig(Configuration& config, std::string simconfigUri);
+    static void loadMemConfig(Configuration& config, tinyxml2::XMLElement* memconfig);
+    static void loadSimConfig(Configuration& config,tinyxml2::XMLElement* simconfig);
+
+    static void loadMemSpec(Configuration& config, std::string memspecUri);
+    static void loadMemSpec(Configuration& config, tinyxml2::XMLElement* memspec);
+
+private:
+    ConfigurationLoader(){}
+    static void loadConfig(Configuration& config, tinyxml2::XMLElement* configNode);
+
+    //specific loader
+    static void loadDDR4(Configuration& config, tinyxml2::XMLElement* memspec);
+    static void loadWideIO(Configuration& config, tinyxml2::XMLElement* memspec);
+};
+
+} /* namespace core */
+
+#endif /* CONFIGURATIONLOADER_H_ */

dram/src/controller/core/configuration/MemSpec.h

@@ -11,6 +11,7 @@
 #include <systemc.h>
 #include <map>
 #include "../../../common/dramExtension.h"
+
 namespace core{
 
 struct RefreshTiming
@@ -47,6 +48,7 @@ struct MemSpec
 
     unsigned int NumberOfBanks;
     unsigned int NumberOfBankGroups;
+    unsigned int NumberOfRanks;
     unsigned int BurstLength;
     unsigned int nActivate;
     unsigned int DataRate;

dram/src/controller/core/configuration/MemSpecLoader.h

@@ -1,32 +0,0 @@
-/*
- * MemSpecLoader.h
- *
- *  Created on: Apr 7, 2014
- *      Author: jonny
- */
-
-#ifndef MEMSPECLOADER_H_
-#define MEMSPECLOADER_H_
-
-#include <string>
-#include "../../../common/third_party/tinyxml2.h"
-#include "../../../common/Utils.h"
-#include "Configuration.h"
-
-namespace core {
-
-class MemSpecLoader
-{
-public:
-    void loadConfiguration(Configuration& config, std::string memspecUri, std::string memconfigUri);
-
-private:
-    void loadMemConfig(Configuration& config, tinyxml2::XMLElement* memspec);
-    void loadMemSpec(Configuration& config, tinyxml2::XMLElement* memspec);
-    void loadDDR4(Configuration& config, tinyxml2::XMLElement* memspec);
-    void loadWideIO(Configuration& config, tinyxml2::XMLElement* memspec);
-};
-
-} /* namespace core */
-
-#endif /* MEMSPECLOADER_H_ */

dram/src/controller/core/configuration/MemSpecLoader.h.autosave

@@ -0,0 +1,33 @@
+/*
+ * MemSpecLoader.h
+ *
+ *  Created on: Apr 7, 2014
+ *      Author: jonny
+ */
+
+#ifndef MEMSPECLOADER_H_
+#define MEMSPECLOADER_H_
+
+#include <string>
+#include "../../../common/third_party/tinyxml2.h"
+#include "../../../common/Utils.h"
+#include "Configuration.h"
+
+namespace core {
+
+class MemSpecLoader
+{
+public:
+    //void loadConfiguration(Configuration& config, std::string memspecUri, std::string memconfigUri);
+    static void loadMemConfig(std::string memconfigUri);
+    static void loadMemConfig(XMLElement* memconfig);
+private:
+    //void loadMemConfig(Configuration& config, tinyxml2::XMLElement* memspec);
+    //void loadMemSpec(Configuration& config, tinyxml2::XMLElement* memspec);
+    //void loadDDR4(Configuration& config, tinyxml2::XMLElement* memspec);
+    //void loadWideIO(Configuration& config, tinyxml2::XMLElement* memspec);
+};
+
+} /* namespace core */
+
+#endif /* MEMSPECLOADER_H_ */

dram/src/controller/core/powerdown/NoPowerDown.cpp

@@ -0,0 +1,26 @@
+#include "NoPowerDown.h"
+
+void core::NoPowerDown::triggerSleep(Bank /*bank*/, sc_time /*time*/)
+{
+    return;
+}
+
+void core::NoPowerDown::sleep(Bank /*bank*/, sc_time /*time*/)
+{
+    return;
+}
+
+void core::NoPowerDown::wakeUp(Bank /*bank*/, sc_time /*time*/)
+{
+    return;
+}
+
+void core::NoPowerDown::wakeUpForRefresh(Bank /*bank*/, sc_time /*time*/)
+{
+    return;
+}
+
+bool core::NoPowerDown::isInSelfRefresh(Bank /*bank*/)
+{
+    return false;
+}

dram/src/controller/core/powerdown/NoPowerDown.h

@@ -0,0 +1,37 @@
+#ifndef NOPOWERDOWN_H
+#define NOPOWERDOWN_H
+
+
+/*
+ * PowerDownManagerTimeout.h
+ *
+ *  Created on: May 5, 2014
+ *      Author: jungma
+ */
+
+#include "PowerDownManager.h"
+#include <systemc.h>
+#include "../../../common/dramExtension.h"
+#include "../scheduling/ScheduledCommand.h"
+
+
+namespace core {
+
+class NoPowerDown: public IPowerDownManager
+{
+public:
+    NoPowerDown(){}
+    virtual ~NoPowerDown(){}
+
+    virtual void triggerSleep(Bank bank, sc_time time) override;
+    virtual void sleep(Bank bank, sc_time time) override;
+
+    virtual void wakeUp(Bank bank, sc_time time) override;
+    virtual void wakeUpForRefresh(Bank bank, sc_time time) override;
+
+    virtual bool isInSelfRefresh(Bank bank) override;
+};
+
+}
+
+#endif // NOPOWERDOWN_H

dram/src/controller/core/powerdown/PowerDownManager.cpp

@@ -145,7 +145,7 @@ bool PowerDownManager::canSleep()
     return true;
 }
 
-bool PowerDownManager::isInSelfRefresh(Bank bank)
+bool PowerDownManager::isInSelfRefresh(Bank /*bank*/)
 {
     return powerDownState == PowerDownState::PDNSelfRefresh;
 }

dram/src/controller/core/powerdown/PowerDownManagerTimeout.cpp

@@ -29,10 +29,10 @@ PowerDownManagerTimeout::~PowerDownManagerTimeout()
 
 void PowerDownManagerTimeout::sleep(Bank bank, sc_time time)
 {
-    if(canSleep() && !isInPowerDown() && (time - controller.state.getLastScheduledCommand().getEnd()) >= Configuration::getInstance().powerDownTimeout)
+    if(canSleep() && !isInPowerDown() && (time - controller.state.getLastScheduledCommand().getEnd()) >= Configuration::getInstance().getPowerDownTimeout())
     {
         PowerDownState newState;
-        if(Configuration::getInstance().powerDownMode == PowerDownMode::TimeoutPDN)
+        if(Configuration::getInstance().PowerDownMode == EPowerDownMode::TimeoutPDN)
         {
             newState = controller.state.rowBufferStates.allRowBuffersAreClosed() ? PowerDownState::PDNPrecharge : PowerDownState::PDNActive;
         }
@@ -106,7 +106,7 @@ void PowerDownManagerTimeout::triggerSleep(Bank /*bank*/, sc_time time)
 {
     if(canSleep() && !isInPowerDown())
     {
-        controller.wrapper.send(PDNTrigger, time + controller.config.powerDownTimeout, powerDownPayloads[Bank(0)]);
+        controller.wrapper.send(PDNTrigger, time + controller.config.getPowerDownTimeout(), powerDownPayloads[Bank(0)]);
     }
 }
 

dram/src/controller/core/refresh/RefreshManager.cpp

@@ -79,7 +79,7 @@ void RefreshManager::planNextRefresh()
     controller.wrapper.send(REFTrigger, nextPlannedRefresh, refreshPayloads[Bank(0)]);
 }
 
-void RefreshManager::reInitialize(Bank bank, sc_time time)
+void RefreshManager::reInitialize(Bank /*bank*/, sc_time time)
 {
     nextPlannedRefresh = clkAlign(time, Alignment::DOWN);
     planNextRefresh();

dram/src/controller/core/scheduling/checker/PrechargeChecker.cpp

@@ -12,9 +12,9 @@ namespace core {
 
 void PrechargeChecker::delayToSatisfyConstraints(ScheduledCommand& command) const
 {
+    //return;
     sc_assert(command.getCommand() == Command::Precharge);
 
-
     ScheduledCommand lastCommand = state.getLastScheduledCommand(command.getBank());
 
     if (lastCommand.isValidCommand())
@@ -26,6 +26,7 @@ void PrechargeChecker::delayToSatisfyConstraints(ScheduledCommand& command) cons
         else if (lastCommand.getCommand() == Command::Write)
         {
             command.delayToMeetConstraint(lastCommand.getStart(), config.memSpec.tWL + getWriteAccessTime() + config.memSpec.tWR);
+
         }
         else if (lastCommand.getCommand() == Command::PDNAX)
         {

dram/src/controller/core/scheduling/checker/ReadChecker.cpp

@@ -20,6 +20,22 @@ void ReadChecker::delayToSatisfyConstraints(ScheduledCommand& command) const
 
     ScheduledCommand lastCommand = state.getLastScheduledCommand(command.getBank());
 
+    //fifo patch
+    if(config.Scheduler == "FIFO")
+    {
+
+        //no access can accelerate other access
+        ScheduledCommand lastread = state.getLastCommand(Command::Read);
+        ScheduledCommand lastwrite = state.getLastCommand(Command::Write);
+        ScheduledCommand lastreada = state.getLastCommand(Command::ReadA);
+        ScheduledCommand lastwritea = state.getLastCommand(Command::WriteA);
+
+        command.delayToMeetConstraint(lastread.getStart(), SC_ZERO_TIME);
+        command.delayToMeetConstraint(lastreada.getStart(), SC_ZERO_TIME);
+        command.delayToMeetConstraint(lastwrite.getStart(), SC_ZERO_TIME);
+        command.delayToMeetConstraint(lastwritea.getStart(), SC_ZERO_TIME);
+    }
+
     if (lastCommand.isValidCommand())
     {
         if (lastCommand.getCommand() == Command::Activate)

dram/src/controller/core/scheduling/checker/WriteChecker.cpp

@@ -18,6 +18,22 @@ void WriteChecker::delayToSatisfyConstraints(ScheduledCommand& command) const
 
 	ScheduledCommand lastCommand = state.getLastScheduledCommand(command.getBank());
 
+    //fifo patch
+    if(config.Scheduler == "FIFO")
+    {
+
+        //no access can accelerate other access
+        ScheduledCommand lastread = state.getLastCommand(Command::Read);
+        ScheduledCommand lastwrite = state.getLastCommand(Command::Write);
+        ScheduledCommand lastreada = state.getLastCommand(Command::ReadA);
+        ScheduledCommand lastwritea = state.getLastCommand(Command::WriteA);
+
+        command.delayToMeetConstraint(lastread.getStart(), SC_ZERO_TIME);
+        command.delayToMeetConstraint(lastreada.getStart(), SC_ZERO_TIME);
+        command.delayToMeetConstraint(lastwrite.getStart(), SC_ZERO_TIME);
+        command.delayToMeetConstraint(lastwritea.getStart(), SC_ZERO_TIME);
+    }
+
 	if (lastCommand.isValidCommand())
 	{
 		if (lastCommand.getCommand() == Command::Activate)

dram/src/controller/core/scheduling/checker/WriteChecker.h

@@ -29,8 +29,6 @@ private:
 	bool collidesWithStrobeCommand(ScheduledCommand& write, ScheduledCommand& strobeCommand) const;
 	const Configuration& config;
 	ControllerState& state;
-
-
 };
 
 } /* namespace controller */

dram/src/controller/scheduler/Fifo.cpp

@@ -17,35 +17,32 @@ bool Fifo::hasPayloads()
 
 void Fifo::schedule(gp* payload)
 {
-    buffer[DramExtension::getExtension(payload).getBank()].push_back(payload);
+    buffer.push_back(payload);
 }
 
 gp* Fifo::getNextPayload()
 {
-    for(Bank bank: controllerCore.getFreeBanks())
+    if(!buffer.empty())
     {
-        if(!buffer[bank].empty())
+        DramExtension& frontRequest = DramExtension::getExtension(buffer.front());
+        vector<Bank> freeBanks = controllerCore.getFreeBanks();
+        if(std::find(freeBanks.begin(),freeBanks.end(),frontRequest.getBank()) != freeBanks.end())
         {
-            return buffer[bank].front();
+            return buffer.front();
         }
     }
 
     return NULL;
 }
 
-void Fifo::removePayload(gp* payload)
+void Fifo::removePayload(gp* /*payload*/)
 {
-    buffer[DramExtension::getExtension(payload).getBank()].pop_front();
+    buffer.pop_front();
 }
 
 unsigned int Fifo::getNumberOfQueuedPayloads()
 {
-    unsigned int numberOfQueuedPayloads = 0;
-    for(auto& bufferElement : buffer)
-    {
-        numberOfQueuedPayloads += bufferElement.second.size();
-    }
-    return numberOfQueuedPayloads;
+    return buffer.size();
 }
 
 } /* namespace scheduler */

dram/src/controller/scheduler/Fifo.h

@@ -30,7 +30,7 @@ public:
     virtual void removePayload(gp* payload) override;
 
 private:
-    std::map<Bank, std::deque<gp*>> buffer;
+    std::deque<gp*> buffer;
     core::ControllerCore &controllerCore;
     unsigned int getNumberOfQueuedPayloads();
 };

dram/src/controller/scheduler/readwritegrouper.cpp

@@ -94,6 +94,7 @@ gp *ReadWriteGrouper::getNextPayload()
     else
     {
         sc_assert(false);
+        return NULL;
     }
 }
 
@@ -127,7 +128,10 @@ bool ReadWriteGrouper::hasPayloads()
     else if(batches.size() == 2)
         return (getLatestReadBatch().hasPayloads() || getLatestWriteBatch().hasPayloads());
     else
+    {
         sc_assert(false);
+        return NULL;
+    }
 }
 
 

dram/src/simulation/Dram.h

@@ -32,6 +32,9 @@ using namespace Data;
 
 
 #define POWER //not better to define in simulation xml? also flag for storage simulation
+//configuration->PowerAnalysys
+//configuration->ModelStorage
+//configuration->ModelErrotInjection
 
 #ifdef POWER
         #define IFPOW(x) x

dram/src/simulation/ISimulation.h

@@ -1,17 +0,0 @@
-#ifndef ISIMULATION_H_
-#define ISIMULATION_H_
-
-
-namespace simulation {
-
-class ISimulation
-{
-public:
-	virtual ~ISimulation(){}
-	virtual void transactionFinished() = 0;
-};
-
-}  // namespace simulation
-
-
-#endif

dram/src/simulation/Simulation.cpp

@@ -10,17 +10,17 @@
 #include "../common/DebugManager.h"
 #include "../common/xmlAddressdecoder.h"
 #include "../controller/core/ControllerCore.h"
+#include "../controller/core/configuration/ConfigurationLoader.h"
 #include <stdlib.h>
 #include <iostream>
 #include <fstream>
 #include <vector>
 #include "../common/Utils.h"
 #include "../error/flip_memory.h"
+#include "StlPlayer.h"
 
 using namespace std;
 
-namespace simulation {
-
 Simulation::Simulation(sc_module_name /*name*/, string pathToResources, string traceName, DramSetup setup,
                        std::vector<Device> devices) :
     traceName(traceName), dramSetup(setup)
@@ -28,26 +28,29 @@ Simulation::Simulation(sc_module_name /*name*/, string pathToResources, string t
 {
     SC_THREAD(stop);
 
-    xmlAddressDecoder::addressConfigURI = pathToResources + string("configs/amconfigs/") + setup.addressmapping;
+    xmlAddressDecoder::Initialize(setup.addressmapping);
+    xmlAddressDecoder::getInstance().print();
 
-    Configuration::memconfigUri = pathToResources + string("configs/memconfigs/") + setup.memconfig;
-    Configuration::memspecUri = pathToResources + string("configs/memspecs/") + setup.memspec;
+    ConfigurationLoader::loadMemConfig(Configuration::getInstance(), setup.memconfig);//pathToResources + string("configs/memconfigs/") + setup.memconfig);
+    ConfigurationLoader::loadMemSpec(Configuration::getInstance(), setup.memspec);//pathToResources + string("configs/memspecs/") + setup.memspec);
+    ConfigurationLoader::loadSimConfig(Configuration::getInstance(), setup.simconfig);
 
     setupTlmRecorder(traceName, pathToResources, setup, devices);
     instantiateModules(pathToResources, devices);
     bindSockets();
     setupDebugManager(traceName);
-    calculateNumberOfTransaction(devices, pathToResources);
 }
 
 
 void Simulation::setupDebugManager(const string& traceName)
 {
     auto& dbg = DebugManager::getInstance();
-
     dbg.addToWhiteList(controller->name());
-    dbg.addToWhiteList(player2->name());
     dbg.addToWhiteList(player1->name());
+    dbg.addToWhiteList(player2->name());
+    dbg.addToWhiteList(player3->name());
+    dbg.addToWhiteList(player4->name());
+
     dbg.addToWhiteList(this->name());
     dbg.addToWhiteList(Scheduler::sendername);
     dbg.addToWhiteList(TlmRecorder::senderName);
@@ -62,13 +65,13 @@ void Simulation::setupDebugManager(const string& traceName)
 
 void Simulation::setupTlmRecorder(const string &traceName, const string &pathToResources, const DramSetup &setup, const std::vector<Device> &devices)
 {
-    if(Configuration::getInstance().databaseRecordingEnabled)
+    if(Configuration::getInstance().DatabaseRecording)
     {
         TlmRecorder::recordingEnabled = true;
         TlmRecorder::dbName = traceName;
         TlmRecorder::sqlScriptURI = pathToResources + string("scripts/createTraceDB.sql");
-        TlmRecorder::getInstance().recordMemconfig(setup.memconfig);
-        TlmRecorder::getInstance().recordMemspec(setup.memspec);
+        TlmRecorder::getInstance().recordMemconfig(Configuration::getInstance().memconfigUri);
+        TlmRecorder::getInstance().recordMemspec(Configuration::getInstance().memspecUri);
         TlmRecorder::getInstance().recordTracenames(devices[0].trace + "," + devices[1].trace + "," + devices[2].trace + "," + devices[3].trace);
     }
     else
@@ -83,19 +86,20 @@ void Simulation::instantiateModules(const string &pathToResources, const std::ve
     dram = new Dram<>("dram");
     arbiter = new Arbiter<NumberOfTracePlayers, 128>("arbiter");
     controller = new Controller<>("controller");
-    reorder = new ReorderBuffer<>("reorder");
+    //reorder = new ReorderBuffer<>("reorder");
 
-    player1 = new TracePlayer<>("player1", pathToResources + string("traces/") + devices[0].trace, devices[0].burstLength, devices[0].clkMhz, this);
-    player2 = new TracePlayer<>("player2", pathToResources + string("traces/") + devices[1].trace, devices[1].burstLength, devices[1].clkMhz, this);
-    player3 = new TracePlayer<>("player3", pathToResources + string("traces/") + devices[2].trace, devices[2].burstLength, devices[2].clkMhz, this);
-    player4 = new TracePlayer<>("player4", pathToResources + string("traces/") + devices[3].trace, devices[3].burstLength, devices[3].clkMhz, this);
+    player1 = new StlPlayer<>("player1", pathToResources + string("traces/") + devices[0].trace,  devices[0].clkMhz, this);
+    //player1 = new TraceGenerator<>("player1", 0, this);
+    player2 = new StlPlayer<>("player2", pathToResources + string("traces/") + devices[1].trace,  devices[1].clkMhz, this);
+    player3 = new StlPlayer<>("player3", pathToResources + string("traces/") + devices[2].trace,  devices[2].clkMhz, this);
+    player4 = new StlPlayer<>("player4", pathToResources + string("traces/") + devices[3].trace,  devices[3].clkMhz, this);
 }
 
 void Simulation::bindSockets()
 {
-    //player1->iSocket.bind(arbiter->tSockets[0]);
-    player1->iSocket.bind(reorder->tSocket);
-    reorder->iSocket.bind(arbiter->tSockets[0]);
+    player1->iSocket.bind(arbiter->tSockets[0]);
+    //player1->iSocket.bind(reorder->tSocket);
+    //reorder->iSocket.bind(arbiter->tSockets[0]);
 
     player2->iSocket.bind(arbiter->tSockets[1]);
     player3->iSocket.bind(arbiter->tSockets[2]);
@@ -104,15 +108,6 @@ void Simulation::bindSockets()
     controller->iSocket.bind(dram->tSocket);
 }
 
-void Simulation::calculateNumberOfTransaction(std::vector<Device> devices, string pathToResources)
-{
-    totalTransactions = getNumberOfLines(pathToResources + string("traces/") + devices[0].trace);
-    totalTransactions += getNumberOfLines(pathToResources + string("traces/") + devices[1].trace);
-    totalTransactions += getNumberOfLines(pathToResources + string("traces/") + devices[2].trace);
-    totalTransactions += getNumberOfLines(pathToResources + string("traces/") + devices[3].trace);
-    remainingTransactions = totalTransactions;
-}
-
 Simulation::~Simulation()
 {
     delete dram;
@@ -130,24 +125,23 @@ void Simulation::start()
     report(headline);
     report("  -> setup: \t\t" + getFileName(traceName));
     report("  -> memspec: \t\t" + Configuration::getInstance().memSpec.MemoryId);
-    report("  -> transactions: \t" + to_string(totalTransactions));
     cout << endl;
     simulationStartTime = clock();
-    player1->start();
-    player2->start();
-    player3->start();
-    player4->start();
+    player1->nextPayload();
+    player2->nextPayload();
+    player3->nextPayload();
+    player4->nextPayload();
     sc_set_stop_mode(SC_STOP_FINISH_DELTA);
     sc_start();
 }
 
-void inline Simulation::transactionFinished()
+void inline Simulation::tracePlayerTerminates()
 {
-    remainingTransactions--;
-    loadbar(totalTransactions - remainingTransactions, totalTransactions);
-    if (remainingTransactions == 0)
+    static unsigned int finishedTracePlayers = 0;
+    finishedTracePlayers++;
+
+    if (finishedTracePlayers == NumberOfTracePlayers)
     {
-        cout << endl;
         terminateSimulation.notify();
     }
 }
@@ -169,15 +163,3 @@ void Simulation::report(string message)
     DebugManager::getInstance().printDebugMessage(this->name(), message);
     cout << message << endl;
 }
-
-unsigned int Simulation::getNumberOfLines(string uri)
-{
-    std::ifstream file(uri);
-    // count the newlines
-    file.unsetf(std::ios_base::skipws);
-    unsigned lineCount = std::count(std::istream_iterator<char>(file), std::istream_iterator<char>(), '\n');
-    return lineCount;
-}
-
-} /* namespace simulation */
-

dram/src/simulation/Simulation.h

@@ -11,23 +11,24 @@
 #include "Dram.h"
 #include "Arbiter.h"
 #include "TracePlayer.h"
+#include "TraceGenerator.h"
 #include "ReorderBuffer.h"
 #include "../controller/Controller.h"
-#include "ISimulation.h"
 #include <string>
 #include <systemc.h>
+#include "TracePlayerListener.h"
+#include "../common/third_party/tinyxml2.h"
 #include "../error/flip_memory.h"
 
-
-namespace simulation {
-
 struct DramSetup
 {
-    DramSetup():memconfig(""),memspec(""){}
-    DramSetup(std::string memconfig, std::string memspec, std::string addressmapping) : memconfig(memconfig), memspec(memspec), addressmapping(addressmapping) {}
-    std::string memconfig;
-    std::string memspec;
-    std::string addressmapping;
+    DramSetup():memspec(NULL),memconfig(NULL),simconfig(NULL),addressmapping(NULL){}
+    DramSetup(tinyxml2::XMLElement* memspec, tinyxml2::XMLElement* memconfig, tinyxml2::XMLElement* simconfig, tinyxml2::XMLElement* addressmapping)
+        : memspec(memspec), memconfig(memconfig), simconfig(simconfig), addressmapping(addressmapping) {}
+    tinyxml2::XMLElement* memspec;
+    tinyxml2::XMLElement* memconfig;
+    tinyxml2::XMLElement* simconfig;
+    tinyxml2::XMLElement* addressmapping;
 };
 
 struct Device
@@ -41,7 +42,7 @@ struct Device
     unsigned int burstLength;
 };
 
-class Simulation: public ISimulation, public sc_module
+class Simulation: public sc_module, public TracePlayerListener
 {
 public:
     SC_HAS_PROCESS(Simulation);
@@ -52,7 +53,7 @@ public:
     void start();
     void stop();
 
-    void inline transactionFinished() override;
+    virtual void tracePlayerTerminates() override;
     constexpr static unsigned int NumberOfTracePlayers = 4;
 
 private:
@@ -71,19 +72,12 @@ private:
     TracePlayer<> *player3;
     TracePlayer<> *player4;
 
-    unsigned int totalTransactions;
-    unsigned int remainingTransactions;
     clock_t simulationStartTime;
-    unsigned int getNumberOfLines(string uri);
-
     void report(std::string message);
     void setupDebugManager(const string& traceName);
     void setupTlmRecorder(const string &traceName, const string &pathToResources, const DramSetup &setup, const std::vector<Device> &devices);
     void instantiateModules(const string &pathToResources, const std::vector<Device> &devices);
     void bindSockets();
-    void calculateNumberOfTransaction(std::vector<Device> devices, string pathToResources);
 };
 
-} /* namespace simulation */
-
 #endif /* SIMULATIONMANAGER_H_ */

dram/src/simulation/SimulationManager.cpp

@@ -11,12 +11,9 @@
 #include "../common/Utils.h"
 using namespace std;
 using namespace tinyxml2;
-using namespace simulation;
 
-namespace simulation {
 
-SimulationManager::SimulationManager(string resources) :
-        silent(false), resources(resources)
+SimulationManager::SimulationManager(string resources) : resources(resources)
 {
 }
 
@@ -26,28 +23,26 @@ SimulationManager::~SimulationManager()
 
 void SimulationManager::loadSimulationsFromXML(string uri)
 {
-    cout << "\n\nLoad Simulation-Batchs:" << endl;
+    cout << "\n\nload simulation-batch:" << endl;
     cout << headline << endl;
-    cout << "\t-> load simulations .." << endl;
 
     exportPath = getFileName(uri);
-    XMLDocument doc;
-    loadXML(uri, doc);
+
+    //basePath = boost::filesystem::path(uri).parent_path();
+
+    loadXML(uri, simulationdoc);
 
     cout << "\t-> parsing simulation objects .." << endl;
 
-    for (XMLElement* element = doc.FirstChildElement("simulation"); element != NULL;
-            element = element->NextSiblingElement("simulation"))
-    {
-        parseSimulationBatch(element);
-    }
-
-    cout << "\t-> checking paths .." << endl;
-    checkPaths();
+    XMLElement* simulation = simulationdoc.FirstChildElement("simulation");
+    string xmlNodeName(simulation->Name());
+    if( xmlNodeName != "simulation")
+        reportFatal("SimulationManager", "simulation node expected");
+    parseSimulationBatch(simulation);
 
     cout << "\t-> simulation batches loaded successfully!\n" << endl;
 
-    for (auto batch : simulationsBatches)
+    for (auto batch : simulationBatches)
     {
         batch.print();
     }
@@ -55,22 +50,17 @@ void SimulationManager::loadSimulationsFromXML(string uri)
 
 void SimulationManager::runSimulations()
 {
-    for (auto& batch : simulationsBatches)
+    for (auto& batch : simulationBatches)
     {
-        boost::filesystem::path dir(exportPath + "/" + batch.simulationName);
+        boost::filesystem::path dir(exportPath);// + "/" + batch.simulationName);
         boost::filesystem::create_directories(dir);
 
         for (auto& dramSetup : batch.dramSetups)
         {
-            string memconfig = getFileName(dramSetup.memconfig);
-            string memspec = getFileName(dramSetup.memspec);
-            string addressmappig = getFileName(dramSetup.addressmapping);
-
             for (auto& traceSetup : batch.traceSetups)
             {
-                runSimulation(
-                        exportPath + "/" + batch.simulationName + "/" + traceSetup.first + "-" + memspec  + "-" +
-                                  memconfig + ".tdb", dramSetup, traceSetup.second);
+                string exportname = exportPath + "/" + traceSetup.first + ".tdb";
+                runSimulation(exportname, dramSetup, traceSetup.second);
             }
         }
     }
@@ -80,64 +70,70 @@ void SimulationManager::parseSimulationBatch(XMLElement* simulation)
 {
     SimulationBatch batch;
 
-    batch.simulationName = simulation->Attribute("id");
+    XMLElement* simconfig = simulation->FirstChildElement("simconfig");
 
-    string memspecUri;
-    string addressmappingUri;
+    XMLElement* memspecs = simulation->FirstChildElement("memspecs");
+    if(memspecs == NULL) memspecs = simulation;
 
-    for (XMLElement* element = simulation->FirstChildElement("memspec"); element != NULL;
-            element = element->NextSiblingElement("memspec"))
+    XMLElement* addressmappings = simulation->FirstChildElement("addressmappings");
+    if(addressmappings == NULL) addressmappings = simulation;
+
+    XMLElement* memconfigs = simulation->FirstChildElement("memconfigs");
+    if(memconfigs == NULL) memconfigs = simulation;
+
+
+
+    for (XMLElement* memspec = memspecs->FirstChildElement("memspec"); memspec != NULL;
+            memspec = memspec->NextSiblingElement("memspec"))
     {
-        memspecUri = element->GetText();
-        for (XMLElement* element = simulation->FirstChildElement("addressmapping"); element != NULL;
-                element = element->NextSiblingElement("addressmapping"))
+
+        for (XMLElement* addressmapping = addressmappings->FirstChildElement("addressmapping"); addressmapping != NULL;
+                addressmapping = addressmapping->NextSiblingElement("addressmapping"))
         {
-            addressmappingUri = element->GetText();
-            for (XMLElement* element = simulation->FirstChildElement("memconfigs")->FirstChildElement("memconfig");
-                    element != NULL; element = element->NextSiblingElement("memconfig"))
+
+            for (XMLElement* memconfig = memconfigs->FirstChildElement("memconfig");
+                    memconfig != NULL; memconfig = memconfig->NextSiblingElement("memconfig"))
             {
-                batch.dramSetups.push_back(DramSetup(element->GetText(), memspecUri, addressmappingUri));
+                batch.dramSetups.push_back(DramSetup(memspec, memconfig, simconfig, addressmapping));
             }
         }
     }
 
-    for (XMLElement* element = simulation->FirstChildElement("trace-setups")->FirstChildElement("trace-setup"); element != NULL;
-            element = element->NextSiblingElement("trace-setup"))
+    XMLElement* tracesetups = simulation->FirstChildElement("tracesetups");
+    if(tracesetups == NULL) tracesetups = simulation;
+
+    for (XMLElement* tracesetup = tracesetups->FirstChildElement("tracesetup"); tracesetup != NULL;
+            tracesetup = tracesetup->NextSiblingElement("tracesetup"))
     {
-        addTraceSetup(batch, element);
+        addTraceSetup(batch, tracesetup);
     }
 
-    simulationsBatches.push_back(batch);
+    simulationBatches.push_back(batch);
 
 }
 
-void SimulationManager::checkPaths()
-{
-    //reportFatal("Simulation Manager", "Not all paths in xml are valid");
-}
-
 void SimulationManager::runSimulation(string traceName, DramSetup dramSetup, vector<Device> traceSetup)
 {
-    int pid = fork();
-    int status = 0;
-    if (pid == 0)
-    {
+//    int pid = fork();
+//    int status = 0;
+//    if (pid == 0)
+//    {
         Simulation* simulation = new Simulation("sim", resources, traceName, dramSetup, traceSetup);
         simulation->start();
         delete simulation;
-        _Exit(0);
-    }
+    //    _Exit(0);
+    //}
 
-    waitpid(pid, &status, 0);
+    //waitpid(pid, &status, 0);
 }
 
 void SimulationManager::startTraceAnalyzer()
 {
     string p = getenv("trace");
     string run_tpr = p + " -f ";
-    for (auto batch : simulationsBatches)
+    for (auto batch : simulationBatches)
     {
-        run_tpr += exportPath + "/" + batch.simulationName + " ";
+       // run_tpr += exportPath + "/" + batch.simulationName + " ";
 
     }
     run_tpr += "&";
@@ -182,6 +178,3 @@ void SimulationBatch::print()
     }
 }
 
-}
-/* namespace simulation */
-

dram/src/simulation/SimulationManager.h

@@ -14,13 +14,9 @@
 #include "Simulation.h"
 #include "../common/third_party/tinyxml2.h"
 
-namespace simulation {
-
 struct SimulationBatch
 {
-	std::string simulationName;
-
-	std::vector<simulation::DramSetup> dramSetups;
+    std::vector<DramSetup> dramSetups;
 	std::map<std::string, std::vector<Device>> traceSetups;
 	void print();
 };
@@ -36,21 +32,20 @@ public:
 	void runSimulations();
 	void startTraceAnalyzer();
 
-	bool silent;
 private:
 	std::string resources;
 	std::string exportPath;
+    std::string basePath;
 
-	std::vector<SimulationBatch> simulationsBatches;
+    tinyxml2::XMLDocument simulationdoc;
+
+	std::vector<SimulationBatch> simulationBatches;
 
 	void runSimulation(std::string traceName, DramSetup dramSetup, std::vector<Device> traceSetup);
 	void parseSimulationBatch(tinyxml2::XMLElement* simulation);
 	void addTraceSetup(SimulationBatch& batch, tinyxml2::XMLElement* element);
-	void checkPaths();
 
 	void report(std::string message);
 };
 
-} /* namespace simulation */
-
 #endif /* SIMULATIONMANAGER_H_ */

dram/src/simulation/StlPlayer.h

@@ -0,0 +1,114 @@
+#ifndef STLPLAYER_H
+#define STLPLAYER_H
+
+
+#include "../common/xmlAddressdecoder.h"
+#include "TracePlayer.h"
+
+using namespace std;
+using namespace tlm;
+
+template<unsigned int BUSWIDTH = 128>
+struct StlPlayer: public TracePlayer<BUSWIDTH>
+{
+public:
+    StlPlayer(sc_module_name /*name*/, string pathToTrace, unsigned int clkMhz,
+              TracePlayerListener* listener);
+    virtual void nextPayload() override
+    {
+        string line;
+        while(line.empty() && file)
+        {
+            std::getline(file, line);
+        }
+
+        if(!file)
+        {
+            this->terminate();
+            return;
+        }
+
+
+        std::istringstream iss(line);
+        string time, command, address;
+        iss >> time >> command >> address;
+        long parsedAdress = std::stoi(address.c_str(), 0, 16);
+
+        gp* payload = this->allocatePayload();
+        unsigned char * dataElement = new unsigned char[16]; // TODO: column / burst breite
+
+        payload->set_address(parsedAdress);
+        payload->set_response_status(TLM_INCOMPLETE_RESPONSE);
+        payload->set_dmi_allowed(false);
+        payload->set_byte_enable_length(0);
+        payload->set_streaming_width(burstlenght);
+        this->setDataPointer(payload, dataElement);
+
+        if (command == "read")
+        {
+            payload->set_command(TLM_READ_COMMAND);
+        }
+        else if (command == "write")
+        {
+            payload->set_command(TLM_WRITE_COMMAND);
+
+            // Parse and set data
+            string data;
+            iss >> data;
+
+            if(!data.empty())
+            {
+                //cout << "parsing write data: " << data << std::endl;
+
+                for(int i = 0; i < 16; i++) // TODO column / burst breite
+                {
+                    std::string byteString = "0x";
+                    byteString.append(data.substr(2*(i+1), 2));
+                    //cout << byteString << " " << std::stoi(byteString.c_str(), 0, 16) << endl;
+                    dataElement[i] = std::stoi(byteString.c_str(), 0, 16);
+                }
+            }
+        }
+        else
+        {
+            SC_REPORT_FATAL(0,
+                            (string("Corrupted tracefile, command ") + command + string(" unknown")).c_str());
+        }
+
+        sc_time sendingTime = std::stoi(time.c_str())*clk;
+
+        if (sendingTime <= sc_time_stamp())
+        {
+            this->payloadEventQueue.notify(*payload, BEGIN_REQ, SC_ZERO_TIME);
+        }
+        else
+        {
+            this->payloadEventQueue.notify(*payload, BEGIN_REQ, sendingTime - sc_time_stamp());
+        }
+    }
+
+
+private:
+    ifstream file;
+    unsigned int burstlenght;
+    sc_time clk;
+};
+
+
+template<unsigned int BUSWIDTH>
+StlPlayer<BUSWIDTH>::StlPlayer(sc_module_name /*name*/, string pathToTrace, unsigned int clkMhz,
+                               TracePlayerListener* listener) :
+    TracePlayer<BUSWIDTH>(listener),file(pathToTrace)
+{
+    if (!file.is_open())
+        SC_REPORT_FATAL(0, (string("Could not open trace ") + pathToTrace).c_str());
+
+    if(clkMhz == 0)
+        clk = core::Configuration::getInstance().memSpec.clk;
+    else
+        clk = core::FrequencyToClk(clkMhz);
+
+    this->burstlenght = core::Configuration::getInstance().memSpec.BurstLength;
+}
+
+#endif // STLPLAYER_H

dram/src/simulation/TraceGenerator.h

@@ -0,0 +1,61 @@
+#ifndef TRACEGENERATOR_H
+#define TRACEGENERATOR_H
+
+
+#include "TracePlayer.h"
+
+using namespace std;
+using namespace tlm;
+
+template<unsigned int BUSWIDTH = 128>
+struct TraceGenerator: public TracePlayer<BUSWIDTH>
+{
+public:
+    TraceGenerator(sc_module_name /*name*/, unsigned int clkMhz,
+              TracePlayerListener* listener);
+
+    virtual void nextPayload() override
+    {
+            if(transCounter >= 1000) // TODO set limit!
+            {
+                this->terminate();
+            }
+
+            gp* payload = this->allocatePayload();
+
+            unsigned char * dataElement = new unsigned char[16]; // TODO: column / burst breite
+
+            payload->set_address(0x0);
+            payload->set_response_status(TLM_INCOMPLETE_RESPONSE);
+            payload->set_dmi_allowed(false);
+            payload->set_byte_enable_length(0);
+            payload->set_streaming_width(this->burstlenght);
+            this->setDataPointer(payload, dataElement);
+            payload->set_command(TLM_READ_COMMAND);
+
+            transCounter++;
+            this->payloadEventQueue.notify(*payload, BEGIN_REQ, SC_ZERO_TIME);
+    }
+
+
+private:
+    unsigned int burstlenght;
+    sc_time clk;
+    unsigned int transCounter;
+};
+
+
+template<unsigned int BUSWIDTH>
+TraceGenerator<BUSWIDTH>::TraceGenerator(sc_module_name /*name*/, unsigned int clkMhz,
+                               TracePlayerListener* listener) :
+    TracePlayer<BUSWIDTH>(listener), transCounter(0)
+{
+    if(clkMhz == 0)
+        clk = core::Configuration::getInstance().memSpec.clk;
+    else
+        clk = core::FrequencyToClk(clkMhz);
+
+    this->burstlenght = core::Configuration::getInstance().memSpec.BurstLength;
+}
+
+#endif

dram/src/simulation/TracePlayer.h

@@ -16,13 +16,13 @@
 #include <iostream>
 #include <string>
 #include "MemoryManager.h"
-#include "ISimulation.h"
 #include "../controller/core/configuration/Configuration.h"
 #include "../common/DebugManager.h"
 #include "../common/xmlAddressdecoder.h"
 #include "../common/TlmRecorder.h"
 #include "../common/dramExtension.h"
 #include "../controller/core/TimingCalculation.h"
+#include "TracePlayerListener.h"
 
 using namespace std;
 using namespace tlm;
@@ -32,201 +32,65 @@ struct TracePlayer: public sc_module
 {
 public:
     tlm_utils::simple_initiator_socket<TracePlayer, BUSWIDTH, tlm::tlm_base_protocol_types> iSocket;
-    TracePlayer(sc_module_name /*name*/, string pathToTrace, unsigned int burstLength, unsigned int clkMhz,
-                simulation::ISimulation* simulationManager);
+    TracePlayer(TracePlayerListener* listener);
+    virtual void nextPayload() = 0;
 
-    void start();
+protected:
+    gp* allocatePayload();
+    tlm_utils::peq_with_cb_and_phase<TracePlayer> payloadEventQueue;
+    void terminate();
+    void setDataPointer(gp* p, unsigned char * data);
+    void printDebugMessage(std::string message);
 
 private:
-    void generateNextPayload();
     tlm_sync_enum nb_transport_bw(tlm_generic_payload& payload, tlm_phase& phase, sc_time& bwDelay);
     void peqCallback(tlm_generic_payload& payload, const tlm_phase& phase);
     void sendToTarget(tlm_generic_payload& payload, const tlm_phase& phase, const sc_time& delay);
-    tlm_utils::peq_with_cb_and_phase<TracePlayer> payloadEventQueue;
 
     MemoryManager memoryManager;
-    ifstream file;
-    unsigned int burstlenght;
-    sc_time clk;
-    unsigned int numberOfPendingTransactions;
     unsigned int transactionsSent;
-    unsigned int transactionsReceived;
-    simulation::ISimulation* simulationManager;
+    TracePlayerListener* listener;
 };
 
 
+
 template<unsigned int BUSWIDTH>
-TracePlayer<BUSWIDTH>::TracePlayer(sc_module_name, string pathToTrace, unsigned int burstLength, unsigned int clkMhz, simulation::ISimulation *simulationManager) :
-    payloadEventQueue(this, &TracePlayer<BUSWIDTH>::peqCallback), file(pathToTrace), burstlenght(burstLength),
-    numberOfPendingTransactions(0), transactionsSent(0), transactionsReceived(0), simulationManager(simulationManager)
+TracePlayer<BUSWIDTH>::TracePlayer(TracePlayerListener* listener) :
+    payloadEventQueue(this, &TracePlayer<BUSWIDTH>::peqCallback), transactionsSent(0), listener(listener)
 {
-    if (!file.is_open())
-        SC_REPORT_FATAL(0, (string("Could not open trace ") + pathToTrace).c_str());
-
-    if(clkMhz == 0)
-        clk = core::Configuration::getInstance().memSpec.clk;
-    else
-        clk = core::FrequencyToClk(clkMhz);
-
-    this->burstlenght = core::Configuration::getInstance().memSpec.BurstLength;
     iSocket.register_nb_transport_bw(this, &TracePlayer<BUSWIDTH>::nb_transport_bw);
 }
 
+
 template<unsigned int BUSWIDTH>
-void TracePlayer<BUSWIDTH>::start()
+gp *TracePlayer<BUSWIDTH>::allocatePayload()
 {
-    bool fileIsEmpty = file.peek() == std::ifstream::traits_type::eof();
-    if (!fileIsEmpty)
-    {
-        generateNextPayload();
-    }
+    return memoryManager.allocate();
 }
 
 template<unsigned int BUSWIDTH>
-void TracePlayer<BUSWIDTH>::generateNextPayload()
+void TracePlayer<BUSWIDTH>::terminate()
 {
-
-    if(file)
-    {
-        string line;
-        if (std::getline(file, line))
-        {
-            std::istringstream iss(line);
-            string time, command, address;
-            iss >> time >> command >> address;
-            if (time.empty() || command.empty() || address.empty() )
-                return;
-            unsigned int parsedAdress = std::stoi(address.c_str(), 0, 16);
-
-            gp* payload = memoryManager.allocate();
-            payload->set_address(parsedAdress);
-
-            // Set data pointer
-            unsigned char * dataElement = new unsigned char[16*2]; // TODO: column / burst breite
-            payload->set_data_length(16*2); // TODO: column / burst breite
-            payload->set_data_ptr(dataElement);
-            for(int i = 0; i < 16*2; i++) // TODO: column / burst breite
-                dataElement[i] = 0;
-
-            if (command == "read")
-            {
-                payload->set_command(TLM_READ_COMMAND);
-            }
-            else if (command == "write")
-            {
-                payload->set_command(TLM_WRITE_COMMAND);
-
-                // Parse and set data
-                string data;
-                iss >> data;
-
-                if(!data.empty())
-                {
-                    //cout << "parsing write data: " << data << std::endl;
-
-                    for(int i = 0; i < 16*2; i++) // TODO column / burst breite
-                    {
-                        std::string byteString = "0x";
-                        byteString.append(data.substr(2*(i+1), 2));
-                        //cout << byteString << " " << std::stoi(byteString.c_str(), 0, 16) << endl;
-                        dataElement[i] = std::stoi(byteString.c_str(), 0, 16);
-                    }
-                }
-            }
-            else
-            {
-                SC_REPORT_FATAL(0,
-                                (string("Corrupted tracefile, command ") + command + string(" unknown")).c_str());
-            }
-
-            payload->set_response_status(TLM_INCOMPLETE_RESPONSE);
-            payload->set_dmi_allowed(false);
-            payload->set_byte_enable_length(0);
-            payload->set_streaming_width(burstlenght);
-
-            sc_time sendingTime = std::stoull(time.c_str())*clk;
-            GenerationExtension* genExtension = new GenerationExtension(sendingTime);
-            payload->set_auto_extension(genExtension);
-
-            if (sendingTime <= sc_time_stamp())
-            {
-                payloadEventQueue.notify(*payload, BEGIN_REQ, SC_ZERO_TIME);
-            }
-            else
-            {
-                payloadEventQueue.notify(*payload, BEGIN_REQ, sendingTime - sc_time_stamp());
-            }
-            numberOfPendingTransactions++;
-
-        }
-    }
+    cout << sc_time_stamp() << " " << this->name() << " terminated" << std::endl;
+    listener->tracePlayerTerminates();
 }
-    //    if (file)
-    //    {
-    //        string time, command, address, data;
-    //        file >> time >> command >> address;
 
-    //        //if there is a newline at the end of the .stl
-    //        if (time.empty() || command.empty() || address.empty() )
-    //            return;
+template<unsigned int BUSWIDTH>
+void TracePlayer<BUSWIDTH>::printDebugMessage(std::string message)
+{
+    DebugManager::getInstance().printDebugMessage(this->name(), message);
+}
 
-    //        long parsedAdress = std::stoi(address.c_str(), 0, 16);
-
-    //        gp* payload = memoryManager.allocate();
-    //        payload->set_address(parsedAdress);
-
-    //        // Set data pointer
-    //        unsigned char * dataElement = new unsigned char[16]; // TODO: column / burst breite
-    //        payload->set_data_length(16); // TODO: column / burst breite
-    //        payload->set_data_ptr(dataElement);
-    //        for(int i = 0; i < 16; i++) // TODO: column / burst breite
-    //            dataElement[i] = 0;
-
-    //        if (command == "read")
-    //        {
-    //            payload->set_command(TLM_READ_COMMAND);
-    //        }
-    //        else if (command == "write")
-    //        {
-    //            payload->set_command(TLM_WRITE_COMMAND);
-
-    //            // Parse and set data
-    ////            file >> data;
-    ////            unsigned int counter = 0;
-    ////            for(int i = 0; i < 16*2-2; i=i+2) // TODO column / burst breite
-    ////            {
-    ////                std::string byteString = "0x";
-    ////                byteString.append(data.substr(i+2, 2));
-    ////                //cout << byteString << " " << std::stoi(byteString.c_str(), 0, 16) << endl;
-    ////                dataElement[counter++] = std::stoi(byteString.c_str(), 0, 16);
-    ////            }
-    //        }
-    //        else
-    //        {
-    //            SC_REPORT_FATAL(0,
-    //                            (string("Corrupted tracefile, command ") + command + string(" unknown")).c_str());
-    //        }
-
-    //        payload->set_response_status(TLM_INCOMPLETE_RESPONSE);
-    //        payload->set_dmi_allowed(false);
-    //        payload->set_byte_enable_length(0);
-    //        payload->set_streaming_width(burstlenght);
-
-    //        sc_time sendingTime = std::stoi(time.c_str())*clk;
-    //        GenerationExtension* genExtension = new GenerationExtension(sendingTime);
-    //        payload->set_auto_extension(genExtension);
-
-    //        if (sendingTime <= sc_time_stamp())
-    //        {
-    //            payloadEventQueue.notify(*payload, BEGIN_REQ, SC_ZERO_TIME);
-    //        }
-    //        else
-    //        {
-    //            payloadEventQueue.notify(*payload, BEGIN_REQ, sendingTime - sc_time_stamp());
-    //        }
-    //        numberOfPendingTransactions++;
-    //    }
-//}
+template<unsigned int BUSWIDTH>
+//TODO: this doesn't depend on the tracePlayer, move it somewhere
+void TracePlayer<BUSWIDTH>::setDataPointer(gp* payload, unsigned char * dataElement)
+{
+    //check if payload takes ownership
+    payload->set_data_length(16); // TODO: column / burst breite ..... buswidth * burst /8
+    payload->set_data_ptr(dataElement);
+    for(int i = 0; i < 16; i++) // TODO: column / burst breite
+        dataElement[i] = 0;
+}
 
 template<unsigned int BUSWIDTH>
 tlm_sync_enum TracePlayer<BUSWIDTH>::nb_transport_bw(tlm_generic_payload &payload, tlm_phase &phase, sc_time &bwDelay)
@@ -238,9 +102,12 @@ tlm_sync_enum TracePlayer<BUSWIDTH>::nb_transport_bw(tlm_generic_payload &payloa
 template<unsigned int BUSWIDTH>
 void TracePlayer<BUSWIDTH>::peqCallback(tlm_generic_payload &payload, const tlm_phase &phase)
 {
+
     if (phase == BEGIN_REQ)
     {
         payload.acquire();
+        GenerationExtension* genExtension = new GenerationExtension(sc_time_stamp());
+        payload.set_auto_extension(genExtension);
         sendToTarget(payload, phase, SC_ZERO_TIME);
 
         transactionsSent++;
@@ -249,32 +116,12 @@ void TracePlayer<BUSWIDTH>::peqCallback(tlm_generic_payload &payload, const tlm_
     }
     else if (phase == END_REQ)
     {
-        generateNextPayload();
+        nextPayload();
     }
     else if (phase == BEGIN_RESP)
     {
         sendToTarget(payload, END_RESP, SC_ZERO_TIME);
         payload.release();
-
-        unsigned char * dataElement = payload.get_data_ptr();
-
-//        if(payload.get_command() == TLM_READ_COMMAND)
-//        {
-//            cout << "0x";
-//            for(int i=0; i < 16*2; i++)
-//            {
-//                cout << hex << int(dataElement[i]);
-//            }
-//            cout << endl;
-//        }
-
-        simulationManager->transactionFinished();
-        numberOfPendingTransactions--;
-        transactionsReceived++;
-
-        DebugManager::getInstance().printDebugMessage(name(),
-                                                      "Pending transactions in core: "
-                                                      + std::to_string(transactionsSent - transactionsReceived));
     }
     else if (phase == END_RESP)
     {
@@ -294,3 +141,4 @@ void TracePlayer<BUSWIDTH>::sendToTarget(tlm_generic_payload &payload, const tlm
 }
 
 #endif /* TRACEPLAYER_H_ */
+

dram/src/simulation/TracePlayerListener.h

@@ -0,0 +1,10 @@
+#ifndef TRACEPLAYERLISTENER_H
+#define TRACEPLAYERLISTENER_H
+
+class TracePlayerListener
+{
+public:
+    virtual void tracePlayerTerminates() = 0;
+};
+
+#endif // TRACEPLAYERLISTENER_H

dram/src/simulation/main.cpp

@@ -16,7 +16,6 @@
 
 
 using namespace std;
-using namespace simulation;
 
 string resources;
 
@@ -32,18 +31,18 @@ int main(int argc, char **argv)
 
 int sc_main(int argc, char **argv)
 {
-    cout<<"hello"<<endl;
     sc_set_time_resolution(1, SC_PS);
     resources = pathOfFile(argv[0]) + string("/../resources/");
 
+    cout<<resources<<endl;
     string simulationToRun;
     if(argc > 1)
         simulationToRun = argv[1];
     else
-        simulationToRun = "sim-batch.xml";
+        simulationToRun = resources + "/simulations/sim-batch.xml";
 
     SimulationManager manager(resources);
-    manager.loadSimulationsFromXML(resources + "/simulations/" + simulationToRun);
+    manager.loadSimulationsFromXML(simulationToRun);
     manager.runSimulations();
 
     return 0;

install_prerequisites.sh

@@ -1,5 +1,6 @@
 #!/bin/bash
 cd dram/src/common/third_party/
+rm -rf DRAMPower
 git clone https://github.com/ravenrd/DRAMPower.git
 cd DRAMPower
 make parserlib