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Fixed small bug

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This commit is contained in:
Peter Ehses
2015-04-09 10:01:27 +02:00
parent ce86b532c3
commit 2a587436d9
1 changed files with 38 additions and 5 deletions
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43
dram/src/simulation/Dram.h
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@@ -64,7 +64,7 @@ struct Dram: sc_module
IFPOW( DRAMPower = new libDRAMPower( memSpec, 0 ) );
cout << "StorageMode = " << StorageMode << endl;
if(StorageMode == 2)
if(StorageMode == 2)
{
fmemory = new flip_memory[Configuration::getInstance().memSpec.NumberOfBanks];
}
@@ -126,20 +126,19 @@ struct Dram: sc_module
{
// Don't store data
}
else if (StorageMode == 1) //don't use StorageMode
else if (StorageMode == 1) // Use Storage
{
memcpy(&memory[payload.get_address()], payload.get_data_ptr(), BUSWIDTH/8);
}
else
else // == 2 Use Storage with Error Model
{
fmemory[bank].store(payload);
sendToController(payload, END_WR, delay + getExecutionTime(Command::Write, payload));
}
sendToController(payload, END_WR, delay + getExecutionTime(Command::Write, payload));
}
else if (phase == BEGIN_RD)
{
IFPOW(DRAMPower->doCommand(MemCommand::RD, bank, cycle));
sendToController(payload, END_RD, delay + getExecutionTime(Command::Read, payload));
// Load data:
if (StorageMode == 1) //use StorageMode
@@ -157,15 +156,49 @@ struct Dram: sc_module
{
fmemory[bank].load(payload);
}
sendToController(payload, END_RD, delay + getExecutionTime(Command::Read, payload));
}
else if (phase == BEGIN_WRA)
{
IFPOW(DRAMPower->doCommand(MemCommand::WRA, bank, cycle));
//save data:
if (StorageMode == 0)
{
// Don't store data
}
else if (StorageMode == 1) // Use Storage
{
memcpy(&memory[payload.get_address()], payload.get_data_ptr(), BUSWIDTH/8);
}
else // == 2 Use Storage with Error Model
{
fmemory[bank].store(payload);
}
sendToController(payload, END_WRA, delay + getExecutionTime(Command::WriteA, payload));
}
else if (phase == BEGIN_RDA)
{
IFPOW(DRAMPower->doCommand(MemCommand::RDA, bank, cycle));
// Load data:
if (StorageMode == 1) //use StorageMode
{
if(memory.count(payload.get_address()) == 1)
{
memcpy(payload.get_data_ptr(), &memory[payload.get_address()], BUSWIDTH/8);
}
else
{
//SC_REPORT_WARNING ("DRAM", "Reading from an empty memory location.");
}
}
else if(StorageMode == 2)// use StorageMode with errormodel
{
fmemory[bank].load(payload);
}
sendToController(payload, END_RDA, delay + getExecutionTime(Command::ReadA, payload));
}
else if (phase == BEGIN_REFA)