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6fa49382ef22e1b01fb24503e3bbe5ab3556750a
gem5/src/arch/x86
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Gabe Black 1c508a206f arch: Get rid of the unused type AnyReg. 
This type is defined for all the ISAs but isn't used by anything.

Change-Id: I659a0c5abc7883d82fedd1cac2cd103612d315c8
Reviewed-on: https://gem5-review.googlesource.com/c/13539
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2018-10-17 20:15:26 +00:00
..
bios
misc: Rename misc.(hh|cc) to logging.(hh|cc)
2017-12-04 23:10:55 +00:00
insts
riscv,x86: Stop using the arch Nop machine instruction unnecessarily.
2017-12-23 03:36:45 +00:00
isa
x86: Add op classes to the MediaOps.
2018-05-24 20:14:00 +00:00
linux
syscall_emul: implement dir-related syscalls
2018-09-19 20:54:04 +00:00
regs
x86: Add bitfields which can gather/scatter bases and limits.
2018-03-15 00:54:42 +00:00
cpuid.cc
arch-x86: Adding clflush, clflushopt, clwb instructions
2018-01-23 22:17:46 +00:00
cpuid.hh
scons: Add warning for missing declarations
2013-02-19 05:56:07 -05:00
decoder_tables.cc
x86: Rework how VEX prefixes are decoded.
2017-05-26 20:01:03 +00:00
decoder.cc
arch: cpu: Make the ExtMachInst type a template argument in InstMap.
2018-03-27 10:57:54 +00:00
decoder.hh
misc: Appease GCC 8
2018-08-21 14:41:29 +00:00
emulenv.cc
misc: Rename misc.(hh|cc) to logging.(hh|cc)
2017-12-04 23:10:55 +00:00
emulenv.hh
gcc: Clean-up of non-C++0x compliant code, first steps
2012-03-19 06:36:09 -04:00
faults.cc
x86,misc: add additional info on faulting X86 instruction, fetched PC
2017-12-08 04:05:58 +00:00
faults.hh
misc: Rename misc.(hh|cc) to logging.(hh|cc)
2017-12-04 23:10:55 +00:00
interrupts.cc
x86: Use little endian packet accessors.
2018-10-12 23:44:38 +00:00
interrupts.hh
mips, x86: Refactor some Event subclasses into lambdas
2017-07-12 20:07:05 +00:00
intmessage.hh
x86: Use little endian packet accessors.
2018-10-12 23:44:38 +00:00
isa_traits.hh
alpha,arm,mips,power,riscv,sparc,x86,cpu: Get rid of ISA_HAS_DELAY_SLOT.
2018-01-10 12:19:54 +00:00
isa.cc
arch-x86, arch-power: fix calls to bits and insertBits
2018-05-08 21:53:00 +00:00
isa.hh
cpu: Added interface for vector reg file
2017-07-05 14:43:49 +00:00
kernel_stats.hh
stats: Get rid of some kernel stats related cruft.
2017-09-11 04:58:38 +00:00
ldstflags.hh
arch,x86,mem: Dynamically determine the ISA for Ruby store check
2014-10-16 05:49:44 -04:00
locked_mem.hh
mem: Signal the local monitor when clearing the global monitor
2017-10-13 08:41:08 +00:00
memhelpers.hh
x86: Use little endian packet accessors.
2018-10-12 23:44:38 +00:00
microcode_rom.hh
includes: sort all includes
2011-04-15 10:44:06 -07:00
mmapped_ipr.hh
arch: Add support for m5ops using mmapped IPRs
2013-09-30 12:20:43 +02:00
nativetrace.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
nativetrace.hh
Make commenting on close namespace brackets consistent.
2011-01-03 14:35:43 -08:00
pagetable_walker.cc
x86: Use little endian packet accessors.
2018-10-12 23:44:38 +00:00
pagetable_walker.hh
misc: Using smart pointers for memory Requests
2018-06-11 16:55:30 +00:00
pagetable.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
pagetable.hh
x86, mem: Rewrite the multilevel page table class.
2018-01-23 20:14:48 +00:00
process.cc
syscall_emul: expand AuxVector class
2018-09-19 20:51:17 +00:00
process.hh
x86, mem: Rewrite the multilevel page table class.
2018-01-23 20:14:48 +00:00
pseudo_inst.cc
syscall_emul: [patch 13/22] add system call retry capability
2015-07-20 09:15:21 -05:00
pseudo_inst.hh
kvm, x86: Adding support for SE mode execution
2014-11-23 18:01:08 -08:00
registers.hh
arch: Get rid of the unused type AnyReg.
2018-10-17 20:15:26 +00:00
remote_gdb.cc
arch, mem: Make the page table lookup function return a pointer.
2018-01-20 08:06:56 +00:00
remote_gdb.hh
sim, arch, base: Refactor the base remote GDB class.
2018-01-20 07:28:42 +00:00
SConscript
scons: Stop generating inc.d in the isa parser.
2017-10-17 18:57:50 +00:00
SConsopts
copyright: This file need not have had the more restrictive copyright.
2009-02-09 20:10:15 -08:00
stacktrace.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
stacktrace.hh
arch: Use const StaticInstPtr references where possible
2014-09-27 09:08:36 -04:00
system.cc
x86: Add bitfields which can gather/scatter bases and limits.
2018-03-15 00:54:42 +00:00
system.hh
arch-x86: consistent style of comments in system files
2018-01-31 10:11:51 +00:00
tlb.cc
misc: Using smart pointers for memory Requests
2018-06-11 16:55:30 +00:00
tlb.hh
misc: Using smart pointers for memory Requests
2018-06-11 16:55:30 +00:00
types.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
types.hh
misc: Appease GCC 8
2018-08-21 14:41:29 +00:00
utility.cc
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
utility.hh
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
vtophys.cc
arch,cpu: "virtualize" the TLB interface.
2017-12-22 23:16:03 +00:00
vtophys.hh
gcc: Clean-up of non-C++0x compliant code, first steps
2012-03-19 06:36:09 -04:00
x86_traits.hh
arch/x86: add support for explicit CC register file
2013-10-15 14:22:44 -04:00
X86ISA.py
arch: Make the ISA class inherit from SimObject
2013-01-07 13:05:35 -05:00
X86LocalApic.py
sim: Include object header files in SWIG interfaces
2012-11-02 11:32:01 -05:00
X86NativeTrace.py
cpu: Put all CPU instruction tracers in a single file
2015-01-25 07:22:17 -05:00
X86System.py
sim: Include object header files in SWIG interfaces
2012-11-02 11:32:01 -05:00
X86TLB.py
x86: add tlb checkpointing
2013-08-07 14:51:17 -05:00