Gabe Black 12eab3e7a6 arch: Stop using TheISA within the ISAs. ...

We know for sure what the ISA is, so there's no need for the
indirection.

Change-Id: I73ff04c50890d40a4c7f40caeee746b68b846cb3
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18488
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>

2019-04-30 18:52:13 +00:00

..

insts

arch: Fix all override related warnings.

2018-03-26 22:34:44 +00:00

isa

arch-power: Rename program counter registers

2019-03-25 04:48:58 +00:00

linux

power: Get rid of some ISA specific register types.

2019-01-31 11:06:34 +00:00

decoder.cc

ISA,CPU: Generalize and split out the components of the decode cache.

2012-05-26 13:45:12 -07:00

decoder.hh

isa: Add parameter to pick different decoder inside ISA

2015-10-09 14:50:54 -05:00

faults.hh

Faults: Replace calls to genMachineCheckFault with M5PanicFault.

2011-09-27 00:24:43 -07:00

interrupts.cc

SE/FS: Build the Interrupt objects in SE mode.

2011-10-09 00:15:50 -07:00

interrupts.hh

misc: Rename misc.(hh|cc) to logging.(hh|cc)

2017-12-04 23:10:55 +00:00

isa_traits.hh

alpha,arm,mips,power,riscv,sparc,x86,cpu: Get rid of ISA_HAS_DELAY_SLOT.

2018-01-10 12:19:54 +00:00

isa.cc

style: [patch 1/22] use /r/3648/ to reorganize includes

2016-11-09 14:27:37 -06:00

isa.hh

power: Get rid of some ISA specific register types.

2019-01-31 11:06:34 +00:00

kernel_stats.hh

stats: Get rid of some kernel stats related cruft.

2017-09-11 04:58:38 +00:00

locked_mem.hh

mem: Signal the local monitor when clearing the global monitor

2017-10-13 08:41:08 +00:00

microcode_rom.hh

Make commenting on close namespace brackets consistent.

2011-01-03 14:35:43 -08:00

miscregs.hh

Make commenting on close namespace brackets consistent.

2011-01-03 14:35:43 -08:00

mmapped_ipr.hh

arch: Add support for m5ops using mmapped IPRs

2013-09-30 12:20:43 +02:00

pagetable.cc

style: [patch 1/22] use /r/3648/ to reorganize includes

2016-11-09 14:27:37 -06:00

pagetable.hh

sim: Refactor the serialization base class

2015-07-07 09:51:03 +01:00

PowerInterrupts.py

sim: Include object header files in SWIG interfaces

2012-11-02 11:32:01 -05:00

PowerISA.py

arch: Make the ISA class inherit from SimObject

2013-01-07 13:05:35 -05:00

PowerTLB.py

python: Don't assume SimObjects live in the global namespace

2019-02-12 09:43:00 +00:00

process.cc

arch, sim: Simplify the AuxVector type.

2019-04-28 05:16:01 +00:00

process.hh

power: Get rid of some ISA specific register types.

2019-01-31 11:06:34 +00:00

pseudo_inst.hh

misc: Rename misc.(hh|cc) to logging.(hh|cc)

2017-12-04 23:10:55 +00:00

registers.hh

cpu, arch: Replace the CCReg type with RegVal.

2019-02-01 01:22:19 +00:00

remote_gdb.cc

arch: cpu: Rename *FloatRegBits* to *FloatReg*.

2019-01-31 11:02:05 +00:00

remote_gdb.hh

sim, arch, base: Refactor the base remote GDB class.

2018-01-20 07:28:42 +00:00

SConscript

scons: Stop generating inc.d in the isa parser.

2017-10-17 18:57:50 +00:00

SConsopts

POWER: Add support for the Power ISA

2009-10-27 09:24:39 -07:00

stacktrace.cc

style: [patch 1/22] use /r/3648/ to reorganize includes

2016-11-09 14:27:37 -06:00

stacktrace.hh

arch: Stop using TheISA within the ISAs.

2019-04-30 18:52:13 +00:00

tlb.cc

misc: Using smart pointers for memory Requests

2018-06-11 16:55:30 +00:00

tlb.hh

misc: Using smart pointers for memory Requests

2018-06-11 16:55:30 +00:00

types.hh

misc: Remove redundant compiler-specific defines

2015-10-12 04:07:59 -04:00

utility.cc

arch: cpu: Rename *FloatRegBits* to *FloatReg*.

2019-01-31 11:02:05 +00:00

utility.hh

arch: Use const StaticInstPtr references where possible

2014-09-27 09:08:36 -04:00

vtophys.cc

style: change C/C++ source permissions to noexec

2018-01-10 16:49:23 +00:00

vtophys.hh

Merge with main repository.

2012-01-30 21:07:57 -08:00