Earl Ou 01e99c3c7d systemc: Use debug trace for TlmBridge ...

Some messages in TlmBridge is too verbose
in the system with many bridges.

Change-Id: I27b30b518877731017bc980a3cd4706807c1ecfe
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/60791
Maintainer: Earl Ou <shunhsingou@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
Reviewed-by: Earl Ou <shunhsingou@google.com>

2022-07-07 00:55:33 +00:00

..

arch

arch-arm: Do not trap SIMD insts to EL1 if in VHE host

2022-07-05 08:45:01 +00:00

base

misc: Revert gem5 versioning for develop branch

2022-06-20 19:56:24 +00:00

cpu

arch,cpu: Keep track of the RegClassType of a RegClass.

2022-06-24 11:27:23 +00:00

dev

dev: avoid intpin to reset value at binding stage

2022-06-29 12:42:36 +00:00

doc

misc: Removed unneeded Doxygen pages

2020-04-25 01:08:38 +00:00

doxygen

base,misc: Add group definitions for newly tagged API in src/base

2020-09-08 22:29:43 +00:00

gpu-compute

gpu-compute: Stop passing in a default value to resize().

2022-06-03 10:48:31 +00:00

kern

misc: Update Dmesg dump for changes to printk in Linux v5.10+.

2022-05-11 13:27:50 +00:00

learning_gem5

scons: Add sim_object and enums arguments to SimObject().

2021-12-08 08:01:23 +00:00

mem

mem-ruby: Allow SLICC symbols to have no description.

2022-07-06 17:09:46 +00:00

proto

proto: Add a missing std:: in protoio.cc.

2022-06-03 07:23:27 +00:00

python

configs: Fix timebase-frequency of RISC-V board

2022-07-02 04:16:07 +00:00

sim

arch: Switch the generic register ABI over to use RegId.

2022-06-19 07:48:14 +00:00

sst

scons: Add sim_object and enums arguments to SimObject().

2021-12-08 08:01:23 +00:00

systemc

systemc: Use debug trace for TlmBridge

2022-07-07 00:55:33 +00:00

Doxyfile

misc: Revert gem5 versioning for develop branch

2022-06-20 19:56:24 +00:00

SConscript

scons: Update enum output when not using python

2022-05-19 14:32:11 +00:00