Use the PyBind11 wrapping infrastructure instead of SWIG to generate
wrappers for functionality that needs to be exported to Python. This
has several benefits:
* PyBind11 can be redistributed with gem5, which means that we have
full control of the version used. This avoid a large number of
hard-to-debug SWIG issues we have seen in the past.
* PyBind11 doesn't rely on a custom C++ parser, instead it relies on
wrappers being explicitly declared in C++. The leads to slightly
more boiler-plate code in manually created wrappers, but doesn't
doesn't increase the overall code size. A big benefit is that this
avoids strange compilation errors when SWIG doesn't understand
modern language features.
* Unlike SWIG, there is no risk that the wrapper code incorporates
incorrect type casts (this has happened on numerous occasions in
the past) since these will result in compile-time errors.
As a part of this change, the mechanism to define exported methods has
been redesigned slightly. New methods can be exported either by
declaring them in the SimObject declaration and decorating them with
the cxxMethod decorator or by adding an instance of
PyBindMethod/PyBindProperty to the cxx_exports class variable. The
decorator has the added benefit of making it possible to add a
docstring and naming the method's parameters.
The new wrappers have the following known issues:
* Global events can't be memory managed correctly. This was the
case in SWIG as well.
Change-Id: I88c5a95b6cf6c32fa9e1ad31dfc08b2e8199a763
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Andreas Hansson <andreas.hansson@arm.com>
Reviewed-by: Andrew Bardsley <andrew.bardsley@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2231
Reviewed-by: Tony Gutierrez <anthony.gutierrez@amd.com>
Reviewed-by: Pierre-Yves Péneau <pierre-yves.peneau@lirmm.fr>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
A previous change forced scons to spawn child processes by exec-ing it
directly rather than going through the shell because the command line
length would be too long for the shell to handle. Now that incremental
linking should keep the command line lengths more under control, that
change should no longer be necessary.
Change-Id: I9e82a62083afd1414324a7fd697bd6d4b76367ae
Reviewed-on: https://gem5-review.googlesource.com/2947
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
The groups won't be perfectly balanced or optimally planned, but this
requires no thought and breaks the object files down into a reasonable
number of reasonably sized groups.
Change-Id: I6542fc807aaf356a9be751093f68e2e29f0b1586
Reviewed-on: https://gem5-review.googlesource.com/2946
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
The groups will be linked together into intermediate partially linked
object files. Right now the hierarchy is assumed to be flat, but with some
effort it could be extended to allow truly hierarchical linking.
Change-Id: I77b77710554e5f05e8b00720a0170afaf4afac2d
Reviewed-on: https://gem5-review.googlesource.com/2945
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Add a case for the ATA command ATAPI_IDENTIFY_DEVICE.
This avoids the panic: Unsupported ATA command when booting a recent Linux
kernel. This was tested on 4.8.13.
Change-Id: Ib297a2c02da0730d8698c59801254dd0f5ee9f7f
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/2863
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
The ext directories with SConscripts in them are easy to find
automatically. Avoid boilerplate listing them out and SConscript()ing
them manually.
Change-Id: Ib723882aebc00e639eb8ec44904bb05ffa2c6b55
Reviewed-on: https://gem5-review.googlesource.com/2942
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
This file defines all of the commit keywords used for gem5 commits and
the maintainter(s) for each of these keywords.
This patch introduces a number of new keywords, and changes to previous
keywords. The new keywords better follow gem5's directory structure and
are more extensible.
Currently, most keywords do not have a maintainer. More maintainers will
be added as more people volunteer to be maintainers.
This patch also updates the CONTRIBUTING.md file to point to this file
instead of listing the keywords separately. When this file is committed
the wiki will also be updated accordingly.
Change-Id: Ib0abfeb39a3ca01b74b340e24dc9a2cd95ff813f
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/2760
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
The test sub-command in tests.py incorrectly accepts various
formatting options in its usage string. These options aren't needed
since the test command doesn't produce any output.
Change-Id: I6d4731aa32a25a2286aa66548eaa0154a9392f79
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2840
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
When a branch micro-op belongs to a flow and the micro-op does not change
the nPC and just updates the nuPC (like a 'rep movs' flow), branching()
function always returns not-taken no matter actual micro-branch outcome.
Provided fix adds to the equation nuPC attribute checking since these kind
of branch micro-op only updates that pointer.
This issue has been found while debugging the performance of a copy-loop
implemented with memcopy function. Without the fix, 'rep movss' internal
micro-branch was always predicted as not-taken causing an squash event
after every branch micro-branch execution.
Using the provided test, branch mispredition went from 1922 without the fix
to 7.
Change-Id: I1bcbefae26aef47e3135817ef99b53d0ea0a98fa
The command line can be too long, causing bash to choke. This means we can't
use any shell syntax like shell variables or redirection when linking, but
that should be easy to avoid.
Change-Id: Ie6c8ecab337cef6bd3c7e403346ced06f46f0993
Reviewed-on: https://gem5-review.googlesource.com/2780
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Steve Reinhardt <stever@gmail.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Add a script to demonstrate how power models can be wired to gem5
models. The script is meant as an example only and does not correlate
with any realistic implementation.
Change-Id: Ib95a74b2cb4af77a7816e3e8e89c89f3460775a1
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2721
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Allow global stats such as sim_seconds in power equations to make it
possible to convert from event stats to rate stats.
Change-Id: I429abe0ffadc0dbd162eb39e0897143be472ef65
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2720
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
This patch has a minor fix for the coupling between gem5 and SystemC-TLM.
It also fixes some typos in the related documentation.
Change-Id: I894568729b8ebdacc5b81c9f46e8f9d137da210f
Reviewed-on: https://gem5-review.googlesource.com/2480
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
This patch fixes a bug where increasing the mmap region too much causes
it to run into already-allocated memory, which causes gem5 to fail an
assertion. Previously, the stack was incorrectly set up such that the
end of the mmap region and the top of the stack were the same address
and both would grow downward. With this patch, the top of the stack has
been separated from the end of mmap and moved up, and the mmap region
now grows upward instead of downward.
[Rebase to master branch and remove dependencies.]
Change-Id: I7271ff478fff2994f918bc5003a6139b9ba6a520
Reviewed-on: https://gem5-review.googlesource.com/2680
Maintainer: Alec Roelke <ar4jc@virginia.edu>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
There is currently no good way of extracting the current operating
voltage in MathExprPowerModels. This change adds a magic variable,
'voltage', that can be referenced from such expressions to get the
current operating voltage.
Change-Id: Ice3c9a4a221921a542de5da52f83f3f88862d246
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Sascha Bischoff <sascha.bischoff@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2662
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
MathExprPower model currently doesn't print any useful error messages
if an expression fails to evaluate. To add insult to injury, the model
only detects a failure when dumping stats and not at
initialization. This change adds a verification step in startup() that
ensures that all of the referenced stats actually exist.
Change-Id: I8f71c73341578d5882c8d93e482f5383fbda5f1d
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Sascha Bischoff <sascha.bischoff@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2661
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Multiple outstanding DMA requests introduced new DMA states that didn't
be considered into slicc code. This patch implements the missed DMA state
changes on MOESI_CMP_directory protocol.
Change-Id: I700d441d76556b7e77e0d507904af6ec6ba59cc2
Signed-off-by: Michael LeBeane <michael.lebeane@amd.com>
Reviewed-on: https://gem5-review.googlesource.com/2380
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Michael LeBeane <Michael.Lebeane@amd.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Some of the functions in the Linux toolchain that allocate memory make
use of paired LR and SC instructions, which didn't work properly for
that toolchain. This patch fixes that so attempting to use those
functions doesn't cause an endless loop of failed SC instructions.
Change-Id: If27696323dd6229a0277818e3744fbdf7180fca7
Reviewed-on: https://gem5-review.googlesource.com/2340
Maintainer: Alec Roelke <ar4jc@virginia.edu>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Previously, RISC-V in gem5 only supported RISC-V's Newlib toolchain
(riscv64-unknown-elf-*) due to incorrect assumptions made in the initial
setup of the user stack in SE mode. This patch fixes that by referring
to the RISC-V proxy kernel code (https://github.com/riscv/riscv-pk) and
setting up the stack according to how it does it. Now binaries compiled
using the Linux toolchain (riscv64-unknown-linux-gnu-*) will run as
well.
[Update for recent changes to MemState to add accessors and mutators to
get its members.]
Change-Id: I6d2c486df7688efe3df54273e9aa0fd686851285
Reviewed-on: https://gem5-review.googlesource.com/2305
Maintainer: Alec Roelke <ar4jc@virginia.edu>
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
This patch adds support for debugging with remote GDB to RISC-V. Using
GDB compiled with the RISC-V GNU toolchain, it is possible to pause
and continue execution, view debugging information, etc. As with the
rest of RISC-V, this does not support full-system mode.
Change-Id: I2d3a8be614725e1be4b4c283f9fb678a0a30578d
Reviewed-on: https://gem5-review.googlesource.com/2304
Maintainer: Alec Roelke <ar4jc@virginia.edu>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Previously, if a memory operation referenced an address that caused the
data to wrap around to the beginning of the memory (such as -1 or
0xFFFFFFFFFFFFFFFF), an assert would fail during address translation and
gem5 would crash. This patch fixes that by checking for such a case in
RISC-V's TLB code and returning a fault from translateData if that would
happen. Because RISC-V does support unaligned memory accesses, no
checking is performed to make sure that an access doesn't cross a cache
line.
[Update creation of page table fault to use make_shared.]
[Add comment explaining the change and assertion that the memory request
isn't zero size.]
Change-Id: I7b8ef9a5838f30184dbdbd0c7c1655e1c04a9410
Reviewed-on: https://gem5-review.googlesource.com/2345
Maintainer: Alec Roelke <ar4jc@virginia.edu>
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Sometimes an ld instruction will be split across a
cache boundary. Previously RISC-V was set to not
allow this. This patch fixes that.
Change-Id: I8bc8ea6d67f65a9b3662e14c4037f4224799d20f
Reviewed-on: https://gem5-review.googlesource.com/2341
Maintainer: Alec Roelke <ar4jc@virginia.edu>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
The following CL delayed program exit and changed the stats for many if not
most of the SE mode regressions.
commit 2c1286865f
Author: Brandon Potter <Brandon.Potter@amd.com>
Date: Wed Mar 1 14:52:23 2017 -0600
syscall-emul: Rewrite system call exit code
Change-Id: Id241f2b7d5374947597c715ee44febe1acc5ea16
Reviewed-on: https://gem5-review.googlesource.com/2656
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
The following CL changed the stats:
commit 43418e7f81
Author: Brandon Potter <Brandon.Potter@amd.com>
Date: Wed Mar 1 13:07:43 2017 -0600
syscall-emul: Move memState into its own file
It would be a good idea to try to figure out why, since it doesn't *look* like
this change was intended to move things around in memory or otherwise change
simulated behavior.
Change-Id: I0173ffdfb680a91b8c91f2bf5d7f72c76e7a8b63
Reviewed-on: https://gem5-review.googlesource.com/2655
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
The change below changed the stats for the o3 version of the 40.m5threads
regression.
commit 2367198921
Author: Brandon Potter <brandon.potter@amd.com>
Date: Mon Feb 27 14:10:15 2017 -0500
syscall_emul: [PATCH 15/22] add clone/execve for threading and
multiprocess simulations
Change-Id: I601c58d8d1453cf93f2065ea5816b63b553610e0
Reviewed-on: https://gem5-review.googlesource.com/2652
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
The name of the stat was changed in the following change which broke all the
reference outputs.
commit 2367198921
Author: Brandon Potter <brandon.potter@amd.com>
Date: Mon Feb 27 14:10:15 2017 -0500
syscall_emul: [PATCH 15/22] add clone/execve for threading and
multiprocess simulations
Change-Id: Id98b085ccae098c50c434ad81a72beee46084f40
Reviewed-on: https://gem5-review.googlesource.com/2651
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
The following change removed a write to an integer register when completing
a system call. This changed the reference statistics slightly.
commit 073cb26607
Author: Brandon Potter <brandon.potter@amd.com>
Date: Mon Feb 27 14:10:02 2017 -0500
syscall_emul: [patch 14/22] adds identifier system calls
Change-Id: I3bee42ab826dd9cbc49aab34340da57caf4f045d
Reviewed-on: https://gem5-review.googlesource.com/2650
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
The change below introduced some new op classes which have their own stats,
and the counts the instructions used to be under have gone down.
commit 6c72c35519
Author: Fernando Endo <fernando.endo2@gmail.com>
Date: Sat Oct 15 14:58:45 2016 -0500
cpu, arm: Distinguish Float* and SimdFloat*, create FloatMem* opClass
Change-Id: Ifa3a279493f503585a7b2cbb2785b106e24184bb
Reviewed-on: https://gem5-review.googlesource.com/2648
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
When the change below removed the hard coded disk name for the SPARC FS
configuration, it broke the regression which had not specified a disk name.
This change adds a default disk name so that the regression will continue to
work like it used to, but preserving the effect of this other change.
commit 86a25bbcee
Author: Jakub Jermar <jakub@jermar.eu>
Date: Tue Jul 19 09:52:46 2016 -0500
config: Allow SPARC FS image to be specified on the command line
Change-Id: Ieb317b2bf573a4f2fc435d34cccd1f246c28d84c
Reviewed-on: https://gem5-review.googlesource.com/2645
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
This was emptied accidentally by the CL below. A lot of other files were too,
but those were eventually refilled.
commit 62b6ff22ec
Author: Curtis Dunham <Curtis.Dunham@arm.com>
Date: Tue May 31 11:07:18 2016 +0100
stats: update for snoop filter tweak
Change-Id: I34aefca51a92a6a98f6a8fdbdab7106cc1fff171
Reviewed-on: https://gem5-review.googlesource.com/2641
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Due to the way SCons caches some file system state internally, it
sometimes "remembers" that a file or directory didn't exist at some
point. The git hook installation script sometimes needs to create a
hooks directory in the repository. Due to the cached state of the
hooks directory, the build system tries to create it twice. The second
mkdir operation leads to an error since the directory already exists.
Fix this issue by clearing the cached state of the hooks directory
after creating it.
Change-Id: I3f67f75c06ef928b439a0742f7619b7e92ed093b
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2660
Reviewed-by: Gabe Black <gabeblack@google.com>
The Binary Point Register (BPR) specifies which bits belong to the
group priority field (which are used for preemption) and which to the
subpriority field (which are ignored for preemption).
Change-Id: If51e669d23b49047b69b82ab363dd01a936cc93b
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2443
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Weiping Liao <weipingliao@google.com>
The aforementioned registers (Interrupt Processor Targets Registers) are
banked per-CPU, but are read-only. This patch eliminates the per-CPU
storage of these values that are simply computed.
Change-Id: I52cafc2f58e87dd54239a71326c01f4923544689
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2442
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Weiping Liao <weipingliao@google.com>
Instructions that use the coprocessor interface check the current
program status to determine whether the current context has the
priviledges to read from/write to the coprocessor. Some modes allow
the execution of coprocessor instructions, some others do not allow it,
while some other modes are unexpected (e.g., executing an AArch32
instruction while being in an AArch64 mode).
Previously we would unconditionally trigger a panic if we were in an
unexpected mode. This change removes the panic and replaces it
with an Undefined Instruction fault that triggers if and when a
coprocessor instruction commits in an unexpected mode. This allows
speculative coprocessor instructions from unexpected modes to execute
but prevents them from gettting committed.
Change-Id: If2776d5bae2471cdbaf76d0e1ae655f501bfbf01
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Rekai Gonzalez Alberquilla <rekai.gonzalezalberquilla@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2281
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Weiping Liao <weipingliao@google.com>
