stats: Update the solaris boot stats for new snoopTraffic stat.
The following change added the new stat:
commit 0020662459
Author: David Guillen Fandos <david.guillen@arm.com>
Date: Thu Jul 21 17:19:14 2016 +0100
mem: Add snoop traffic statistic
Change-Id: I9ee0fb4b8cc97c6b94e76ab5524f89c78c97d1a6
Reviewed-on: https://gem5-review.googlesource.com/2646
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
This commit is contained in:
@@ -44,6 +44,7 @@ p_state_clk_gate_min=2
|
||||
partition_desc=system.partition_desc
|
||||
partition_desc_addr=133445976064
|
||||
partition_desc_bin=/usr/local/google/home/gabeblack/gem5/dist/m5/system/binaries/1up-md.bin
|
||||
power_model=Null
|
||||
readfile=/usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../halt.sh
|
||||
reset_addr=1099243192320
|
||||
reset_bin=/usr/local/google/home/gabeblack/gem5/dist/m5/system/binaries/reset_new.bin
|
||||
@@ -69,6 +70,7 @@ eventq_index=0
|
||||
p_state_clk_gate_bins=20
|
||||
p_state_clk_gate_max=2000000000
|
||||
p_state_clk_gate_min=2
|
||||
power_model=Null
|
||||
ranges=133412421632:133412421639 134217728000:554050781183 644245094400:652835028991 725849473024:1095485095935 1099255955456:1099255955463
|
||||
req_size=16
|
||||
resp_size=16
|
||||
@@ -110,6 +112,7 @@ numThreads=1
|
||||
p_state_clk_gate_bins=20
|
||||
p_state_clk_gate_max=2000000000
|
||||
p_state_clk_gate_min=2
|
||||
power_model=Null
|
||||
profile=0
|
||||
progress_interval=0
|
||||
simpoint_start_insts=
|
||||
@@ -166,6 +169,7 @@ p_state_clk_gate_max=2000000000
|
||||
p_state_clk_gate_min=2
|
||||
pio_addr=134217728000
|
||||
pio_latency=200
|
||||
power_model=Null
|
||||
system=system
|
||||
pio=system.iobus.master[14]
|
||||
|
||||
@@ -206,6 +210,7 @@ null=false
|
||||
p_state_clk_gate_bins=20
|
||||
p_state_clk_gate_max=2000000000
|
||||
p_state_clk_gate_min=2
|
||||
power_model=Null
|
||||
range=133446500352:133446508543
|
||||
port=system.membus.master[5]
|
||||
|
||||
@@ -224,6 +229,7 @@ frontend_latency=2
|
||||
p_state_clk_gate_bins=20
|
||||
p_state_clk_gate_max=2000000000
|
||||
p_state_clk_gate_min=2
|
||||
power_model=Null
|
||||
response_latency=2
|
||||
use_default_range=false
|
||||
width=16
|
||||
@@ -242,6 +248,7 @@ p_state_clk_gate_bins=20
|
||||
p_state_clk_gate_max=2000000000
|
||||
p_state_clk_gate_min=2
|
||||
point_of_coherency=true
|
||||
power_model=Null
|
||||
response_latency=2
|
||||
snoop_filter=Null
|
||||
snoop_response_latency=4
|
||||
@@ -264,6 +271,7 @@ p_state_clk_gate_min=2
|
||||
pio_addr=0
|
||||
pio_latency=200
|
||||
pio_size=8
|
||||
power_model=Null
|
||||
ret_bad_addr=true
|
||||
ret_data16=65535
|
||||
ret_data32=4294967295
|
||||
@@ -288,6 +296,7 @@ null=false
|
||||
p_state_clk_gate_bins=20
|
||||
p_state_clk_gate_max=2000000000
|
||||
p_state_clk_gate_min=2
|
||||
power_model=Null
|
||||
range=133429198848:133429207039
|
||||
port=system.membus.master[4]
|
||||
|
||||
@@ -305,6 +314,7 @@ null=false
|
||||
p_state_clk_gate_bins=20
|
||||
p_state_clk_gate_max=2000000000
|
||||
p_state_clk_gate_min=2
|
||||
power_model=Null
|
||||
range=133445976064:133445984255
|
||||
port=system.membus.master[6]
|
||||
|
||||
@@ -322,6 +332,7 @@ null=false
|
||||
p_state_clk_gate_bins=20
|
||||
p_state_clk_gate_max=2000000000
|
||||
p_state_clk_gate_min=2
|
||||
power_model=Null
|
||||
range=1048576:68157439
|
||||
port=system.membus.master[7]
|
||||
|
||||
@@ -339,6 +350,7 @@ null=false
|
||||
p_state_clk_gate_bins=20
|
||||
p_state_clk_gate_max=2000000000
|
||||
p_state_clk_gate_min=2
|
||||
power_model=Null
|
||||
range=2147483648:2415919103
|
||||
port=system.membus.master[8]
|
||||
|
||||
@@ -356,6 +368,7 @@ null=false
|
||||
p_state_clk_gate_bins=20
|
||||
p_state_clk_gate_max=2000000000
|
||||
p_state_clk_gate_min=2
|
||||
power_model=Null
|
||||
range=1099243192320:1099251580927
|
||||
port=system.membus.master[3]
|
||||
|
||||
@@ -378,6 +391,7 @@ p_state_clk_gate_min=2
|
||||
pio_addr=644245094400
|
||||
pio_latency=200
|
||||
pio_size=4294967296
|
||||
power_model=Null
|
||||
ret_bad_addr=false
|
||||
ret_data16=65535
|
||||
ret_data32=4294967295
|
||||
@@ -400,6 +414,7 @@ p_state_clk_gate_min=2
|
||||
pio_addr=549755813888
|
||||
pio_latency=200
|
||||
pio_size=4294967296
|
||||
power_model=Null
|
||||
ret_bad_addr=false
|
||||
ret_data16=65535
|
||||
ret_data32=4294967295
|
||||
@@ -422,6 +437,7 @@ p_state_clk_gate_min=2
|
||||
pio_addr=725849473024
|
||||
pio_latency=200
|
||||
pio_size=8
|
||||
power_model=Null
|
||||
ret_bad_addr=false
|
||||
ret_data16=65535
|
||||
ret_data32=4294967295
|
||||
@@ -444,6 +460,7 @@ p_state_clk_gate_min=2
|
||||
pio_addr=725849473088
|
||||
pio_latency=200
|
||||
pio_size=8
|
||||
power_model=Null
|
||||
ret_bad_addr=false
|
||||
ret_data16=65535
|
||||
ret_data32=4294967295
|
||||
@@ -466,6 +483,7 @@ p_state_clk_gate_min=2
|
||||
pio_addr=725849473152
|
||||
pio_latency=200
|
||||
pio_size=8
|
||||
power_model=Null
|
||||
ret_bad_addr=false
|
||||
ret_data16=65535
|
||||
ret_data32=4294967295
|
||||
@@ -488,6 +506,7 @@ p_state_clk_gate_min=2
|
||||
pio_addr=725849473216
|
||||
pio_latency=200
|
||||
pio_size=8
|
||||
power_model=Null
|
||||
ret_bad_addr=false
|
||||
ret_data16=65535
|
||||
ret_data32=4294967295
|
||||
@@ -510,6 +529,7 @@ p_state_clk_gate_min=2
|
||||
pio_addr=734439407616
|
||||
pio_latency=200
|
||||
pio_size=8
|
||||
power_model=Null
|
||||
ret_bad_addr=false
|
||||
ret_data16=65535
|
||||
ret_data32=4294967295
|
||||
@@ -532,6 +552,7 @@ p_state_clk_gate_min=2
|
||||
pio_addr=734439407680
|
||||
pio_latency=200
|
||||
pio_size=8
|
||||
power_model=Null
|
||||
ret_bad_addr=false
|
||||
ret_data16=65535
|
||||
ret_data32=4294967295
|
||||
@@ -554,6 +575,7 @@ p_state_clk_gate_min=2
|
||||
pio_addr=734439407744
|
||||
pio_latency=200
|
||||
pio_size=8
|
||||
power_model=Null
|
||||
ret_bad_addr=false
|
||||
ret_data16=65535
|
||||
ret_data32=4294967295
|
||||
@@ -576,6 +598,7 @@ p_state_clk_gate_min=2
|
||||
pio_addr=734439407808
|
||||
pio_latency=200
|
||||
pio_size=8
|
||||
power_model=Null
|
||||
ret_bad_addr=false
|
||||
ret_data16=65535
|
||||
ret_data32=4294967295
|
||||
@@ -598,6 +621,7 @@ p_state_clk_gate_min=2
|
||||
pio_addr=648540061696
|
||||
pio_latency=200
|
||||
pio_size=16384
|
||||
power_model=Null
|
||||
ret_bad_addr=false
|
||||
ret_data16=65535
|
||||
ret_data32=4294967295
|
||||
@@ -620,6 +644,7 @@ p_state_clk_gate_min=2
|
||||
pio_addr=1095216660480
|
||||
pio_latency=200
|
||||
pio_size=268435456
|
||||
power_model=Null
|
||||
ret_bad_addr=false
|
||||
ret_data16=65535
|
||||
ret_data32=4294967295
|
||||
@@ -648,6 +673,7 @@ p_state_clk_gate_max=2000000000
|
||||
p_state_clk_gate_min=2
|
||||
pio_addr=1099255906296
|
||||
pio_latency=200
|
||||
power_model=Null
|
||||
system=system
|
||||
time=Thu Jan 1 00:00:00 2009
|
||||
pio=system.membus.master[1]
|
||||
@@ -663,6 +689,7 @@ p_state_clk_gate_min=2
|
||||
pio_addr=1099255955456
|
||||
pio_latency=200
|
||||
platform=system.t1000
|
||||
power_model=Null
|
||||
system=system
|
||||
terminal=system.t1000.hterm
|
||||
pio=system.iobus.master[13]
|
||||
@@ -677,6 +704,7 @@ p_state_clk_gate_max=2000000000
|
||||
p_state_clk_gate_min=2
|
||||
pio_latency=2
|
||||
platform=system.t1000
|
||||
power_model=Null
|
||||
system=system
|
||||
pio=system.membus.master[0]
|
||||
|
||||
@@ -699,6 +727,7 @@ p_state_clk_gate_min=2
|
||||
pio_addr=133412421632
|
||||
pio_latency=200
|
||||
platform=system.t1000
|
||||
power_model=Null
|
||||
system=system
|
||||
terminal=system.t1000.pterm
|
||||
pio=system.iobus.master[12]
|
||||
|
||||
@@ -14,6 +14,7 @@
|
||||
"p_state_clk_gate_bins": 20,
|
||||
"default_p_state": "UNDEFINED",
|
||||
"clk_domain": "system.clk_domain",
|
||||
"power_model": null,
|
||||
"latency_var": 0,
|
||||
"bandwidth": "0.000000",
|
||||
"conf_table_reported": true,
|
||||
@@ -46,6 +47,7 @@
|
||||
"cxx_class": "Bridge",
|
||||
"req_size": 16,
|
||||
"clk_domain": "system.clk_domain",
|
||||
"power_model": null,
|
||||
"delay": 100,
|
||||
"eventq_index": 0,
|
||||
"master": {
|
||||
@@ -71,6 +73,7 @@
|
||||
"p_state_clk_gate_bins": 20,
|
||||
"cxx_class": "NoncoherentXBar",
|
||||
"clk_domain": "system.clk_domain",
|
||||
"power_model": null,
|
||||
"width": 16,
|
||||
"eventq_index": 0,
|
||||
"master": {
|
||||
@@ -113,6 +116,7 @@
|
||||
"cxx_class": "DumbTOD",
|
||||
"pio_latency": 200,
|
||||
"clk_domain": "system.clk_domain",
|
||||
"power_model": null,
|
||||
"system": "system",
|
||||
"eventq_index": 0,
|
||||
"time": "Thu Jan 1 00:00:00 2009",
|
||||
@@ -133,6 +137,7 @@
|
||||
"cxx_class": "Uart8250",
|
||||
"pio_latency": 200,
|
||||
"clk_domain": "system.clk_domain",
|
||||
"power_model": null,
|
||||
"system": "system",
|
||||
"terminal": "system.t1000.pterm",
|
||||
"platform": "system.t1000",
|
||||
@@ -162,6 +167,7 @@
|
||||
"p_state_clk_gate_max": 2000000000,
|
||||
"type": "IsaFake",
|
||||
"p_state_clk_gate_min": 2,
|
||||
"power_model": null,
|
||||
"ret_data32": 4294967295,
|
||||
"path": "system.t1000.fake_membnks",
|
||||
"ret_data16": 65535,
|
||||
@@ -191,6 +197,7 @@
|
||||
"p_state_clk_gate_max": 2000000000,
|
||||
"type": "IsaFake",
|
||||
"p_state_clk_gate_min": 2,
|
||||
"power_model": null,
|
||||
"ret_data32": 4294967295,
|
||||
"path": "system.t1000.fake_jbi",
|
||||
"ret_data16": 65535,
|
||||
@@ -220,6 +227,7 @@
|
||||
"p_state_clk_gate_max": 2000000000,
|
||||
"type": "IsaFake",
|
||||
"p_state_clk_gate_min": 2,
|
||||
"power_model": null,
|
||||
"ret_data32": 4294967295,
|
||||
"path": "system.t1000.fake_l2esr_2",
|
||||
"ret_data16": 65535,
|
||||
@@ -262,6 +270,7 @@
|
||||
"p_state_clk_gate_max": 2000000000,
|
||||
"type": "IsaFake",
|
||||
"p_state_clk_gate_min": 2,
|
||||
"power_model": null,
|
||||
"ret_data32": 4294967295,
|
||||
"path": "system.t1000.fake_l2_4",
|
||||
"ret_data16": 65535,
|
||||
@@ -290,6 +299,7 @@
|
||||
"p_state_clk_gate_max": 2000000000,
|
||||
"type": "IsaFake",
|
||||
"p_state_clk_gate_min": 2,
|
||||
"power_model": null,
|
||||
"ret_data32": 4294967295,
|
||||
"path": "system.t1000.fake_l2_1",
|
||||
"ret_data16": 65535,
|
||||
@@ -318,6 +328,7 @@
|
||||
"p_state_clk_gate_max": 2000000000,
|
||||
"type": "IsaFake",
|
||||
"p_state_clk_gate_min": 2,
|
||||
"power_model": null,
|
||||
"ret_data32": 4294967295,
|
||||
"path": "system.t1000.fake_l2_2",
|
||||
"ret_data16": 65535,
|
||||
@@ -346,6 +357,7 @@
|
||||
"p_state_clk_gate_max": 2000000000,
|
||||
"type": "IsaFake",
|
||||
"p_state_clk_gate_min": 2,
|
||||
"power_model": null,
|
||||
"ret_data32": 4294967295,
|
||||
"path": "system.t1000.fake_l2_3",
|
||||
"ret_data16": 65535,
|
||||
@@ -378,6 +390,7 @@
|
||||
"cxx_class": "Iob",
|
||||
"pio_latency": 2,
|
||||
"clk_domain": "system.clk_domain",
|
||||
"power_model": null,
|
||||
"system": "system",
|
||||
"platform": "system.t1000",
|
||||
"eventq_index": 0,
|
||||
@@ -397,6 +410,7 @@
|
||||
"cxx_class": "Uart8250",
|
||||
"pio_latency": 200,
|
||||
"clk_domain": "system.clk_domain",
|
||||
"power_model": null,
|
||||
"system": "system",
|
||||
"terminal": "system.t1000.hterm",
|
||||
"platform": "system.t1000",
|
||||
@@ -427,6 +441,7 @@
|
||||
"p_state_clk_gate_max": 2000000000,
|
||||
"type": "IsaFake",
|
||||
"p_state_clk_gate_min": 2,
|
||||
"power_model": null,
|
||||
"ret_data32": 4294967295,
|
||||
"path": "system.t1000.fake_l2esr_3",
|
||||
"ret_data16": 65535,
|
||||
@@ -455,6 +470,7 @@
|
||||
"p_state_clk_gate_max": 2000000000,
|
||||
"type": "IsaFake",
|
||||
"p_state_clk_gate_min": 2,
|
||||
"power_model": null,
|
||||
"ret_data32": 4294967295,
|
||||
"path": "system.t1000.fake_ssi",
|
||||
"ret_data16": 65535,
|
||||
@@ -483,6 +499,7 @@
|
||||
"p_state_clk_gate_max": 2000000000,
|
||||
"type": "IsaFake",
|
||||
"p_state_clk_gate_min": 2,
|
||||
"power_model": null,
|
||||
"ret_data32": 4294967295,
|
||||
"path": "system.t1000.fake_l2esr_1",
|
||||
"ret_data16": 65535,
|
||||
@@ -511,6 +528,7 @@
|
||||
"p_state_clk_gate_max": 2000000000,
|
||||
"type": "IsaFake",
|
||||
"p_state_clk_gate_min": 2,
|
||||
"power_model": null,
|
||||
"ret_data32": 4294967295,
|
||||
"path": "system.t1000.fake_l2esr_4",
|
||||
"ret_data16": 65535,
|
||||
@@ -539,6 +557,7 @@
|
||||
"p_state_clk_gate_max": 2000000000,
|
||||
"type": "IsaFake",
|
||||
"p_state_clk_gate_min": 2,
|
||||
"power_model": null,
|
||||
"ret_data32": 4294967295,
|
||||
"path": "system.t1000.fake_clk",
|
||||
"ret_data16": 65535,
|
||||
@@ -585,6 +604,7 @@
|
||||
"p_state_clk_gate_bins": 20,
|
||||
"default_p_state": "UNDEFINED",
|
||||
"clk_domain": "system.clk_domain",
|
||||
"power_model": null,
|
||||
"latency_var": 0,
|
||||
"bandwidth": "0.000000",
|
||||
"conf_table_reported": true,
|
||||
@@ -621,6 +641,7 @@
|
||||
"p_state_clk_gate_bins": 20,
|
||||
"default_p_state": "UNDEFINED",
|
||||
"clk_domain": "system.clk_domain",
|
||||
"power_model": null,
|
||||
"latency_var": 0,
|
||||
"bandwidth": "0.000000",
|
||||
"conf_table_reported": true,
|
||||
@@ -659,6 +680,7 @@
|
||||
"p_state_clk_gate_max": 2000000000,
|
||||
"type": "IsaFake",
|
||||
"p_state_clk_gate_min": 2,
|
||||
"power_model": null,
|
||||
"ret_data32": 4294967295,
|
||||
"path": "system.membus.badaddr_responder",
|
||||
"ret_data16": 65535,
|
||||
@@ -700,6 +722,7 @@
|
||||
},
|
||||
"p_state_clk_gate_min": 2,
|
||||
"snoop_filter": null,
|
||||
"power_model": null,
|
||||
"path": "system.membus",
|
||||
"snoop_response_latency": 4,
|
||||
"name": "membus",
|
||||
@@ -719,6 +742,7 @@
|
||||
"p_state_clk_gate_bins": 20,
|
||||
"default_p_state": "UNDEFINED",
|
||||
"clk_domain": "system.clk_domain",
|
||||
"power_model": null,
|
||||
"latency_var": 0,
|
||||
"bandwidth": "0.000000",
|
||||
"conf_table_reported": true,
|
||||
@@ -776,6 +800,7 @@
|
||||
"p_state_clk_gate_bins": 20,
|
||||
"default_p_state": "UNDEFINED",
|
||||
"clk_domain": "system.clk_domain",
|
||||
"power_model": null,
|
||||
"latency_var": 0,
|
||||
"bandwidth": "0.000000",
|
||||
"conf_table_reported": true,
|
||||
@@ -799,6 +824,7 @@
|
||||
"p_state_clk_gate_bins": 20,
|
||||
"default_p_state": "UNDEFINED",
|
||||
"clk_domain": "system.clk_domain",
|
||||
"power_model": null,
|
||||
"latency_var": 0,
|
||||
"bandwidth": "0.000000",
|
||||
"conf_table_reported": true,
|
||||
@@ -814,6 +840,7 @@
|
||||
"in_addr_map": true
|
||||
}
|
||||
],
|
||||
"power_model": null,
|
||||
"work_cpus_ckpt_count": 0,
|
||||
"thermal_components": [],
|
||||
"path": "system",
|
||||
@@ -887,6 +914,7 @@
|
||||
"role": "MASTER"
|
||||
},
|
||||
"socket_id": 0,
|
||||
"power_model": null,
|
||||
"max_insts_all_threads": 0,
|
||||
"path": "system.cpu",
|
||||
"max_loads_any_thread": 0,
|
||||
@@ -961,6 +989,7 @@
|
||||
"cxx_class": "MmDisk",
|
||||
"pio_latency": 200,
|
||||
"clk_domain": "system.clk_domain",
|
||||
"power_model": null,
|
||||
"system": "system",
|
||||
"eventq_index": 0,
|
||||
"default_p_state": "UNDEFINED",
|
||||
|
||||
@@ -3,9 +3,9 @@ Redirecting stderr to build/SPARC/tests/opt/long/fs/80.solaris-boot/sparc/solari
|
||||
gem5 Simulator System. http://gem5.org
|
||||
gem5 is copyrighted software; use the --copyright option for details.
|
||||
|
||||
gem5 compiled Apr 4 2017 01:51:46
|
||||
gem5 started Apr 4 2017 01:51:57
|
||||
gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 121003
|
||||
gem5 compiled Apr 4 2017 02:11:37
|
||||
gem5 started Apr 4 2017 02:11:47
|
||||
gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 135111
|
||||
command line: /usr/local/google/home/gabeblack/gem5/gem5-public/build/SPARC/gem5.opt -d build/SPARC/tests/opt/long/fs/80.solaris-boot/sparc/solaris/t1000-simple-atomic -re /usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../run.py long/fs/80.solaris-boot/sparc/solaris/t1000-simple-atomic
|
||||
|
||||
Global frequency set at 2000000000 ticks per second
|
||||
|
||||
@@ -4,11 +4,11 @@ sim_seconds 2.233778 # Nu
|
||||
sim_ticks 4467555024 # Number of ticks simulated
|
||||
final_tick 4467555024 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||
sim_freq 2000000000 # Frequency of simulated ticks
|
||||
host_inst_rate 3232456 # Simulator instruction rate (inst/s)
|
||||
host_op_rate 3233727 # Simulator op (including micro ops) rate (op/s)
|
||||
host_tick_rate 6480848 # Simulator tick rate (ticks/s)
|
||||
host_mem_usage 550344 # Number of bytes of host memory used
|
||||
host_seconds 689.35 # Real time elapsed on the host
|
||||
host_inst_rate 3251993 # Simulator instruction rate (inst/s)
|
||||
host_op_rate 3253271 # Simulator op (including micro ops) rate (op/s)
|
||||
host_tick_rate 6520018 # Simulator tick rate (ticks/s)
|
||||
host_mem_usage 552088 # Number of bytes of host memory used
|
||||
host_seconds 685.21 # Real time elapsed on the host
|
||||
sim_insts 2228284650 # Number of instructions simulated
|
||||
sim_ops 2229160714 # Number of ops (including micro ops) simulated
|
||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||
@@ -249,6 +249,7 @@ system.membus.pkt_size_system.cpu.dcache_port::system.physmem1.port 2454584131
|
||||
system.membus.pkt_size_system.cpu.dcache_port::total 2602983983 # Cumulative packet size per connected master and slave (bytes)
|
||||
system.membus.pkt_size::total 11533814443 # Cumulative packet size per connected master and slave (bytes)
|
||||
system.membus.snoops 0 # Total snoops (count)
|
||||
system.membus.snoopTraffic 0 # Total snoop traffic (bytes)
|
||||
system.membus.snoop_fanout::samples 2767993261 # Request fanout histogram
|
||||
system.membus.snoop_fanout::mean 0.806616 # Request fanout histogram
|
||||
system.membus.snoop_fanout::stdev 0.394951 # Request fanout histogram
|
||||
|
||||
Reference in New Issue
Block a user