Commit Graph

18909 Commits

Author SHA1 Message Date
Matthew Poremba
4387321bed configs: Exit GPUFS script if DKMS module does not exist
The supported version of ROCm in GPUFS only supports the DKMS build of
the amdgpu driver. However, since a gem5 user can potentially pass in
any Linux kernel as a parameter, it is possible that the DKMS package
for that kernel was not installed on the disk image. This would result
in the simulation appearing to work when in reality it is just spinning
waiting for commands from the driver. This check exits gem5 early in the
simulation and outputs an error on the console to sanity check the
correct driver is being used.

Change-Id: I708912e5625e47eba15dcb2f722772a3b2928b98
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58129
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-04-07 20:11:01 +00:00
Matthew Poremba
e36a8dbd8a gpu-compute: Handle GPUFS system store responses
Requests in GPUFS which go to system memory will not generate the
WriteCompleteResp packets that the VIPER protocol would normally created
for device requests which go through the caches. Therefore, we need to
callback the GM pipe handleResponse to complete the access and make
forward progress.

Change-Id: Ic00c430ce420a591fe5743f758b780d93afd2a38
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57989
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-04-07 20:11:01 +00:00
Matthew Poremba
6feaa88e27 gpu-compute: Command processor read path from device
In full system mode, the AMDKernelCode object can reside in either the
system memory or in the dGPU device memory. Currently only reading from
the host/system memory is supported. This adds the necessary code to
read from the dGPU device memory.

Change-Id: I887fc706b3f9834db14e40f36fd29dd3d4602925
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57710
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-04-07 20:11:01 +00:00
Matthew Poremba
fcbc9afcd6 gpu-compute: Don't use emulated driver in full system
The emulated driver is currently called in a few locations
unconditionally. This changeset adds checks that we are not in full
system before calling any emulated driver function. In full system the
amdgpu driver running on the disk image handles these functions.

Change-Id: Iea3546b574e29c649351c0fce9154530be89e9b1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57712
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-04-07 20:11:01 +00:00
Matthew Poremba
f375e79bcf gpu-compute: Support Scalar and Vector access to system pages
The amdgpu driver supports reading and writing scalar and vector memory
addresses that reside in system memory. This is commonly used for things
like blit kernels that perform host-to-device or device-to-host copies
using GPU load/store instructions.

This is done by utilizing the system hub device added in a prior
changeset. Memory packets translated by the Scalar or VMEM TLBs will
have the correspoding system request field set from the PTE in the TLB
which can be used in the compute unit to determine if a request is for
system memory or not.

Another important change is to return global memory tokens for system
requests. Since these do not flow through the GPU coalescer where the
token is returned, the token can be returned once the request is known
to be a system request.

Change-Id: I35030e0b3698f10c63a397f96b81267271e3130e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57711
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-04-07 20:11:01 +00:00
Matthew Poremba
347364ab0f gpu-compute: Handle mailbox/wakeup signals for GPUFS
The current mailbox/wakeup signal uses the SE mode proxy port to write
the event value. This is not available in full system mode so instead we
need to issue a DMA write to the address. The value of event_val clears
the event.

Change-Id: I424469076e87e690ab0bb722bac4c3e7414fb150
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57709
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-04-07 20:11:01 +00:00
Chia-You Chen
fb173e4d2c fastmodel: use global option 'num_jobs' instead of hardcoded number
Change-Id: I2d3f0855c8475cd44b1012fddf6b695621b2347f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58689
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-04-07 08:09:42 +00:00
Samuel Stark
eafc6ea626 cpu: Handle external TLBI Sync requests in TimingCPU
JIRA: https://gem5.atlassian.net/browse/GEM5-1097

Change-Id: I4e92f7886a296f119720b8bcda6bea722df76153
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57291
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-04-06 16:17:57 +00:00
Giacomo Travaglini
38fe886ee3 mem-ruby: Support for mem commands in the Sequencer
The isPhysMemAddress checks if a valid memory address
refers to physical memory. This can't be used for memory
commands a they don't hold a valid address/size

Change-Id: Ib39c759aa90ab50ffe2036b5f0ae17627f57e5f5
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58510
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-04-06 08:37:11 +00:00
Gabe Black
c2c9ddaf74 scons: Monkey patch a fix from 3.0.2 into 3.0.0 and 3.0.1.
Ensure that SCons.Subst.Literal can be hashed.

https: //pairlist2.pair.net/pipermail/scons-dev/2018-October/004766.html
Change-Id: I5221b63a5fd63189eb690c77e780805dc6d68125
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58633
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-04-06 07:38:06 +00:00
Bobby R. Bruce
c08c3fdcb2 tests: Skip "build/ALL/gem5.opt" build test
This commit,
https://gem5-review.googlesource.com/c/public/gem5/+/57509, added
'constants.all_compiled_tag' to test the "build/ALL/gem5.opt" target
once incorporated. However, the test_build.py tests automatically parse
these tags to generate build tests. As such the nightly tests fail
due to trying to build a target which has not yet been added to the
project: https://jenkins.gem5.org/job/nightly/183

This patch skips this build. It may be reverted once
"build/ALL/gem5.opt" is available.

Change-Id: Ib3a01113214f0715cd13ee0da4ee387efd403c8f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58609
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-04-06 05:26:22 +00:00
Giacomo Travaglini
5747822292 mem: Add Request factory method for memory management command
This should be used to construct memory management Requests
(Not requiring an address nor a size)

Change-Id: Id1b6f1032c1390210a216cd77c7dd0cec14e962f
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58357
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-04-05 09:24:16 +00:00
Giacomo Travaglini
39ed6e0373 cpu, arch-arm: Rename initiateSpecialMemCmd to initateMemMgmtCmd
This is aligning with the name of the generated memory requests

Change-Id: Ifdfa01477abf7ff597dce3b5cff78f9a27fdcbcc
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58511
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-04-05 09:24:16 +00:00
Giacomo Travaglini
05f1975832 mem: Introduce Request::isMemMgmt to cover memory management cmds
It will check if the request is a TLB invalidation
or a transactional memory request

Change-Id: I84351a13a6806d8119e4efa8ef98ab150976c8ab
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58509
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-04-05 09:24:16 +00:00
Luming Wang
8756f57aa1 scons: fix build failed caused by Non-ASCII directory path
This path fix build failed when gem5's path contains Non-ASCII
characters.

build_tools/marshal.py embed "abspath" and "modpath" into the
generated c++ file. However, if either of them contains Non-ASCII
characters, marshal.py will throw an exception.

This can be fixed if we set a suitable $LANG for gem5py. For
example, we can simply set $LANG=en_US.UTF-8 in src/SConscript
to fix this.

This patch fixes this bug by passing the host's $LANG environment
variable to gem5py. Because for users who may use Non-ASCII
characters, their $LANG is generally set to their native language
(e.g. zh_CN.UTF-8, en_US.UTF-8, etc.), which contains Non-ASCII
characters. Also, it is more reasonable to use the host $LANG than
to directly hard-code the $LANG used by gem5py into a language
that supports non-ASCII characters.

Change-Id: Ia0343cbd6995af3a9e43bf217ad3f186d5633fed
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58369
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-04-05 08:46:51 +00:00
Bobby R. Bruce
8f629fa638 stdlib,tests: Add Str-to-CPUTypes helper functions
The two functions are `get_cpu_types_str_set()` which returns a set of
valid CPUTypes as strings, and `get_cpu_type_from_str()` which will
return a CPUType enum given an input string.

The purpose of these functions is to aid and standardize user input
parameters or environment variables.

Test scripts are updated accordingly.

Change-Id: I7cb9263321fe36bc8a7530edfd0d8e8bbd329e0e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58491
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-04-04 22:48:12 +00:00
Bobby R. Bruce
4f4c8b5eda tests: Add MinorCPU tests to the RISCV Boot tests
Change-Id: I9bd6665af00ea8a348152b5f5f83ff1017da4c7a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57691
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-04-04 22:48:12 +00:00
Bobby R. Bruce
bfb0353541 tests: Add MinorCPU tests to Hello World tests
At present, only the ARM and RISCV gem5 binaries support the MinorCPU by
default. Therefore, that is all that is tested for now.

Change-Id: I7cbcd2ee8cae470a3de0d59af20dc2fd911fb2bd
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57690
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-04-04 22:48:12 +00:00
Bobby R. Bruce
1876e782ee stdlib: Add the MinorCPU type to the stdlib
Issue-on: https://gem5.atlassian.net/browse/GEM5-1161
Change-Id: I849f164bb33bde9e5d29bbd1d8c74a9193d29daf
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57689
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-04-04 22:48:12 +00:00
Bobby R. Bruce
de22295609 tests,testlib: Add tests for gem5.runtime.get_runtime_isa()
Included in this patch are tests to be enabled once build/ALL/gem5.opt
has been introduced.

Change-Id: I4c7ddd366af07b6d8ba4edcbbf58a1cfc7a6cc56
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57510
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
2022-04-04 22:48:12 +00:00
Bobby R. Bruce
e2f7d7bef3 tests: Add the 'constants.all_compiled_tag'
This can be used to write tests which use the 'build/ALL/gem5.opt'
binary.

Change-Id: I7a94ac74b2e59493fa04f96e7f4c26bbf9772fbb
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57509
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-04-04 22:48:12 +00:00
Bobby R. Bruce
79a93f3429 stdlib: Incorporating multi-isa work to the stdlib
The main restriction with this design is it results in one ISA target
per board. The ISA is declared per core. To make the design simpler it's
assumed a Processor (a collection of cores) are all of the same ISA. As
each board has one processor, this also means a board is typically tied
to one ISA per simulation.

In order to remain backwards compatible and maintain the standard
library APIs, this patch adds a `--main-isa` parameter which will
determine what `gem5.runtime.get_runtime_isa` returns in cases where
mutliple ISAs are compiled in. When setting the ISA in a simulation (via
the Processor or Cores), the user may, as before, choose not to and, in
this case, the `gem5.runtime.get_runtime_isa` function is used.

The `gem5.runtime.get_runtime_isa` function is an intermediate step
which should be removed in future versions of gem5 (users should specify
precisely what ISA they want via configuration scripts). For this reason
it throws a warning when used and should not be heavily relied upon. It
is deprecated.

Change-Id: Ia76541bfa9a5a4b6b86401309281849b49dc724b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/55423
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-04-04 22:48:12 +00:00
Gabe Black
3b6ea3dfa9 scons: Add a tag for arm fastmodel and use it.
This avoids some python logic in the SConscript files, and explicit
references to the configuration system.

Change-Id: If6ee61bb8c23606859e60323b8ca2c5254dbdecc
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58356
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-04-01 02:28:56 +00:00
Gabe Black
a5509c580c scons: Only warn about not finding fast model libs if it's enabled.
These warnings could be confusing and aren't useful if it's not.

Change-Id: Ie660f639a3d8ee3406153ceb771b1ba5d0df9225
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58355
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-04-01 02:28:56 +00:00
Gabe Black
3ae3b1a62f scons: Rework the fastmodel extract_var helper.
This helper extracts config variables and sets them up for use in
fast model tools. Rework this function for two purposes. First, ensure
that the ['CONF'] subdict is used consistently. It was used in one spot
in that function, but not anywhere else. Avoid those mistakes by
accessing the configuration dict only once, and then reusing the value.

Second, only print the values of those variables if they aren't empty.
That avoids extra log output for values which aren't set up and aren't
being used, while still exposing those values if they are set up. This
will print them even if they aren't being actively used, but are set up
and could be with other changes in the config.

Change-Id: Ia3ea76e6cb6b3347fd082112a1eaa8d594e06ca2
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58354
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-04-01 02:28:56 +00:00
Gabe Black
4c6790ada6 scons: Stop the fast model project file parser from writing files.
PLY tries to write these little files into the SCons installation
directory, which it shouldn't even if it was allowed to. This avoids
a bunch of annoying messages about not having enough permission.

Change-Id: Ifd4eda9dd9f8518b3fd075e8a46de1b6c12c2127
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58353
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jui-min Lee <fcrh@google.com>
2022-04-01 02:28:56 +00:00
Gabe Black
d9a51177fc scons: Tone down a fast model error into a warning.
If a fast model static library can't be found, we should treat that as
a warning instead of an error, and pass back the original library name
so that it can at least be added and potentially come from somewhere
else.

In practice, this is important because gem5 will be configured by SCons
indirectly in the future, using kconfig based tools that SCons runs on
the user's behalf. If SCons is misconfigured or not configured, this
error can trip, preventing those tools from starting. That creates a
catch 22, since you'd need SCons to fix the config, and SCons can't
run because of the config.

We can avoid that problem by making SCons more lenient, so that it can
still run even if it doesn't find static libraries where it might have
expected to.

Change-Id: Iadfd823b61fe96b937c2650250487d290492f265
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58352
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-04-01 02:28:56 +00:00
Gabe Black
f56d43eadf scons: Get rid of an unused fast model variable.
This held the location of the license file, assuming it actually was a
license file and not a license server URL. If this variable was unset
because the fast model configuration parameters hadn't been set, then
the "File" would resolve to the local directory, and SCons would get
upset that you'd called the same path a directory and a file.

We can avoid this problem by just getting rid of this variable, since
it isn't used anyway.

Change-Id: I2ccda90b85f2c83c73816967d145e6bf45733f89
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58351
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-04-01 02:28:56 +00:00
Gabe Black
c1b235b3d0 scons: Add a priority field to the SourceLib construct.
This helps specify ordering for libraries that need it. Libraries with
a higher priority will be sorted earlier in the list, which can be
necessary when working with static libraries/archives.

The default value for "priority" is zero. It's only really necessary
to ensure relative ordering of particular pairings of libraries, so
it should be ok to use an absolute integer value for this. If you
need to order relative to a library, there is a good chance you're
adding it, or the place it's added is well known and you can easily
find its priority value. It's also unlikely that there would be a
complex series of interactions between libraries that would make a
more complicated system warranted.

Change-Id: Ie94a35e6563c07f8d462a4a52d0173ea3cf4f8de
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58350
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Jui-min Lee <fcrh@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
2022-04-01 02:28:56 +00:00
Yen-lin Lai
96b11c511e scons: Allow sources and libs called multiple times
In Python, "+=" operator for list acts more like append and list assign
doesn't make a copy. This will cause unexpected append to the orignal
list. Since we have multiple env to "declare", these functions will be
called multiple times and could wrongly append duplicated entries in
later calls.

Make a copy before appending the entries from filter to avoid this
problem.

Change-Id: I144d5054e4d93191ebc94b93291ff9a3f8a6c429
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58409
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-03-31 08:49:21 +00:00
Gabe Black
222c7d8f1c scons: Remove an error check from the ProtoBuf declare-er.
ProtoBuf files can (and should) be declared to SCons unconditionally,
but then also use a "protobuf" tag. This lets SCons still include them
conditionally when it gathers sources to build certain binaries without
having additional python logic in SConscripts, or manually interpreting
config state.

Change-Id: I9426d647bc2d6c9d7eee7dadba77f75ed83bcaad
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58349
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-03-30 20:15:22 +00:00
Jui-min Lee
118b069d5d mem: Align mmap offset to page boundary
If we create abstract memories with a sub-page size on a system with
shared backstore, the offset of next mmap might become non-page-align
and cause an invalid argument error.

In this CL, we always upscale the range size to multiple of page before
updating the offset, so the offset is always on page boundary.

Change-Id: I3a6adf312f2cb5a09ee6a24a87adc62b630eac66
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58289
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Boris Shingarov <shingarov@labware.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-03-30 05:18:52 +00:00
Jordi Vaquero
8d218b41b7 sim: Fix Mempool overrides during checkpoint
This patch fixes the problem during checkpoing where the mempool is not
restored, but using only the one specified in the config file as a new
execution.
In order to fix that this changes modifyies the serialize/unserialize
functions for mempools and create new funcionts on se_workload to make
sure mempools ends up in the m5.cpt.
We change as well the unserialize mempool function to update
according the checkpoint file so the execution starts with the same
free pages and free pointers.

JIRA: https://gem5.atlassian.net/browse/GEM5-1191

Change-Id: I289bf91eb4f01d9c01a31a39b968e30f8b8d2bdc
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/56969
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-03-29 07:13:44 +00:00
Srikant Bharadwaj
4c9084e318 configs: Update memory port name in Ruby
Memory port for controllers is now called memory_out_port.
'memory' is a depracated param according to this change:
https://gem5-review.googlesource.com/c/public/gem5/+/34417

Change-Id: I6a561f5603c7597a3974af1766ab642acb3e59de
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58189
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-03-29 03:14:51 +00:00
Gabe Black
886154b958 arch: Split up src/dest register ID creation.
This will allow us to selectively change the RegID of an operand to, for
instance, convert it to InvalidRegClass just as a source so it never
actually gets read.

Change-Id: I9f8117cbb2088f8150080f815cdb5cb84bd7218e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49747
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-03-28 23:52:35 +00:00
Matthew Poremba
2af227c32a dev-hsa: Update QCntxt readIndex in HW scheduler write
The QCntxt is reused when a queue is unmapped and mapped again. This is
fairly common in GPU full system. If this is not done the readIndex on
the queue context is reset to 1, causing getCommandsFromHost to read
from the wrong slot which is typically an old dispatch packet or an
invalid packet. This causes simulation to stall as the incorrect
completion signal is eventually written.

Change-Id: I65541e559fe04f5eb44b936ca37e3f802262fe6a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57670
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-03-28 23:24:53 +00:00
Matthew Poremba
6883f12f09 dev-hsa: Properly mask HSA packet header bits
The HSA packet macros were not actually masking the header bits
properly. Add a mask call around the width (number of bits) of the field
being masked.

Change-Id: Ia5e5fb0451296e99a85fb12a5f73b27aea72fc2e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57669
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-03-28 23:24:53 +00:00
Matthew Poremba
91e8bbe299 configs,gpu-compute: Support fetch from system pages
The amdgpu driver supports fetching instructions from pages which reside
in system memory rather than device memory. This changeset adds support
to do this by adding the system hub object added in a prior changeset to
the fetch unit and issues requests to the system hub if the system bit
in the memory page's PTE is set. Otherwise, the requestor ID is set to
be device memory and the request is routed through the Ruby network /
GPU caches to fetch the instructions.

Change-Id: Ib2fb47c589fdd5e544ab6493d7dbd8f2d9d7b0e8
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57652
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-03-28 23:24:53 +00:00
Bobby R. Bruce
5eed355fb0 tests: Remove accidentally included "exit 0" test code
This "exit 0" line was included accidentally in this commit:
https://gem5-review.googlesource.com/c/public/gem5/+/58169

It should not have been included, it was for testing purposes only.

Change-Id: Ia4be334d773bbb998906b0f0ae980f9ed14c87b4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58269
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-03-28 22:16:04 +00:00
Gabe Black
964500f363 scons: Put internal build files in a gem5.build directory.
This keeps them organized, and also creates an anchor for the build
directory other than a directory named "build".

Change-Id: I3ed2f569e9fcd62eb4eca1c4556b45cd0c3552d4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/56589
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-03-28 20:31:21 +00:00
Gabe Black
e6c0ba97db scons: Put all config variables in an env['CONF'] sub-dict.
This makes what are configuration and what are internal SCons variables
explicit and separate, and makes it unnecessary to call out what
variables to export to C++.

These variables will also be plumbed into and out of kconfiglib in later
changes.

Change-Id: Iaf5e098d7404af06285c421dbdf8ef4171b3f001
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/56892
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-03-28 20:31:21 +00:00
Gabe Black
caa5f12e21 ext: Add a cont_choice keyword to kconfiglib.
This keyword lets you pick up a "choice" entry from elsewhere and add
new entries to it, greatly improving modularity of the Kconfig files.

Change-Id: Id20da6bc573e841e3ca7a42678911de827b53584
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/56756
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2022-03-28 20:31:21 +00:00
Gabe Black
ee5c751fb5 arch-arm: Override makeRead and makeWrite in the ISA description.
Do that instead of using read_code or write_code.

Change-Id: I3f78f7a81c040336327e326b7196524ff6bedb10
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49742
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-03-28 14:05:37 +00:00
Jui-min Lee
75eedb1d0b mem: Add SharedMemoryServer
Add an utility class that provides a service for another process
query and get the fd of the corresponding region in gem5's physmem.

Basically, the service works in this way:
1. client connect to the unix socket created by a SharedMemoryServer
2. client send a request {start, end} to gem5
3. the server locates the corresponding shared memory
4. gem5 response {offset} and pass {fd} in ancillary data

mmap fd at offset will provide the client the view into the physical
memory of the request range.

Change-Id: I9d42fd8a41fc28dcfebb45dec10bc9ebb8e21d11
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57729
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Boris Shingarov <shingarov@labware.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-03-28 08:26:44 +00:00
Gabe Black
64d00f83c4 arch-x86: Ensure moving to %cs faults even in real mode.
It's always illegal to try to use the "mov" instruction to move a
selector into %cs. That was implemented for normal mov-s, but not for
the real mode version.

Change-Id: Ida8ec323fd7428ece583ad01cd5095d5f9630c9d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/55825
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-03-27 00:55:44 +00:00
Gabe Black
141d44b979 arch-x86: Consider CPL in the decoder logic.
For instructions which simply require CPL0 (vs. requiring CPL is < IOPL,
or something else more complicated), this change either switches their
format so that they check that value before being returned, or adds a
comment marking them as privileged if they aren't yet implemented.

This change also makes the mov to/from CR and DR instructions more
particular, and returns an undefined instruction if the CR or DR index
is invalid.

Change-Id: I367d87a380a47428d458bda2ceecc1b983644704
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/55891
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-03-27 00:55:44 +00:00
Gabe Black
00dd1b8ffc arch-x86: Add some formats for CPL0 only instructions.
These are essentially the same as the Inst and CondInst formats, except
it adds a CPL check. If the CPL check fails, a new instruction will be
returned which is only a vehicle for delivering a GP fault.

Change-Id: Ie1e7fb6a6c04082437c4d4a25adc3e03be09ac72
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/55890
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-03-27 00:55:44 +00:00
Gabe Black
283ea24c8e arch-x86: Expose the current CPL to the decoder.
This value is already floating around, and there is essentially no
overhead for exposing it to the decoder. With that value, we can handle
instructions which generically need to run at CPL0.

Some instructions have other more complicated permissions checks, like
that the CPL needs to have some relation to the IOPL. Those checks will
have to be implemented by the instructions themselves, since the decoder
can't factor in all possible state values.

Change-Id: Ie93f4f13aae002f69330606c515f369c5706c655
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/55889
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-03-27 00:55:44 +00:00
Gabe Black
cd4c295a22 arch-x86: Specialize LTR for 64 bit mode.
Like LDT descriptors, the TR descriptors are 128 bits in 64 bit mode,
and only 64 bits in other modes.

Change-Id: Iecfab8c5a90a8bfe0dff86880bc8f88c082ddc0e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/55886
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-03-27 00:55:44 +00:00
Gabe Black
013a90c969 arch-x86: Specialize LLDT for 64 bit and non-64 bit.
In 64 bit mode the LLDT has a 128 bit descriptor which takes up two
slots. In any other mode, the descriptor is still 64 bits.

Change-Id: I88d3758a66dec3482153df5ec08565427d6c9269
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/55884
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-03-27 00:55:44 +00:00