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  • 6a90251d61 Readme file updated. Éder F. Zulian 2015-12-14 17:35:32 -02:00
  • bdb42231c2 Merge pull request #43 from fzeder/master Matthias Jung 2015-12-08 13:40:57 +01:00
  • f4851a449b Readme file updated with information about dependencies to build DRAMSys Éder F. Zulian 2015-12-01 16:33:01 +01:00
  • bfec0fd99f IceWrapper submodule updated. Éder F. Zulian 2015-11-24 13:02:45 +01:00
  • 5cc32d090b Default storage mode is NoStorage Éder F. Zulian 2015-11-20 21:30:38 +01:00
  • 628731a5a3 3d-ice and superlu paths made configurable Éder F. Zulian 2015-11-20 16:28:18 +01:00
  • 8fcd2edc7f Config files updated. Éder F. Zulian 2015-11-20 16:23:55 +01:00
  • 1adee22ba0 Minor changes to avoid warnings. Éder F. Zulian 2015-11-20 15:19:20 +01:00
  • 01a08837a6 Some changes in order to make dramSys usable in other machines. Éder F. Zulian 2015-11-20 10:30:32 +01:00
  • 108cd51ef9 Merge branch 'master' of git.rhrk.uni-kl.de:EIT-Wehn/dram.vp.system Matthias Jung 2015-11-19 14:08:04 +01:00
  • b7dfef76e5 Adressmapping for Wide I/O Fixed to Denali values Matthias Jung 2015-11-19 14:07:25 +01:00
  • 06a899a434 Merge pull request #41 from fzeder/master Matthias Jung 2015-11-19 00:02:52 +01:00
  • b9acebfa98 FIFO Strict scheduler - Created a mechanism to unblock requests Éder F. Zulian 2015-11-18 19:20:26 +01:00
  • d0788adf78 Merge pull request #40 from fzeder/master Matthias Jung 2015-11-18 13:12:27 +01:00
  • 52e0448fcf We should keep storage mode as "ErrorModel" in this test file. Éder F. Zulian 2015-11-18 09:43:31 +01:00
  • 23fbcbe601 Merge branch 'master' of git.rhrk.uni-kl.de:EIT-Wehn/dram.vp.system Matthias Jung 2015-11-17 23:53:24 +01:00
  • 29cb6bd57d some other test and metrics added Matthias Jung 2015-11-17 23:52:29 +01:00
  • 67d913544f Merge pull request #39 from fzeder/master Matthias Jung 2015-11-17 12:50:29 +01:00
  • b7c4618778 Aborting simulation when retention time and/or temperature exceed maximum values in the error model. Éder F. Zulian 2015-11-17 12:13:54 +01:00
  • 5ab6e88ab5 FR_FCFS default storage mode changed back to "NoStorage". Éder F. Zulian 2015-11-17 11:51:12 +01:00
  • c23c6311c7 FIFO strict scheduler is now working properly. Éder F. Zulian 2015-11-16 20:36:03 +01:00
  • 977d4eed32 Maximum number of transactions to generate backpressure in the controller is now 8. Éder F. Zulian 2015-11-16 20:32:34 +01:00
  • a4f80b24be Revert "The trace player will call payload.release() only after receiving the END_RESP message." Éder F. Zulian 2015-11-11 18:58:37 +01:00
  • 2aeb2351c2 The trace player will call payload.release() only after receiving the END_RESP message. Éder F. Zulian 2015-11-11 18:39:47 +01:00
  • cef3f87eff Using rm -f to ignore non existent files Éder F. Zulian 2015-11-11 12:03:43 +01:00
  • 7dbc2994a5 IceWrapper repo url - using https version Éder F. Zulian 2015-11-11 11:20:30 +01:00
  • 1beb3102a0 IceWrapper submodule repo URL changed. Éder F. Zulian 2015-11-11 11:09:22 +01:00
  • ff23c83991 Readme file updated and small fix. Éder F. Zulian 2015-10-23 12:01:51 +02:00
  • 1b0b2cc1d4 Disabling temperature simulation and error model in default configuration. Éder F. Zulian 2015-10-20 16:43:42 +02:00
  • 5ae04097b0 Avoid a warning when environment variable THERMALSIM is empty Éder F. Zulian 2015-10-20 16:42:37 +02:00
  • 8e64eee64d Get power values from DRAMPower if powerAnalysis and dynamic temperature simulation are activated Éder F. Zulian 2015-10-20 08:59:13 +02:00
  • bbcd7096b4 Adding scripts to repository. Éder F. Zulian 2015-10-19 14:54:22 +02:00
  • 672f0abefe Temperature and power map files created with a timestamp Éder F. Zulian 2015-10-19 10:44:57 +02:00
  • 072cee7afc Added support to temperature and power maps generation. Éder F. Zulian 2015-10-16 15:41:46 +02:00
  • 207ca1e5d0 The need of period adjustment is now evaluated every time the temperature is requested Éder F. Zulian 2015-10-15 16:28:15 +02:00
  • 07fb5287b8 Error model changed to avoid premature end of simulation. Éder F. Zulian 2015-10-15 12:10:01 +02:00
  • 82c165fb53 When power analisys is enabled the error model will get the power information from DRAMPower. Éder F. Zulian 2015-10-15 11:26:18 +02:00
  • a978c967b1 Error memory is now a vector of objects. Éder F. Zulian 2015-10-14 19:50:40 +02:00
  • 3d7b7793fd Simple usage example Éder F. Zulian 2015-10-13 16:55:00 +02:00
  • abacc48a6c Readme updated Éder F. Zulian 2015-10-12 13:00:03 +02:00
  • c37c9b3544 README updated. Éder F. Zulian 2015-10-08 17:49:53 +02:00
  • 757aacbe47 README updated. Éder F. Zulian 2015-10-08 17:40:35 +02:00
  • f22d75eee9 README file updated with information on how to enable the thermal simulation feature Éder F. Zulian 2015-10-07 16:21:32 +02:00
  • 8050bad57f Thermal simulation can be enabled via environment variable. Éder F. Zulian 2015-10-07 15:59:38 +02:00
  • 687f077c8f Default config is static temperature simulation Éder F. Zulian 2015-10-05 15:48:16 +02:00
  • ba290a5447 Temperature scale is now configurable Éder F. Zulian 2015-10-05 14:54:43 +02:00
  • 53252439d5 Comments improved Éder F. Zulian 2015-10-05 13:52:03 +02:00
  • 995a18e648 Improvements Éder F. Zulian 2015-10-03 19:56:20 +02:00
  • 63eae4d1ee Thermal simulation period adjustment mechanism implemented. Éder F. Zulian 2015-10-02 17:33:10 +02:00
  • 43b576dffa Readme updated Éder F. Zulian 2015-09-30 17:47:24 +02:00
  • f6e59d5c04 Temperature Controller skeleton Éder F. Zulian 2015-09-30 17:42:56 +02:00
  • 4c82592d0a Function to show the thresoulds config. Éder F. Zulian 2015-09-30 10:12:34 +02:00
  • 1160f575dc Get power thresholds for temperature simulation from a xml file Éder F. Zulian 2015-09-29 17:39:17 +02:00
  • ae6e1e1040 Get parameters related to temperature simulation from configuration Éder F. Zulian 2015-09-29 12:56:30 +02:00
  • 3c809a2853 New configuration option: DynamicTemperatureSimulation Éder F. Zulian 2015-09-24 18:23:40 +02:00
  • 65e52d0e75 DRAMSys and IceWrapper projects integrated. Éder F. Zulian 2015-09-24 17:39:37 +02:00
  • ef975f52ea Added dram.vp.icewrapper as a submodule Éder F. Zulian 2015-09-23 15:55:56 +02:00
  • 55a9acb1aa Repaired powerdown after Refresh, however the DRAM should be awake again for the interval... I think this commit will break the nightly test so I will fix that soon. Matthias Jung 2015-09-17 16:11:20 +02:00
  • b225bd6367 tests: a PRE_ALL is allowed to follow a PRE Matthias Jung 2015-09-16 17:26:44 +02:00
  • 5e540c5de2 fixed a lot of bugs in the tests again Matthias Jung 2015-09-16 17:01:34 +02:00
  • 825064c5fb Merge branch 'master' of git.rhrk.uni-kl.de:EIT-Wehn/dram.vp.system Matthias Jung 2015-09-16 14:20:32 +02:00
  • d73e667bd5 Merge pull request #38 from fzeder/master Matthias Jung 2015-09-16 13:43:00 +02:00
  • 9f8627be77 trace analyzer repaired Matthias Jung 2015-09-16 13:34:02 +02:00
  • ec717ef8d1 Removal of unnecessary debug message Éder F. Zulian 2015-09-08 16:12:23 +02:00
  • d84c0cd6bd Merge pull request #37 from fzeder/master Matthias Jung 2015-09-15 15:03:47 +02:00
  • 2ad738c514 Now it is possible to disable refreshes from config. Éder F. Zulian 2015-09-15 14:58:11 +02:00
  • 7bfeac429b Merge branch 'master' of git.rhrk.uni-kl.de:EIT-Wehn/dram.vp.system Matthias Jung 2015-09-14 09:53:12 +02:00
  • ef1fe83bb4 Added DDR3 to the config Matthias Jung 2015-09-14 09:52:49 +02:00
  • 4c9dfe680d added some die statements Matthias Jung 2015-09-12 20:57:39 +02:00
  • 01a9ec9fc4 Merge pull request #34 from fzeder/master Matthias Jung 2015-09-08 21:53:40 +02:00
  • dfdb3791bb Using {} instead of "continue" Éder F. Zulian 2015-09-08 18:01:32 +02:00
  • 929239ace5 Added timestamp and duration for every test step. Éder F. Zulian 2015-09-08 14:34:14 +02:00
  • d19d2425dc If the row has never been accessed (written, refreshed) do not flip bits. Éder F. Zulian 2015-09-08 14:33:39 +02:00
  • 851f487924 Merge pull request #33 from fzeder/master Matthias Jung 2015-09-08 10:46:03 +02:00
  • 54a0a27f30 Error model automatic test is now ready to run. Éder F. Zulian 2015-09-08 10:32:36 +02:00
  • 6149981b9c Marked start.pl as executable Matthias Jung 2015-08-06 17:00:55 +02:00
  • 2b522c5bb4 return statement added for trace analyser Matthias Jung 2015-08-06 17:00:38 +02:00
  • f4fd3b55c9 error fixed Matthias Jung 2015-08-06 16:51:37 +02:00
  • 424c2c771c Simple test system started. To test it just run the following: Matthias Jung 2015-08-06 16:00:10 +02:00
  • fa006cee5f Merge pull request #28 from fzeder/master Matthias Jung 2015-08-06 14:20:22 +02:00
  • b6f9fe1cf7 Using "NoStorage" as default configuration. Éder Ferreira Zulian 2015-08-06 12:14:26 +02:00
  • 3515167b2b "dramSys" replaced by "simulator". Éder Ferreira Zulian 2015-08-06 11:58:22 +02:00
  • 905661ca6f Moving files from dramSys to simulator directory. Éder Ferreira Zulian 2015-08-06 11:03:35 +02:00
  • 037b2eff99 Merge remote branch 'upstream/master' Éder Ferreira Zulian 2015-08-06 10:52:45 +02:00
  • 411e8bace8 Merge pull request #27 from EIT-Wehn/new-error Matthias Jung 2015-08-05 21:44:02 +02:00
  • 339a41432d value in generator script changed Matthias Jung 2015-08-05 21:36:24 +02:00
  • 635b931f2f Add test setup files for the error model Matthias Jung 2015-08-05 09:41:20 +02:00
  • af8624c9e9 STL data player added Matthias Jung 2015-08-05 09:40:48 +02:00
  • 5ba493cb70 polish Matthias Jung 2015-08-05 09:20:22 +02:00
  • dbf3f71589 Polished error model Matthias Jung 2015-08-05 09:16:31 +02:00
  • 8be4d8077c Added function to Debug Manager that also outputs if debug is set to 0 Matthias Jung 2015-08-05 09:13:58 +02:00
  • d1a7ceb82f corrected name of error file in frfcfs config Matthias Jung 2015-08-02 13:51:59 +02:00
  • 8aae7fbed3 each bank has its own error model Matthias Jung 2015-08-02 13:51:29 +02:00
  • 033bffb3ff Old error model removed Matthias Jung 2015-08-01 15:59:16 +02:00
  • 33d88006c8 New error model finished (Testing still required) Matthias Jung 2015-08-01 15:53:48 +02:00
  • ea0e628eef Added traceplayer that also reads data from the trace Matthias Jung 2015-08-01 15:53:10 +02:00
  • 49cc8d688e error file adjusted Matthias Jung 2015-08-01 12:12:25 +02:00
  • e6051ac967 Bit flipping for independent cells is now implemented Matthias Jung 2015-08-01 11:17:30 +02:00
  • 91e6ecd714 Almost everyhing is integrated now: Matthias Jung 2015-07-31 23:34:29 +02:00
  • 8fa9083676 added values for 64ms Matthias Jung 2015-07-31 23:33:43 +02:00