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Error memory is now a vector of objects.

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Éder F. Zulian
2015-10-14 19:50:40 +02:00
parent 3d7b7793fd
commit a978c967b1
1 changed files with 18 additions and 11 deletions
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29
DRAMSys/simulator/src/simulation/Dram.h
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@@ -43,6 +43,7 @@
#include <systemc.h>
#include <tlm_utils/peq_with_cb_and_phase.h>
#include <tlm_utils/simple_target_socket.h>
#include <vector>
#include "../common/DebugManager.h"
#include "../common/dramExtension.h"
#include "../controller/core/TimingCalculation.h"
@@ -69,7 +70,7 @@ struct Dram : sc_module
// Error Model related:
ErrorStorageMode ErrorStoreMode = Configuration::getInstance().ErrorStoreMode;
errorModel * ememory;
std::vector<errorModel *> ememory;
// Data Storage:
map< unsigned long int, unsigned char[BUSWIDTH/2] > memory;
@@ -169,7 +170,11 @@ struct Dram : sc_module
// For each bank in a channel a error Model is created:
if(ErrorStoreMode == ErrorStorageMode::ErrorModel)
{
ememory = new errorModel[Configuration::getInstance().memSpec.NumberOfBanks];
for (unsigned i = 0; i < Configuration::getInstance().memSpec.NumberOfBanks; i++) {
errorModel *em;
em = new errorModel();
ememory.push_back(em);
}
}
}
@@ -183,7 +188,9 @@ struct Dram : sc_module
cout << name() << string("\tAverage Power: \t") + to_string(DRAMPower->getPower().average_power) << endl;
}
// Clean up:
delete [] ememory;
for (auto e : ememory) {
delete e;
}
//std::cout << "Simulated Memory Size: " << memory.size() << endl; // TODO Aufrauemen
}
@@ -217,7 +224,7 @@ struct Dram : sc_module
if (ErrorStoreMode == ErrorStorageMode::ErrorModel)
{
ememory[bank].activate(row);
ememory[bank]->activate(row);
}
}
else if (phase == BEGIN_WR)
@@ -235,7 +242,7 @@ struct Dram : sc_module
}
else // == 2 Use Storage with Error Model
{
ememory[bank].store(payload);
ememory[bank]->store(payload);
}
sendToController(payload, END_WR, delay + getExecutionTime(Command::Write, payload));
}
@@ -257,7 +264,7 @@ struct Dram : sc_module
}
else if(ErrorStoreMode == ErrorStorageMode::ErrorModel)// use ErrorStorageMode with errormodel
{
ememory[bank].load(payload);
ememory[bank]->load(payload);
}
sendToController(payload, END_RD, delay + getExecutionTime(Command::Read, payload));
@@ -277,7 +284,7 @@ struct Dram : sc_module
}
else // == 2 Use Storage with Error Model
{
ememory[bank].store(payload);
ememory[bank]->store(payload);
}
sendToController(payload, END_WRA, delay + getExecutionTime(Command::WriteA, payload));
}
@@ -299,7 +306,7 @@ struct Dram : sc_module
}
else if(ErrorStoreMode == ErrorStorageMode::ErrorModel)// use ErrorStorageMode with errormodel
{
ememory[bank].load(payload);
ememory[bank]->load(payload);
}
sendToController(payload, END_RDA, delay + getExecutionTime(Command::ReadA, payload));
@@ -312,7 +319,7 @@ struct Dram : sc_module
if (ErrorStoreMode == ErrorStorageMode::ErrorModel)
{
ememory[bank].refresh(row);
ememory[bank]->refresh(row);
}
}
@@ -401,7 +408,7 @@ struct Dram : sc_module
}
else
{
ememory[bank].load(trans);
ememory[bank]->load(trans);
}
}
else if ( cmd == tlm::TLM_WRITE_COMMAND )
@@ -412,7 +419,7 @@ struct Dram : sc_module
}
else
{
ememory[bank].store(trans);
ememory[bank]->store(trans);
}
}
return len;