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d2761ce060
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Numerous fixes for Python scripts
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2023-10-12 11:58:18 +02:00 |
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Lukas Steiner
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8224e97abe
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Reformat all files.
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2023-09-21 16:50:59 +02:00 |
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Lukas Steiner
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7eea9c54e0
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Merge branch 'fix/TA_PC' into 'develop'
Fix PseudoChannel issue in TA
See merge request ems/astdm/modeling.dram/dram.sys.5!49
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2023-09-21 07:46:45 +00:00 |
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Lukas Steiner
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121ed12603
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Merge branch 'develop' into 'fix/TA_PC'
Use correct DRAMPower version.
See merge request ems/astdm/modeling.dram/dram.sys.5!50
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2023-09-21 07:33:53 +00:00 |
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f518ba883f
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Fix PseudoChannel issue in TA
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2023-09-21 09:22:28 +02:00 |
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Lukas Steiner
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e46770ecd9
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Revert previous commit.
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2023-09-20 07:52:13 +00:00 |
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Lukas Steiner
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223ef91e2c
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Update DRAMPower tag.
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2023-09-19 13:14:47 +00:00 |
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Lukas Steiner
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68d82cd209
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Merge branch 'work/serde' into 'develop'
Introduce Serialize/Deserialize interfaces
See merge request ems/astdm/modeling.dram/dram.sys.5!44
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2023-09-19 12:44:45 +00:00 |
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Lukas Steiner
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8bd52365dd
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Merge branch 'bug/single_device_sim' into 'develop'
Fix address mapping for single device without byte bits.
See merge request ems/astdm/modeling.dram/dram.sys.5!46
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2023-08-31 12:14:53 +00:00 |
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Lukas Steiner
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9e53a38132
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Fix address mapping for single device without byte bits.
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2023-08-31 13:43:49 +02:00 |
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Lukas Steiner
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291a3db855
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Merge branch 'db_fix' into 'develop'
Fix recording of memspec and mcconfig in trace database
See merge request ems/astdm/modeling.dram/dram.sys.5!45
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2023-08-31 10:59:55 +00:00 |
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a5810e48f4
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Fix recording of memspec and mcconfig in trace database
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2023-08-31 11:25:26 +02:00 |
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41343c787e
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Introduce a concept to report idling to the outside
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2023-08-31 10:19:04 +02:00 |
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f96bdd4ac1
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Introduce a serialize/deserialize interface
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2023-08-31 10:19:01 +02:00 |
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c27ebb6c64
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Fix gem5 integration issues
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2023-08-31 09:34:35 +02:00 |
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692ac5e566
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Fix StlPlayer to store real data
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2023-08-31 09:34:35 +02:00 |
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Lukas Steiner
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d030a27a01
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Add licensing options to readme.
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2023-08-29 08:44:20 +00:00 |
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Lukas Steiner
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2db47d8519
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Merge branch 'formatting' into 'develop'
Format all files
See merge request ems/astdm/modeling.dram/dram.sys.5!42
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2023-08-29 07:37:41 +00:00 |
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c07d09f392
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Format all files
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2023-08-29 09:26:25 +02:00 |
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25c729de1d
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Replace deprecated option in .clang-format
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2023-08-29 09:24:20 +02:00 |
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77ee1b2017
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Remove .astylerc as .clang-format is now used
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2023-08-29 09:22:45 +02:00 |
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1bb3c3ea0f
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Use raw string literal for database creation
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2023-08-29 09:22:45 +02:00 |
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Lukas Steiner
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8695efb2f9
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Merge branch 'work/partial_writes' into 'develop'
First implementation of Partial Writes
See merge request ems/astdm/modeling.dram/dram.sys.5!41
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2023-08-23 13:35:55 +00:00 |
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Lukas Steiner
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ccb4ee592b
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Remove masked write from GDDR checkers.
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2023-08-23 15:30:15 +02:00 |
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Lukas Steiner
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12f2b73cde
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Additional check of byte enable pointer.
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2023-08-23 15:21:53 +02:00 |
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Lukas Steiner
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76e58b1755
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Fix renaming.
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2023-08-23 13:50:10 +02:00 |
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Lukas Steiner
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0f824e8b92
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Do not allow masked write in default case.
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2023-08-23 11:41:58 +02:00 |
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Lukas Steiner
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8c248e8e23
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Remove masked write checks for HBM3.
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2023-08-23 10:40:41 +02:00 |
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a539e3c011
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Merge branch 'develop' into work/partial_writes
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2023-08-23 09:31:42 +02:00 |
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0d67a1fc2b
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Support byte_enable_ptr for debug transport
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2023-08-22 11:26:28 +02:00 |
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47bdddc5f1
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Different tCCDMW timing when previous WR had BL32 in LPDDR4
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2023-08-22 09:41:36 +02:00 |
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Lukas Steiner
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5250adea3c
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Merge branch 'clang-tidy-refactor' into 'develop'
Use clang-tidy and clang-format tooling
See merge request ems/astdm/modeling.dram/dram.sys.5!20
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2023-08-21 11:53:12 +00:00 |
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4548d20b6e
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Rename requiresMaskedWrite to requiresReadModifyWrite
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2023-08-21 10:55:41 +02:00 |
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c0f1b2f6a3
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Add check to prevent masked writes in HBM3
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2023-08-21 10:52:44 +02:00 |
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f1cfb80337
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Minor readability fixes
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2023-08-21 10:10:49 +02:00 |
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a0f93a75e2
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Merge develop
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2023-08-21 10:01:08 +02:00 |
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b30df49d67
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Use tCCDMW for masked write in LPDDR4
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2023-08-21 09:26:05 +02:00 |
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b3937cf63a
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Add LPDDR5 Partial Write Support
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2023-08-16 11:42:39 +02:00 |
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3f0372f1f7
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Add Partial Write support for blocking accesses
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2023-08-16 09:45:32 +02:00 |
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09275bb789
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Add support for MWR and MWRA to TraceAnalyzer
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2023-08-16 09:38:57 +02:00 |
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570fb985df
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Fix MWR and MWRA command lengths for LPDDR4
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2023-08-16 09:38:57 +02:00 |
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c5f1320399
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Implement Partial Write for DDR5
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2023-08-16 09:38:57 +02:00 |
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40dbc518b6
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Add hack in TimingCheckers to convert MWR to WR in insertion stage
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2023-08-16 09:38:54 +02:00 |
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f7066a22b0
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First implementation of Partial Writes
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2023-08-16 09:38:54 +02:00 |
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Lukas Steiner
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a8d15e35a5
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Merge branch 'work/regression_tests' into 'develop'
Add a regression test for every standard
See merge request ems/astdm/modeling.dram/dram.sys.5!34
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2023-08-15 12:00:48 +00:00 |
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Lukas Steiner
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5598d53ebd
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Merge branch 'cmake_debug' into 'develop'
Disable CMake diagnostics print
See merge request ems/astdm/modeling.dram/dram.sys.5!40
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2023-08-15 09:28:28 +00:00 |
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a4342f7104
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Update expected traces for DDR5 and HBM3
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2023-08-15 11:28:03 +02:00 |
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a18bbc7465
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Add the resource directory option to the json converter
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2023-08-15 10:58:11 +02:00 |
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c352ca4372
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Remove compare.sh scripts and invoke sqldiff directly from CMake
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2023-08-15 10:58:10 +02:00 |
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b988544be2
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Enable PerBank refresh in HBM2,HBM3 regression test
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2023-08-15 10:58:10 +02:00 |
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